1/* 2 * Copyright (C) 2016 ARM Ltd. 3 * 4 * This file is dual-licensed: you can use it either under the terms 5 * of the GPL or the X11 license, at your option. Note that this dual 6 * licensing only applies to this file, and not this project as a 7 * whole. 8 * 9 * a) This file is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License as 11 * published by the Free Software Foundation; either version 2 of the 12 * License, or (at your option) any later version. 13 * 14 * This file is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * Or, alternatively, 20 * 21 * b) Permission is hereby granted, free of charge, to any person 22 * obtaining a copy of this software and associated documentation 23 * files (the "Software"), to deal in the Software without 24 * restriction, including without limitation the rights to use, 25 * copy, modify, merge, publish, distribute, sublicense, and/or 26 * sell copies of the Software, and to permit persons to whom the 27 * Software is furnished to do so, subject to the following 28 * conditions: 29 * 30 * The above copyright notice and this permission notice shall be 31 * included in all copies or substantial portions of the Software. 32 * 33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 40 * OTHER DEALINGS IN THE SOFTWARE. 41 */ 42 43#include <sunxi-h3-h5.dtsi> 44 45/ { 46 cpus { 47 #address-cells = <1>; 48 #size-cells = <0>; 49 50 cpu0: cpu@0 { 51 compatible = "arm,cortex-a53", "arm,armv8"; 52 device_type = "cpu"; 53 reg = <0>; 54 enable-method = "psci"; 55 }; 56 57 cpu@1 { 58 compatible = "arm,cortex-a53", "arm,armv8"; 59 device_type = "cpu"; 60 reg = <1>; 61 enable-method = "psci"; 62 }; 63 64 cpu@2 { 65 compatible = "arm,cortex-a53", "arm,armv8"; 66 device_type = "cpu"; 67 reg = <2>; 68 enable-method = "psci"; 69 }; 70 71 cpu@3 { 72 compatible = "arm,cortex-a53", "arm,armv8"; 73 device_type = "cpu"; 74 reg = <3>; 75 enable-method = "psci"; 76 }; 77 }; 78 79 psci { 80 compatible = "arm,psci-0.2"; 81 method = "smc"; 82 }; 83 84 timer { 85 compatible = "arm,armv8-timer"; 86 interrupts = <GIC_PPI 13 87 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 88 <GIC_PPI 14 89 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 90 <GIC_PPI 11 91 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 92 <GIC_PPI 10 93 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; 94 }; 95}; 96 97&ccu { 98 compatible = "allwinner,sun50i-h5-ccu"; 99}; 100 101&display_clocks { 102 compatible = "allwinner,sun50i-h5-de2-clk"; 103}; 104 105&mmc0 { 106 compatible = "allwinner,sun50i-h5-mmc", 107 "allwinner,sun50i-a64-mmc"; 108 clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>; 109 clock-names = "ahb", "mmc"; 110}; 111 112&mmc1 { 113 compatible = "allwinner,sun50i-h5-mmc", 114 "allwinner,sun50i-a64-mmc"; 115 clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>; 116 clock-names = "ahb", "mmc"; 117}; 118 119&mmc2 { 120 compatible = "allwinner,sun50i-h5-emmc", 121 "allwinner,sun50i-a64-emmc"; 122 clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>; 123 clock-names = "ahb", "mmc"; 124}; 125 126&pio { 127 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, 128 <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>, 129 <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 130 compatible = "allwinner,sun50i-h5-pinctrl"; 131}; 132