1/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
2/*
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
4 * Author: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics.
5 */
6
7/dts-v1/;
8
9#include "stm32mp157.dtsi"
10#include <dt-bindings/gpio/gpio.h>
11#include <dt-bindings/input/input.h>
12#include <dt-bindings/pinctrl/stm32-pinfunc.h>
13
14/ {
15	model = "STMicroelectronics STM32MP157C pmic eval daughter";
16	compatible = "st,stm32mp157c-ed1", "st,stm32mp157";
17
18	chosen {
19		bootargs = "earlyprintk console=ttyS3,115200 root=/dev/ram";
20		stdout-path = "serial3:115200n8";
21	};
22
23	memory {
24		reg = <0xC0000000 0x40000000>;
25	};
26};
27
28&gpioa {
29	status = "okay";
30};
31
32&gpiob {
33	status = "okay";
34};
35
36&gpioc {
37	status = "okay";
38};
39
40&gpiod {
41	status = "okay";
42};
43
44&gpioe {
45	status = "okay";
46};
47
48&gpiof {
49	status = "okay";
50};
51
52&gpiog {
53	status = "okay";
54};
55
56&gpioh {
57	status = "okay";
58};
59
60&gpioi {
61	status = "okay";
62};
63
64&gpioj {
65	status = "okay";
66};
67
68&gpiok {
69	status = "okay";
70};
71
72&gpioz {
73	status = "okay";
74};
75
76&pinctrl {
77	uart4_pins_a: uart4@0 {
78		pins1 {
79			pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */
80			bias-disable;
81			drive-push-pull;
82			slew-rate = <0>;
83		};
84		pins2 {
85			pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
86			bias-disable;
87		};
88	};
89
90	sdmmc1_b4_pins_a: sdmmc1-b4@0 {
91		pins {
92			pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
93				 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
94				 <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
95				 <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */
96				 <STM32_PINMUX('C', 12, AF12)>, /* SDMMC1_CK */
97				 <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
98			slew-rate = <3>;
99			drive-push-pull;
100			bias-disable;
101		};
102	};
103
104	sdmmc1_dir_pins_a: sdmmc1-dir@0 {
105		pins {
106			pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */
107				 <STM32_PINMUX('C', 7, AF8)>, /* SDMMC1_D123DIR */
108				 <STM32_PINMUX('B', 9, AF11)>, /* SDMMC1_CDIR */
109				 <STM32_PINMUX('E', 4, AF8)>; /* SDMMC1_CKIN */
110			slew-rate = <3>;
111			drive-push-pull;
112			bias-pull-up;
113		};
114	};
115};
116
117&pinctrl_z {
118	i2c4_pins_a: i2c4@0 {
119		pins {
120			pinmux = <STM32_PINMUX('Z', 4, AF6)>, /* I2C4_SCL */
121				 <STM32_PINMUX('Z', 5, AF6)>; /* I2C4_SDA */
122			bias-disable;
123			drive-open-drain;
124			slew-rate = <0>;
125		};
126	};
127};
128
129&i2c4 {
130	pinctrl-names = "default";
131	pinctrl-0 = <&i2c4_pins_a>;
132	i2c-scl-rising-time-ns = <185>;
133	i2c-scl-falling-time-ns = <20>;
134	status = "okay";
135
136	pmic: stpmu1@33 {
137		compatible = "st,stpmu1";
138		reg = <0x33>;
139		interrupts = <0 2>;
140		interrupt-parent = <&gpioa>;
141		interrupt-controller;
142		#interrupt-cells = <2>;
143		status = "okay";
144	};
145};
146
147&sdmmc1 {
148	pinctrl-names = "default";
149	pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_a>;
150	broken-cd;
151	st,dirpol;
152	st,negedge;
153	st,pin-ckin;
154	bus-width = <4>;
155	sd-uhs-sdr12;
156	sd-uhs-sdr25;
157	sd-uhs-sdr50;
158	sd-uhs-ddr50;
159	sd-uhs-sdr104;
160	status = "okay";
161};
162
163&uart4 {
164	pinctrl-names = "default";
165	pinctrl-0 = <&uart4_pins_a>;
166	status = "okay";
167};
168