1/{
2	soc {
3		timer5: timer@40000c00 {
4			u-boot,dm-pre-reloc;
5		};
6	};
7};
8
9&pinctrl {
10	usart1_pins_a: usart1@0	{
11		u-boot,dm-pre-reloc;
12		pins1 {
13			u-boot,dm-pre-reloc;
14		};
15		pins2 {
16			u-boot,dm-pre-reloc;
17		};
18	};
19	fmc_pins: fmc@0 {
20		u-boot,dm-pre-reloc;
21		pins
22		{
23		 u-boot,dm-pre-reloc;
24		};
25	};
26};
27
28&fmc {
29	bank1: bank@0 {
30		 u-boot,dm-pre-reloc;
31	};
32};
33
34&pwrcfg {
35	u-boot,dm-pre-reloc;
36};
37
38&clk_hse {
39	u-boot,dm-pre-reloc;
40};
41