1/* 2 * Copyright (C) 2018 Intel Corporation 3 * 4 * SPDX-License-Identifier: GPL-2.0 5 */ 6 7#include "socfpga_stratix10.dtsi" 8 9/ { 10 model = "SoCFPGA Stratix 10 SoCDK"; 11 12 aliases { 13 serial0 = &uart0; 14 }; 15 16 chosen { 17 stdout-path = "serial0:115200n8"; 18 }; 19 20 leds { 21 compatible = "gpio-leds"; 22 hps0 { 23 label = "hps_led0"; 24 gpios = <&portb 20 GPIO_ACTIVE_HIGH>; 25 }; 26 27 hps1 { 28 label = "hps_led1"; 29 gpios = <&portb 19 GPIO_ACTIVE_HIGH>; 30 }; 31 32 hps2 { 33 label = "hps_led2"; 34 gpios = <&portb 21 GPIO_ACTIVE_HIGH>; 35 }; 36 }; 37 38 memory { 39 device_type = "memory"; 40 /* We expect the bootloader to fill in the reg */ 41 reg = <0 0 0 0>; 42 }; 43}; 44 45&gpio1 { 46 status = "okay"; 47}; 48 49&gmac0 { 50 status = "okay"; 51 phy-mode = "rgmii"; 52 phy-handle = <&phy0>; 53 54 max-frame-size = <3800>; 55 56 mdio0 { 57 #address-cells = <1>; 58 #size-cells = <0>; 59 compatible = "snps,dwmac-mdio"; 60 phy0: ethernet-phy@0 { 61 reg = <4>; 62 63 txd0-skew-ps = <0>; /* -420ps */ 64 txd1-skew-ps = <0>; /* -420ps */ 65 txd2-skew-ps = <0>; /* -420ps */ 66 txd3-skew-ps = <0>; /* -420ps */ 67 rxd0-skew-ps = <420>; /* 0ps */ 68 rxd1-skew-ps = <420>; /* 0ps */ 69 rxd2-skew-ps = <420>; /* 0ps */ 70 rxd3-skew-ps = <420>; /* 0ps */ 71 txen-skew-ps = <0>; /* -420ps */ 72 txc-skew-ps = <1860>; /* 960ps */ 73 rxdv-skew-ps = <420>; /* 0ps */ 74 rxc-skew-ps = <1680>; /* 780ps */ 75 }; 76 }; 77}; 78 79&mmc { 80 status = "okay"; 81 cap-sd-highspeed; 82 broken-cd; 83 bus-width = <4>; 84}; 85 86&uart0 { 87 status = "okay"; 88}; 89 90&usb0 { 91 status = "okay"; 92}; 93