1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2015 Stefan Roese <sr@denx.de>
4 */
5
6#include "socfpga_cyclone5.dtsi"
7
8/ {
9	model = "SoCFPGA Cyclone V SR1500";
10	compatible = "anonymous,socfpga-sr1500", "altr,socfpga-cyclone5", "altr,socfpga";
11
12	chosen {
13		bootargs = "console=ttyS0,115200";
14		stdout-path = "serial0:115200n8";
15	};
16
17	aliases {
18		/*
19		 * This allows the ethaddr uboot environment variable
20		 * contents to be added to the gmac1 device tree blob.
21		 */
22		ethernet0 = &gmac1;
23	};
24
25	memory@0 {
26		name = "memory";
27		device_type = "memory";
28		reg = <0x0 0x40000000>; /* 1GB */
29	};
30
31	soc {
32		u-boot,dm-pre-reloc;
33	};
34};
35
36&gmac1 {
37	status = "okay";
38	phy-mode = "rgmii";
39};
40
41&gpio0 {
42	status = "okay";
43};
44
45&gpio1 {
46	status = "okay";
47};
48
49&gpio2 {
50	status = "okay";
51};
52
53&porta {
54	bank-name = "porta";
55};
56
57&portb {
58	bank-name = "portb";
59};
60
61&portc {
62	bank-name = "portc";
63};
64
65&i2c0 {
66	status = "okay";
67	speed-mode = <0>;
68};
69
70&i2c1 {
71	status = "okay";
72	speed-mode = <0>;
73};
74
75&mmc0 {
76	status = "okay";
77	bus-width = <8>;
78	u-boot,dm-pre-reloc;
79};
80
81&uart0 {
82	status = "okay";
83	u-boot,dm-pre-reloc;
84};
85
86&usb1 {
87	status = "okay";
88};
89
90&watchdog0 {
91	status = "okay";
92};
93
94&qspi {
95	status = "okay";
96	u-boot,dm-pre-reloc;
97
98	flash0: n25q00@0 {
99		u-boot,dm-pre-reloc;
100		#address-cells = <1>;
101		#size-cells = <1>;
102		compatible = "n25q00", "spi-flash";
103		reg = <0>;      /* chip select */
104		spi-max-frequency = <100000000>;
105		m25p,fast-read;
106		page-size = <256>;
107		block-size = <16>; /* 2^16, 64KB */
108		cdns,tshsl-ns = <50>;
109		cdns,tsd2d-ns = <50>;
110		cdns,tchsh-ns = <4>;
111		cdns,tslch-ns = <4>;
112	};
113};
114