1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2015 Stefan Roese <sr@denx.de>
4 */
5
6#include "socfpga_cyclone5.dtsi"
7
8/ {
9	model = "SoCFPGA Cyclone V SR1500";
10	compatible = "anonymous,socfpga-sr1500", "altr,socfpga-cyclone5", "altr,socfpga";
11
12	chosen {
13		bootargs = "console=ttyS0,115200";
14	};
15
16	aliases {
17		/*
18		 * This allows the ethaddr uboot environment variable
19		 * contents to be added to the gmac1 device tree blob.
20		 */
21		ethernet0 = &gmac1;
22	};
23
24	memory@0 {
25		name = "memory";
26		device_type = "memory";
27		reg = <0x0 0x40000000>; /* 1GB */
28	};
29
30	soc {
31		u-boot,dm-pre-reloc;
32	};
33};
34
35&gmac1 {
36	status = "okay";
37	phy-mode = "rgmii";
38};
39
40&gpio0 {
41	status = "okay";
42};
43
44&gpio1 {
45	status = "okay";
46};
47
48&gpio2 {
49	status = "okay";
50};
51
52&i2c0 {
53	status = "okay";
54	speed-mode = <0>;
55};
56
57&i2c1 {
58	status = "okay";
59	speed-mode = <0>;
60};
61
62&mmc0 {
63	status = "okay";
64	bus-width = <8>;
65	u-boot,dm-pre-reloc;
66};
67
68&uart0 {
69	status = "okay";
70};
71
72&usb1 {
73	status = "okay";
74};
75
76&watchdog0 {
77	status = "okay";
78};
79
80&qspi {
81	status = "okay";
82	u-boot,dm-pre-reloc;
83
84	flash0: n25q00@0 {
85		u-boot,dm-pre-reloc;
86		#address-cells = <1>;
87		#size-cells = <1>;
88		compatible = "n25q00", "spi-flash";
89		reg = <0>;      /* chip select */
90		spi-max-frequency = <100000000>;
91		m25p,fast-read;
92		page-size = <256>;
93		block-size = <16>; /* 2^16, 64KB */
94		cdns,tshsl-ns = <50>;
95		cdns,tsd2d-ns = <50>;
96		cdns,tchsh-ns = <4>;
97		cdns,tslch-ns = <4>;
98	};
99};
100