1/*
2 *  Copyright (C) 2012 Altera Corporation <www.altera.com>
3 *
4 * SPDX-License-Identifier:	GPL-2.0+
5 */
6
7#include "socfpga_cyclone5.dtsi"
8
9/ {
10	model = "Altera SOCFPGA Cyclone V SoC Development Kit";
11	compatible = "altr,socfpga-cyclone5", "altr,socfpga";
12
13	chosen {
14		bootargs = "console=ttyS0,115200";
15	};
16
17	memory {
18		name = "memory";
19		device_type = "memory";
20		reg = <0x0 0x40000000>; /* 1GB */
21	};
22
23	aliases {
24		/* this allow the ethaddr uboot environmnet variable contents
25		 * to be added to the gmac1 device tree blob.
26		 */
27		ethernet0 = &gmac1;
28		udc0 = &usb1;
29	};
30
31	regulator_3_3v: 3-3-v-regulator {
32		compatible = "regulator-fixed";
33		regulator-name = "3.3V";
34		regulator-min-microvolt = <3300000>;
35		regulator-max-microvolt = <3300000>;
36	};
37};
38
39&gmac1 {
40	status = "okay";
41	phy-mode = "rgmii";
42
43	rxd0-skew-ps = <0>;
44	rxd1-skew-ps = <0>;
45	rxd2-skew-ps = <0>;
46	rxd3-skew-ps = <0>;
47	txen-skew-ps = <0>;
48	txc-skew-ps = <2600>;
49	rxdv-skew-ps = <0>;
50	rxc-skew-ps = <2000>;
51};
52
53&gpio1 {
54	status = "okay";
55};
56
57&i2c0 {
58	status = "okay";
59
60	eeprom@51 {
61		compatible = "atmel,24c32";
62		reg = <0x51>;
63		pagesize = <32>;
64	};
65
66	rtc@68 {
67		compatible = "dallas,ds1339";
68		reg = <0x68>;
69	};
70};
71
72&mmc0 {
73	status = "okay";
74	u-boot,dm-pre-reloc;
75
76	cd-gpios = <&portb 18 0>;
77	vmmc-supply = <&regulator_3_3v>;
78	vqmmc-supply = <&regulator_3_3v>;
79};
80
81&qspi {
82	status = "okay";
83
84	flash0: n25q00@0 {
85		#address-cells = <1>;
86		#size-cells = <1>;
87		compatible = "n25q00";
88		reg = <0>;      /* chip select */
89		spi-max-frequency = <100000000>;
90		m25p,fast-read;
91		page-size = <256>;
92		block-size = <16>; /* 2^16, 64KB */
93		read-delay = <4>;  /* delay value in read data capture register */
94		tshsl-ns = <50>;
95		tsd2d-ns = <50>;
96		tchsh-ns = <4>;
97		tslch-ns = <4>;
98	};
99};
100
101&usb1 {
102	status = "okay";
103};
104