1/*
2 *  Copyright (C) 2012 Altera Corporation <www.altera.com>
3 *
4 * SPDX-License-Identifier:	GPL-2.0+
5 */
6
7#include "socfpga_cyclone5.dtsi"
8
9/ {
10	model = "SoCFPGA Cyclone V IS1";
11	compatible = "anonymous,socfpga-is1", "altr,socfpga-cyclone5", "altr,socfpga";
12
13	chosen {
14		bootargs = "console=ttyS0,115200";
15	};
16
17	memory {
18		name = "memory";
19		device_type = "memory";
20		reg = <0x0 0x10000000>;
21	};
22
23	aliases {
24		ethernet0 = &gmac1;
25		udc0 = &usb1;
26	};
27
28	regulator_3_3v: 3-3-v-regulator {
29		compatible = "regulator-fixed";
30		regulator-name = "3.3V";
31		regulator-min-microvolt = <3300000>;
32		regulator-max-microvolt = <3300000>;
33	};
34
35	soc {
36		u-boot,dm-pre-reloc;
37	};
38};
39
40&gmac1 {
41	status = "okay";
42	phy-mode = "rgmii";
43
44	rxd0-skew-ps = <0>;
45	rxd1-skew-ps = <0>;
46	rxd2-skew-ps = <0>;
47	rxd3-skew-ps = <0>;
48	txen-skew-ps = <0>;
49	txc-skew-ps = <2600>;
50	rxdv-skew-ps = <0>;
51	rxc-skew-ps = <2000>;
52};
53
54&gpio1 {
55	status = "okay";
56};
57
58&i2c0 {
59	status = "okay";
60
61	eeprom@51 {
62		compatible = "atmel,24c32";
63		reg = <0x51>;
64		pagesize = <32>;
65	};
66
67	rtc@68 {
68		compatible = "dallas,ds1339";
69		reg = <0x68>;
70	};
71};
72
73&mmc0 {
74	status = "okay";
75	u-boot,dm-pre-reloc;
76
77	cd-gpios = <&portb 18 0>;
78	vmmc-supply = <&regulator_3_3v>;
79	vqmmc-supply = <&regulator_3_3v>;
80};
81
82&qspi {
83	status = "okay";
84	u-boot,dm-pre-reloc;
85
86	flash0: n25q00@0 {
87		u-boot,dm-pre-reloc;
88		#address-cells = <1>;
89		#size-cells = <1>;
90		compatible = "n25q00";
91		reg = <0>;      /* chip select */
92		spi-max-frequency = <100000000>;
93		m25p,fast-read;
94		page-size = <256>;
95		block-size = <16>; /* 2^16, 64KB */
96		read-delay = <4>;  /* delay value in read data capture register */
97		tshsl-ns = <50>;
98		tsd2d-ns = <50>;
99		tchsh-ns = <4>;
100		tslch-ns = <4>;
101	};
102};
103
104&usb1 {
105	status = "okay";
106};
107