1/*
2 *  Copyright (C) 2012 Altera Corporation <www.altera.com>
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
16 */
17
18/dts-v1/;
19/* First 4KB has trampoline code for secondary cores. */
20/memreserve/ 0x00000000 0x0001000;
21#include "socfpga.dtsi"
22
23/ {
24	soc {
25		clkmgr@ffd04000 {
26			clocks {
27				osc1 {
28					clock-frequency = <25000000>;
29				};
30			};
31		};
32
33		mmc0: dwmmc0@ff704000 {
34			num-slots = <1>;
35			broken-cd;
36			bus-width = <4>;
37			cap-mmc-highspeed;
38			cap-sd-highspeed;
39		};
40
41		ethernet@ff702000 {
42			phy-mode = "rgmii";
43			phy-addr = <0xffffffff>; /* probe for phy addr */
44			status = "okay";
45		};
46
47		sysmgr@ffd08000 {
48			cpu1-start-addr = <0xffd080c4>;
49		};
50	};
51};
52