1bb333031SMarek Vasut/* 2bb333031SMarek Vasut * Copyright (C) 2013 Altera Corporation <www.altera.com> 3bb333031SMarek Vasut * 4bb333031SMarek Vasut * SPDX-License-Identifier: GPL-2.0+ 5bb333031SMarek Vasut */ 6bb333031SMarek Vasut 7bb333031SMarek Vasut#include "socfpga_arria5.dtsi" 8bb333031SMarek Vasut 9bb333031SMarek Vasut/ { 10bb333031SMarek Vasut model = "Altera SOCFPGA Arria V SoC Development Kit"; 11bb333031SMarek Vasut compatible = "altr,socfpga-arria5", "altr,socfpga"; 12bb333031SMarek Vasut 13bb333031SMarek Vasut chosen { 14bb333031SMarek Vasut bootargs = "console=ttyS0,115200"; 15bb333031SMarek Vasut }; 16bb333031SMarek Vasut 17bb333031SMarek Vasut memory { 18bb333031SMarek Vasut name = "memory"; 19bb333031SMarek Vasut device_type = "memory"; 20bb333031SMarek Vasut reg = <0x0 0x40000000>; /* 1GB */ 21bb333031SMarek Vasut }; 22bb333031SMarek Vasut 23bb333031SMarek Vasut aliases { 24bb333031SMarek Vasut /* this allow the ethaddr uboot environmnet variable contents 25bb333031SMarek Vasut * to be added to the gmac1 device tree blob. 26bb333031SMarek Vasut */ 27bb333031SMarek Vasut ethernet0 = &gmac1; 28*e5c57eeaSPavel Machek 29*e5c57eeaSPavel Machek spi0 = "/spi@ff705000"; /* QSPI */ 30*e5c57eeaSPavel Machek spi1 = "/spi@fff00000"; 31*e5c57eeaSPavel Machek spi2 = "/spi@fff01000"; 32bb333031SMarek Vasut }; 33bb333031SMarek Vasut 34bb333031SMarek Vasut regulator_3_3v: 3-3-v-regulator { 35bb333031SMarek Vasut compatible = "regulator-fixed"; 36bb333031SMarek Vasut regulator-name = "3.3V"; 37bb333031SMarek Vasut regulator-min-microvolt = <3300000>; 38bb333031SMarek Vasut regulator-max-microvolt = <3300000>; 39bb333031SMarek Vasut }; 40bb333031SMarek Vasut}; 41bb333031SMarek Vasut 42bb333031SMarek Vasut&gmac1 { 43bb333031SMarek Vasut status = "okay"; 44bb333031SMarek Vasut phy-mode = "rgmii"; 45bb333031SMarek Vasut 46bb333031SMarek Vasut rxd0-skew-ps = <0>; 47bb333031SMarek Vasut rxd1-skew-ps = <0>; 48bb333031SMarek Vasut rxd2-skew-ps = <0>; 49bb333031SMarek Vasut rxd3-skew-ps = <0>; 50bb333031SMarek Vasut txen-skew-ps = <0>; 51bb333031SMarek Vasut txc-skew-ps = <2600>; 52bb333031SMarek Vasut rxdv-skew-ps = <0>; 53bb333031SMarek Vasut rxc-skew-ps = <2000>; 54bb333031SMarek Vasut}; 55bb333031SMarek Vasut 56bb333031SMarek Vasut&i2c0 { 57bb333031SMarek Vasut status = "okay"; 58bb333031SMarek Vasut 59bb333031SMarek Vasut eeprom@51 { 60bb333031SMarek Vasut compatible = "atmel,24c32"; 61bb333031SMarek Vasut reg = <0x51>; 62bb333031SMarek Vasut pagesize = <32>; 63bb333031SMarek Vasut }; 64bb333031SMarek Vasut 65bb333031SMarek Vasut rtc@68 { 66bb333031SMarek Vasut compatible = "dallas,ds1339"; 67bb333031SMarek Vasut reg = <0x68>; 68bb333031SMarek Vasut }; 69bb333031SMarek Vasut}; 70bb333031SMarek Vasut 71bb333031SMarek Vasut&mmc0 { 72bb333031SMarek Vasut vmmc-supply = <®ulator_3_3v>; 73bb333031SMarek Vasut vqmmc-supply = <®ulator_3_3v>; 74bb333031SMarek Vasut}; 75bb333031SMarek Vasut 76bb333031SMarek Vasut&usb1 { 77bb333031SMarek Vasut status = "okay"; 78bb333031SMarek Vasut}; 79*e5c57eeaSPavel Machek 80*e5c57eeaSPavel Machek&qspi { 81*e5c57eeaSPavel Machek status = "okay"; 82*e5c57eeaSPavel Machek 83*e5c57eeaSPavel Machek flash0: n25q00@0 { 84*e5c57eeaSPavel Machek #address-cells = <1>; 85*e5c57eeaSPavel Machek #size-cells = <1>; 86*e5c57eeaSPavel Machek compatible = "n25q00"; 87*e5c57eeaSPavel Machek reg = <0>; /* chip select */ 88*e5c57eeaSPavel Machek spi-max-frequency = <50000000>; 89*e5c57eeaSPavel Machek m25p,fast-read; 90*e5c57eeaSPavel Machek page-size = <256>; 91*e5c57eeaSPavel Machek block-size = <16>; /* 2^16, 64KB */ 92*e5c57eeaSPavel Machek read-delay = <4>; /* delay value in read data capture register */ 93*e5c57eeaSPavel Machek tshsl-ns = <50>; 94*e5c57eeaSPavel Machek tsd2d-ns = <50>; 95*e5c57eeaSPavel Machek tchsh-ns = <4>; 96*e5c57eeaSPavel Machek tslch-ns = <4>; 97*e5c57eeaSPavel Machek }; 98*e5c57eeaSPavel Machek}; 99