1cc21ed62SMarek Vasut/* 2cc21ed62SMarek Vasut * Copyright (C) 2015 Altera Corporation <www.altera.com> 3cc21ed62SMarek Vasut * 4cc21ed62SMarek Vasut * This program is free software; you can redistribute it and/or modify 5cc21ed62SMarek Vasut * it under the terms of the GNU General Public License as published by 6cc21ed62SMarek Vasut * the Free Software Foundation; either version 2 of the License, or 7cc21ed62SMarek Vasut * (at your option) any later version. 8cc21ed62SMarek Vasut * 9cc21ed62SMarek Vasut * This program is distributed in the hope that it will be useful, 10cc21ed62SMarek Vasut * but WITHOUT ANY WARRANTY; without even the implied warranty of 11cc21ed62SMarek Vasut * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12cc21ed62SMarek Vasut * GNU General Public License for more details. 13cc21ed62SMarek Vasut * 14cc21ed62SMarek Vasut * You should have received a copy of the GNU General Public License 15cc21ed62SMarek Vasut * along with this program. If not, see <http://www.gnu.org/licenses/>. 16cc21ed62SMarek Vasut */ 17cc21ed62SMarek Vasut#include "socfpga_arria10_socdk_sdmmc_handoff.dtsi" 18cc21ed62SMarek Vasut 19cc21ed62SMarek Vasut/ { 20cc21ed62SMarek Vasut model = "Altera SOCFPGA Arria 10"; 21cc21ed62SMarek Vasut compatible = "altr,socfpga-arria10", "altr,socfpga"; 22cc21ed62SMarek Vasut 23cc21ed62SMarek Vasut aliases { 24cc21ed62SMarek Vasut ethernet0 = &gmac0; 25cc21ed62SMarek Vasut serial0 = &uart1; 26cc21ed62SMarek Vasut }; 27cc21ed62SMarek Vasut 28cc21ed62SMarek Vasut chosen { 29cc21ed62SMarek Vasut bootargs = "earlyprintk"; 30cc21ed62SMarek Vasut stdout-path = "serial0:115200n8"; 31cc21ed62SMarek Vasut }; 32cc21ed62SMarek Vasut 33cc21ed62SMarek Vasut memory@0 { 34cc21ed62SMarek Vasut name = "memory"; 35cc21ed62SMarek Vasut device_type = "memory"; 36cc21ed62SMarek Vasut reg = <0x0 0x40000000>; /* 1GB */ 37*df78f016SMarek Vasut u-boot,dm-pre-reloc; 38cc21ed62SMarek Vasut }; 39cc21ed62SMarek Vasut 40cc21ed62SMarek Vasut a10leds { 41cc21ed62SMarek Vasut compatible = "gpio-leds"; 42cc21ed62SMarek Vasut 43cc21ed62SMarek Vasut a10sr_led0 { 44cc21ed62SMarek Vasut label = "a10sr-led0"; 45cc21ed62SMarek Vasut gpios = <&a10sr_gpio 0 1>; 46cc21ed62SMarek Vasut }; 47cc21ed62SMarek Vasut 48cc21ed62SMarek Vasut a10sr_led1 { 49cc21ed62SMarek Vasut label = "a10sr-led1"; 50cc21ed62SMarek Vasut gpios = <&a10sr_gpio 1 1>; 51cc21ed62SMarek Vasut }; 52cc21ed62SMarek Vasut 53cc21ed62SMarek Vasut a10sr_led2 { 54cc21ed62SMarek Vasut label = "a10sr-led2"; 55cc21ed62SMarek Vasut gpios = <&a10sr_gpio 2 1>; 56cc21ed62SMarek Vasut }; 57cc21ed62SMarek Vasut 58cc21ed62SMarek Vasut a10sr_led3 { 59cc21ed62SMarek Vasut label = "a10sr-led3"; 60cc21ed62SMarek Vasut gpios = <&a10sr_gpio 3 1>; 61cc21ed62SMarek Vasut }; 62cc21ed62SMarek Vasut }; 63cc21ed62SMarek Vasut 64cc21ed62SMarek Vasut soc { 65cc21ed62SMarek Vasut u-boot,dm-pre-reloc; 66cc21ed62SMarek Vasut }; 67cc21ed62SMarek Vasut}; 68cc21ed62SMarek Vasut 69cc21ed62SMarek Vasut&gmac0 { 70cc21ed62SMarek Vasut phy-mode = "rgmii"; 71cc21ed62SMarek Vasut phy-addr = <0xffffffff>; /* probe for phy addr */ 72cc21ed62SMarek Vasut 73cc21ed62SMarek Vasut /* 74cc21ed62SMarek Vasut * These skews assume the user's FPGA design is adding 600ps of delay 75cc21ed62SMarek Vasut * for TX_CLK on Arria 10. 76cc21ed62SMarek Vasut * 77cc21ed62SMarek Vasut * All skews are offset since hardware skew values for the ksz9031 78cc21ed62SMarek Vasut * range from a negative skew to a positive skew. 79cc21ed62SMarek Vasut * See the micrel-ksz90x1.txt Documentation file for details. 80cc21ed62SMarek Vasut */ 81cc21ed62SMarek Vasut txd0-skew-ps = <0>; /* -420ps */ 82cc21ed62SMarek Vasut txd1-skew-ps = <0>; /* -420ps */ 83cc21ed62SMarek Vasut txd2-skew-ps = <0>; /* -420ps */ 84cc21ed62SMarek Vasut txd3-skew-ps = <0>; /* -420ps */ 85cc21ed62SMarek Vasut rxd0-skew-ps = <420>; /* 0ps */ 86cc21ed62SMarek Vasut rxd1-skew-ps = <420>; /* 0ps */ 87cc21ed62SMarek Vasut rxd2-skew-ps = <420>; /* 0ps */ 88cc21ed62SMarek Vasut rxd3-skew-ps = <420>; /* 0ps */ 89cc21ed62SMarek Vasut txen-skew-ps = <0>; /* -420ps */ 90cc21ed62SMarek Vasut txc-skew-ps = <1860>; /* 960ps */ 91cc21ed62SMarek Vasut rxdv-skew-ps = <420>; /* 0ps */ 92cc21ed62SMarek Vasut rxc-skew-ps = <1680>; /* 780ps */ 93cc21ed62SMarek Vasut max-frame-size = <3800>; 94cc21ed62SMarek Vasut status = "okay"; 95cc21ed62SMarek Vasut}; 96cc21ed62SMarek Vasut 97cc21ed62SMarek Vasut&gpio1 { 98cc21ed62SMarek Vasut status = "okay"; 99cc21ed62SMarek Vasut}; 100cc21ed62SMarek Vasut 101cc21ed62SMarek Vasut&spi1 { 102cc21ed62SMarek Vasut status = "okay"; 103cc21ed62SMarek Vasut 104cc21ed62SMarek Vasut resource-manager@0 { 105cc21ed62SMarek Vasut compatible = "altr,a10sr"; 106cc21ed62SMarek Vasut reg = <0>; 107cc21ed62SMarek Vasut spi-max-frequency = <100000>; 108cc21ed62SMarek Vasut /* low-level active IRQ at GPIO1_5 */ 109cc21ed62SMarek Vasut interrupt-parent = <&portb>; 110cc21ed62SMarek Vasut interrupts = <5 IRQ_TYPE_LEVEL_LOW>; 111cc21ed62SMarek Vasut interrupt-controller; 112cc21ed62SMarek Vasut #interrupt-cells = <2>; 113cc21ed62SMarek Vasut 114cc21ed62SMarek Vasut a10sr_gpio: gpio-controller { 115cc21ed62SMarek Vasut compatible = "altr,a10sr-gpio"; 116cc21ed62SMarek Vasut gpio-controller; 117cc21ed62SMarek Vasut #gpio-cells = <2>; 118cc21ed62SMarek Vasut }; 119cc21ed62SMarek Vasut 120cc21ed62SMarek Vasut a10sr_rst: reset-controller { 121cc21ed62SMarek Vasut compatible = "altr,a10sr-reset"; 122cc21ed62SMarek Vasut #reset-cells = <1>; 123cc21ed62SMarek Vasut }; 124cc21ed62SMarek Vasut }; 125cc21ed62SMarek Vasut}; 126cc21ed62SMarek Vasut 127cc21ed62SMarek Vasut&i2c1 { 128cc21ed62SMarek Vasut status = "okay"; 129cc21ed62SMarek Vasut 130cc21ed62SMarek Vasut /* 131cc21ed62SMarek Vasut * adjust the falling times to decrease the i2c frequency to 50Khz 132cc21ed62SMarek Vasut * because the LCD module does not work at the standard 100Khz 133cc21ed62SMarek Vasut */ 134cc21ed62SMarek Vasut clock-frequency = <100000>; 135cc21ed62SMarek Vasut i2c-sda-falling-time-ns = <6000>; 136cc21ed62SMarek Vasut i2c-scl-falling-time-ns = <6000>; 137cc21ed62SMarek Vasut 138cc21ed62SMarek Vasut eeprom@51 { 139cc21ed62SMarek Vasut compatible = "atmel,24c32"; 140cc21ed62SMarek Vasut reg = <0x51>; 141cc21ed62SMarek Vasut pagesize = <32>; 142cc21ed62SMarek Vasut }; 143cc21ed62SMarek Vasut 144cc21ed62SMarek Vasut rtc@68 { 145cc21ed62SMarek Vasut compatible = "dallas,ds1339"; 146cc21ed62SMarek Vasut reg = <0x68>; 147cc21ed62SMarek Vasut }; 148cc21ed62SMarek Vasut 149cc21ed62SMarek Vasut ltc@5c { 150cc21ed62SMarek Vasut compatible = "ltc2977"; 151cc21ed62SMarek Vasut reg = <0x5c>; 152cc21ed62SMarek Vasut }; 153cc21ed62SMarek Vasut}; 154cc21ed62SMarek Vasut 155cc21ed62SMarek Vasut&uart1 { 156cc21ed62SMarek Vasut clock-frequency = <50000000>; 157cc21ed62SMarek Vasut u-boot,dm-pre-reloc; 158cc21ed62SMarek Vasut status = "okay"; 159cc21ed62SMarek Vasut}; 160cc21ed62SMarek Vasut 161cc21ed62SMarek Vasut&usb0 { 162cc21ed62SMarek Vasut status = "okay"; 163cc21ed62SMarek Vasut disable-over-current; 164cc21ed62SMarek Vasut}; 165cc21ed62SMarek Vasut 166cc21ed62SMarek Vasut&watchdog1 { 167cc21ed62SMarek Vasut status = "okay"; 168cc21ed62SMarek Vasut}; 169