xref: /openbmc/u-boot/arch/arm/dts/s900.dtsi (revision 1b5f4dc9)
1// SPDX-License-Identifier: GPL-2.0+
2//
3// Device Tree Source for Actions Semi S900 SoC
4//
5// Copyright (C) 2015 Actions Semi Co., Ltd.
6// Copyright (C) 2018 Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
7
8/dts-v1/;
9#include <dt-bindings/clock/s900_cmu.h>
10
11/ {
12	compatible = "actions,s900";
13	#address-cells = <0x2>;
14	#size-cells = <0x2>;
15
16	losc: losc {
17		compatible = "fixed-clock";
18		clock-frequency = <32768>;
19		#clock-cells = <0>;
20	};
21
22	diff24M: diff24M {
23		compatible = "fixed-clock";
24		clock-frequency = <24000000>;
25		#clock-cells = <0>;
26	};
27
28	soc {
29		u-boot,dm-pre-reloc;
30		compatible = "simple-bus";
31		#address-cells = <0x2>;
32		#size-cells = <0x2>;
33		ranges;
34
35		uart5: serial@e012a000 {
36			u-boot,dm-pre-reloc;
37			compatible = "actions,s900-serial";
38			reg = <0x0 0xe012a000 0x0 0x1000>;
39			clocks = <&cmu CLOCK_UART5>;
40			status = "disabled";
41		};
42
43		cmu: clock-controller@e0160000 {
44			u-boot,dm-pre-reloc;
45			compatible = "actions,s900-cmu";
46			reg = <0x0 0xe0160000 0x0 0x1000>;
47			clocks = <&losc>, <&diff24M>;
48			clock-names = "losc", "diff24M";
49			#clock-cells = <1>;
50		};
51	};
52};
53
54