1*2d1951feSAndy Yan/* 2*2d1951feSAndy Yan * (C) Copyright 2016 Rockchip Electronics Co., Ltd 3*2d1951feSAndy Yan * 4*2d1951feSAndy Yan * SPDX-License-Identifier: GPL-2.0+ 5*2d1951feSAndy Yan */ 6*2d1951feSAndy Yan 7*2d1951feSAndy Yan/dts-v1/; 8*2d1951feSAndy Yan 9*2d1951feSAndy Yan#include "rv1108.dtsi" 10*2d1951feSAndy Yan 11*2d1951feSAndy Yan/ { 12*2d1951feSAndy Yan model = "Rockchip RV1108 Evaluation board"; 13*2d1951feSAndy Yan compatible = "rockchip,rv1108-evb", "rockchip,rv1108"; 14*2d1951feSAndy Yan 15*2d1951feSAndy Yan memory@60000000 { 16*2d1951feSAndy Yan device_type = "memory"; 17*2d1951feSAndy Yan reg = <0x60000000 0x08000000>; 18*2d1951feSAndy Yan }; 19*2d1951feSAndy Yan 20*2d1951feSAndy Yan chosen { 21*2d1951feSAndy Yan stdout-path = "serial2:1500000n8"; 22*2d1951feSAndy Yan }; 23*2d1951feSAndy Yan}; 24*2d1951feSAndy Yan 25*2d1951feSAndy Yan&gmac { 26*2d1951feSAndy Yan status = "okay"; 27*2d1951feSAndy Yan clock_in_out = <0>; 28*2d1951feSAndy Yan snps,reset-active-low; 29*2d1951feSAndy Yan snps,reset-delays-us = <0 10000 1000000>; 30*2d1951feSAndy Yan snps,reset-gpio = <&gpio1 RK_PC1 GPIO_ACTIVE_LOW>; 31*2d1951feSAndy Yan}; 32*2d1951feSAndy Yan 33*2d1951feSAndy Yan&sfc { 34*2d1951feSAndy Yan status = "okay"; 35*2d1951feSAndy Yan flash@0 { 36*2d1951feSAndy Yan compatible = "gd25q256","spi-flash"; 37*2d1951feSAndy Yan reg = <0>; 38*2d1951feSAndy Yan spi-tx-bus-width = <1>; 39*2d1951feSAndy Yan spi-rx-bus-width = <1>; 40*2d1951feSAndy Yan spi-max-frequency = <96000000>; 41*2d1951feSAndy Yan }; 42*2d1951feSAndy Yan}; 43*2d1951feSAndy Yan 44*2d1951feSAndy Yan&uart0 { 45*2d1951feSAndy Yan status = "okay"; 46*2d1951feSAndy Yan}; 47*2d1951feSAndy Yan 48*2d1951feSAndy Yan&uart1 { 49*2d1951feSAndy Yan status = "okay"; 50*2d1951feSAndy Yan}; 51*2d1951feSAndy Yan 52*2d1951feSAndy Yan&uart2 { 53*2d1951feSAndy Yan status = "okay"; 54*2d1951feSAndy Yan}; 55