1/* 2 * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH 3 * 4 * SPDX-License-Identifier: GPL-2.0+ X11 5 */ 6 7#include <dt-bindings/pwm/pwm.h> 8#include "rk3399.dtsi" 9 10/ { 11 model = "Theobroma Systems RK3399-Q7 SoM"; 12 compatible = "tsd,rk3399-q7", "tsd,puma", "rockchip,rk3399"; 13 14 config { 15 u-boot,spl-payload-offset = <0x40000>; /* @ 256KB */ 16 u-boot,mmc-env-offset = <0x4000>; /* @ 16KB */ 17 u-boot,efi-partition-entries-offset = <0x200000>; /* 2MB */ 18 u-boot,boot-led = "module_led"; 19 }; 20 21 chosen { 22 stdout-path = "serial0:115200n8"; 23 u-boot,spl-boot-order = &spiflash, &sdhci, &sdmmc; 24 }; 25 26 aliases { 27 spi0 = &spi1; 28 spi1 = &spi5; 29 }; 30 31 leds { 32 compatible = "gpio-leds"; 33 pinctrl-names = "default"; 34 pinctrl-0 = <&leds_pins_puma>; 35 36 module_led { 37 label = "module_led"; 38 gpios = <&gpio2 25 GPIO_ACTIVE_HIGH>; 39 linux,default-trigger = "heartbeat"; 40 }; 41 42 sd_card_led { 43 label = "sd_card_led"; 44 gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; 45 linux,default-trigger = "mmc0"; 46 }; 47 }; 48 49 clkin_gmac: external-gmac-clock { 50 compatible = "fixed-clock"; 51 clock-frequency = <125000000>; 52 clock-output-names = "clkin_gmac"; 53 #clock-cells = <0>; 54 }; 55 56 dw_hdmi_audio: dw-hdmi-audio { 57 status = "enabled"; 58 compatible = "rockchip,dw-hdmi-audio"; 59 #sound-dai-cells = <0>; 60 }; 61 62 hdmi_codec: hdmi-codec { 63 compatible = "simple-audio-card"; 64 simple-audio-card,format = "i2s"; 65 simple-audio-card,mclk-fs = <256>; 66 simple-audio-card,name = "HDMI-CODEC"; 67 68 simple-audio-card,cpu { 69 sound-dai = <&i2s2>; 70 }; 71 72 simple-audio-card,codec { 73 sound-dai = <&hdmi>; 74 }; 75 }; 76 77 hdmi_sound: hdmi-sound { 78 status = "disabled"; 79 compatible = "simple-audio-card"; 80 simple-audio-card,format = "i2s"; 81 simple-audio-card,mclk-fs = <256>; 82 simple-audio-card,name = "rockchip,hdmi"; 83 84 simple-audio-card,cpu { 85 sound-dai = <&i2s2>; 86 }; 87 simple-audio-card,codec { 88 sound-dai = <&hdmi>; 89 }; 90 }; 91 92 vccadc_ref: vccadc-ref { 93 compatible = "regulator-fixed"; 94 regulator-name = "vcc1v8_sys"; 95 regulator-always-on; 96 regulator-boot-on; 97 regulator-min-microvolt = <1800000>; 98 regulator-max-microvolt = <1800000>; 99 }; 100 101 vcc3v3_sys: vcc3v3-sys { 102 compatible = "regulator-fixed"; 103 regulator-name = "vcc3v3_sys"; 104 regulator-always-on; 105 regulator-boot-on; 106 regulator-min-microvolt = <3300000>; 107 regulator-max-microvolt = <3300000>; 108 }; 109 110 vcc5v0_otg: vcc5v0-otg-regulator { 111 compatible = "regulator-fixed"; 112 enable-active-high; 113 gpio = <&gpio0 2 GPIO_ACTIVE_HIGH>; 114 pinctrl-names = "default"; 115 pinctrl-0 = <&otg_vbus_drv>; 116 regulator-name = "vcc5v0_otg"; 117 regulator-always-on; 118 }; 119 120 vcc5v0_host: vcc5v0-host-regulator { 121 compatible = "regulator-fixed"; 122 enable-active-low; 123 gpio = <&gpio4 3 GPIO_ACTIVE_HIGH>; 124 pinctrl-names = "default"; 125 pinctrl-0 = <&host_vbus_drv>; 126 regulator-name = "vcc5v0_host"; 127 regulator-always-on; 128 }; 129 130 vcc5v0_sys: vcc5v0-sys { 131 compatible = "regulator-fixed"; 132 regulator-name = "vcc5v0_sys"; 133 regulator-always-on; 134 regulator-boot-on; 135 regulator-min-microvolt = <5000000>; 136 regulator-max-microvolt = <5000000>; 137 }; 138 139 vcc_phy: vcc-phy-regulator { 140 compatible = "regulator-fixed"; 141 regulator-name = "vcc_phy"; 142 regulator-always-on; 143 regulator-boot-on; 144 }; 145 146 vdd_log: vdd-log { 147 compatible = "pwm-regulator"; 148 pwms = <&pwm2 0 25000 1>; 149 regulator-name = "vdd_log"; 150 regulator-min-microvolt = <800000>; 151 regulator-max-microvolt = <1400000>; 152 regulator-always-on; 153 regulator-boot-on; 154 155 /* for rockchip boot on */ 156 rockchip,pwm_id= <2>; 157 rockchip,pwm_voltage = <1000000>; 158 }; 159}; 160 161&emmc_phy { 162 status = "okay"; 163}; 164 165&gmac { 166 phy-supply = <&vcc_phy>; 167 phy-mode = "rgmii"; 168 clock_in_out = "input"; 169 snps,reset-gpio = <&gpio3 16 GPIO_ACTIVE_LOW>; 170 snps,reset-active-low; 171 snps,reset-delays-us = <2 10000 50000>; 172 assigned-clocks = <&cru SCLK_RMII_SRC>; 173 assigned-clock-parents = <&clkin_gmac>; 174 pinctrl-names = "default"; 175 pinctrl-0 = <&rgmii_pins>; 176 tx_delay = <0x10>; 177 rx_delay = <0x10>; 178 status = "okay"; 179}; 180 181&hdmi { 182 #address-cells = <1>; 183 #size-cells = <0>; 184 #sound-dai-cells = <0>; 185 status = "okay"; 186}; 187 188&i2c0 { 189 status = "okay"; 190 i2c-scl-rising-time-ns = <168>; 191 i2c-scl-falling-time-ns = <4>; 192 clock-frequency = <400000>; 193 194 vdd_gpu: fan535555@60 { 195 compatible = "fcs,fan53555"; 196 reg = <0x60>; 197 vsel-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>; 198 vin-supply = <&vcc5v0_sys>; 199 regulator-compatible = "fan53555-reg"; 200 regulator-name = "vdd_gpu"; 201 regulator-min-microvolt = <600000>; 202 regulator-max-microvolt = <1230000>; 203 regulator-ramp-delay = <1000>; 204 fcs,suspend-voltage-selector = <1>; 205 regulator-always-on; 206 regulator-boot-on; 207 regulator-initial-state = <3>; 208 regulator-state-mem { 209 regulator-off-in-suspend; 210 }; 211 }; 212 213 rk808: pmic@1b { 214 compatible = "rockchip,rk808"; 215 reg = <0x1b>; 216 interrupt-parent = <&gpio1>; 217 interrupts = <22 IRQ_TYPE_LEVEL_LOW>; // TODO check interrupt? 218 pinctrl-names = "default"; 219 pinctrl-0 = <&pmic_int_l>; 220 rockchip,system-power-controller; 221 wakeup-source; 222 #clock-cells = <1>; 223 clock-output-names = "xin32k", "rk808-clkout2"; 224 225 vcc1-supply = <&vcc5v0_sys>; 226 vcc2-supply = <&vcc5v0_sys>; 227 vcc3-supply = <&vcc5v0_sys>; 228 vcc4-supply = <&vcc5v0_sys>; 229 vcc6-supply = <&vcc5v0_sys>; 230 vcc7-supply = <&vcc5v0_sys>; 231 vcc8-supply = <&vcc3v3_sys>; 232 vcc9-supply = <&vcc5v0_sys>; 233 vcc10-supply = <&vcc5v0_sys>; 234 vcc11-supply = <&vcc5v0_sys>; 235 vcc12-supply = <&vcc3v3_sys>; 236 vddio-supply = <&vcc1v8_pmu>; 237 238 regulators { 239 vdd_center: DCDC_REG1 { 240 regulator-always-on; 241 regulator-boot-on; 242 regulator-min-microvolt = <750000>; 243 regulator-max-microvolt = <1350000>; 244 regulator-ramp-delay = <6001>; 245 regulator-name = "vdd_center"; 246 regulator-state-mem { 247 regulator-off-in-suspend; 248 }; 249 }; 250 251 vdd_cpu_l: DCDC_REG2 { 252 regulator-always-on; 253 regulator-boot-on; 254 regulator-min-microvolt = <750000>; 255 regulator-max-microvolt = <1350000>; 256 regulator-ramp-delay = <6001>; 257 regulator-name = "vdd_cpu_l"; 258 regulator-state-mem { 259 regulator-off-in-suspend; 260 }; 261 }; 262 263 vcc_ddr: DCDC_REG3 { 264 regulator-always-on; 265 regulator-boot-on; 266 regulator-name = "vcc_ddr"; 267 regulator-state-mem { 268 regulator-on-in-suspend; 269 }; 270 }; 271 272 vcc_1v8: DCDC_REG4 { 273 regulator-always-on; 274 regulator-boot-on; 275 regulator-min-microvolt = <1800000>; 276 regulator-max-microvolt = <1800000>; 277 regulator-name = "vcc_1v8"; 278 regulator-state-mem { 279 regulator-on-in-suspend; 280 regulator-suspend-microvolt = <1800000>; 281 }; 282 }; 283 284 vcc_ldo1: LDO_REG1 { 285 regulator-boot-on; 286 regulator-min-microvolt = <1800000>; 287 regulator-max-microvolt = <1800000>; 288 regulator-name = "vcc_ldo1"; 289 regulator-state-mem { 290 regulator-off-in-suspend; 291 }; 292 }; 293 294 vcc1v8_hdmi: LDO_REG2 { 295 regulator-always-on; 296 regulator-boot-on; 297 regulator-min-microvolt = <1800000>; 298 regulator-max-microvolt = <1800000>; 299 regulator-name = "vcc1v8_hdmi"; 300 regulator-state-mem { 301 regulator-off-in-suspend; 302 }; 303 }; 304 305 vcc1v8_pmu: LDO_REG3 { 306 regulator-always-on; 307 regulator-boot-on; 308 regulator-min-microvolt = <1800000>; 309 regulator-max-microvolt = <1800000>; 310 regulator-name = "vcc1v8_pmu"; 311 regulator-state-mem { 312 regulator-on-in-suspend; 313 regulator-suspend-microvolt = <1800000>; 314 }; 315 }; 316 317 vcc_sd: LDO_REG4 { 318 regulator-always-on; 319 regulator-boot-on; 320 regulator-min-microvolt = <1800000>; 321 regulator-max-microvolt = <3300000>; 322 regulator-name = "vcc_sd"; 323 regulator-state-mem { 324 regulator-on-in-suspend; 325 regulator-suspend-microvolt = <3300000>; 326 }; 327 }; 328 329 vcc_ldo5: LDO_REG5 { 330 regulator-boot-on; 331 regulator-min-microvolt = <3000000>; 332 regulator-max-microvolt = <3000000>; 333 regulator-name = "vcc_ldo5"; 334 regulator-state-mem { 335 regulator-off-in-suspend; 336 }; 337 }; 338 339 vcc_ldo6: LDO_REG6 { 340 regulator-boot-on; 341 regulator-min-microvolt = <1500000>; 342 regulator-max-microvolt = <1500000>; 343 regulator-name = "vcc_ldo6"; 344 regulator-state-mem { 345 regulator-off-in-suspend; 346 }; 347 }; 348 349 vcc0v9_hdmi: LDO_REG7 { 350 regulator-always-on; 351 regulator-boot-on; 352 regulator-min-microvolt = <900000>; 353 regulator-max-microvolt = <900000>; 354 regulator-name = "vcc0v9_hdmi"; 355 regulator-state-mem { 356 regulator-off-in-suspend; 357 }; 358 }; 359 360 vcc_efuse: LDO_REG8 { 361 regulator-always-on; 362 regulator-boot-on; 363 regulator-min-microvolt = <1800000>; 364 regulator-max-microvolt = <1800000>; 365 regulator-name = "vcc_efuse"; 366 regulator-state-mem { 367 regulator-off-in-suspend; 368 }; 369 }; 370 371 vcc3v3_s3: SWITCH_REG1 { 372 regulator-always-on; 373 regulator-boot-on; 374 regulator-name = "vcc3v3_s3"; 375 regulator-state-mem { 376 regulator-off-in-suspend; 377 }; 378 }; 379 380 vcc3v3_s0: SWITCH_REG2 { 381 regulator-always-on; 382 regulator-boot-on; 383 regulator-name = "vcc3v3_s0"; 384 regulator-state-mem { 385 regulator-off-in-suspend; 386 }; 387 }; 388 }; 389 }; 390}; 391 392&i2c8 { 393 status = "okay"; 394 clock-frequency = <400000>; 395 396 vdd_cpu_b: fan53555@60 { 397 compatible = "fcs,fan53555"; 398 reg = <0x60>; 399 vsel-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>; 400 vin-supply = <&vcc5v0_sys>; 401 regulator-compatible = "fan53555-reg"; 402 regulator-name = "vdd_cpu_b"; 403 regulator-min-microvolt = <600000>; 404 regulator-max-microvolt = <1230000>; 405 regulator-ramp-delay = <1000>; 406 fcs,suspend-voltage-selector = <1>; 407 regulator-always-on; 408 regulator-boot-on; 409 regulator-initial-state = <3>; 410 regulator-state-mem { 411 regulator-off-in-suspend; 412 }; 413 }; 414}; 415 416&i2s0 { 417 status = "okay"; 418 rockchip,i2s-broken-burst-len; 419 rockchip,playback-channels = <8>; 420 rockchip,capture-channels = <8>; 421 #sound-dai-cells = <0>; 422}; 423 424&i2s2 { 425 #sound-dai-cells = <0>; 426 status = "okay"; 427}; 428 429&io_domains { 430 status = "okay"; 431 432 bt656-supply = <&vcc_1v8>; /* bt656_gpio2ab_ms */ 433 audio-supply = <&vcc_1v8>; /* audio_gpio3d4a_ms */ 434 sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */ 435 gpio1830-supply = <&vcc_1v8>; /* gpio1833_gpio4cd_ms */ 436}; 437 438&pcie0 { 439 assigned-clocks = <&cru SCLK_PCIEPHY_REF>; 440 assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>; 441 assigned-clock-rates = <100000000>; 442 ep-gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>; 443 num-lanes = <4>; 444 pinctrl-names = "default"; 445 pinctrl-0 = <&pcie_clkreqn>; 446 status = "okay"; 447}; 448 449&pcie_phy { 450 status = "okay"; 451}; 452 453&pmu_io_domains { 454 status = "okay"; 455 pmu1830-supply = <&vcc_1v8>; 456}; 457 458&pwm0 { 459 status = "okay"; 460}; 461 462&pwm2 { 463 status = "okay"; 464}; 465 466&sdhci { 467 bus-width = <8>; 468 mmc-hs400-1_8v; 469 supports-emmc; 470 non-removable; 471 keep-power-in-suspend; 472 mmc-hs400-enhanced-strobe; 473 status = "okay"; 474}; 475 476&sdmmc { 477 u-boot,dm-pre-reloc; 478 clock-frequency = <150000000>; 479 clock-freq-min-max = <100000 150000000>; 480 supports-sd; 481 bus-width = <4>; 482 cap-mmc-highspeed; 483 cap-sd-highspeed; 484 disable-wp; 485 num-slots = <1>; 486 vqmmc-supply = <&vcc_sd>; 487 pinctrl-names = "default"; 488 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; 489 status = "okay"; 490}; 491 492&uart2 { 493 status = "okay"; 494}; 495 496&usb_host0_ehci { 497 status = "okay"; 498}; 499 500&usb_host0_ohci { 501 status = "okay"; 502}; 503 504&dwc3_typec0 { 505 status = "disabled"; 506}; 507 508&usb_host1_ehci { 509 status = "okay"; 510}; 511 512&usb_host1_ohci { 513 status = "okay"; 514}; 515 516&dwc3_typec1 { 517 rockchip,vbus-gpio = <&gpio4 3 GPIO_ACTIVE_LOW>; 518 status = "okay"; 519}; 520 521&vopb { 522 status = "okay"; 523}; 524 525&pinctrl { 526 /* Pins that are not explicitely used by any devices */ 527 pinctrl-names = "default"; 528 pinctrl-0 = <&puma_pin_hog>; 529 hog { 530 puma_pin_hog: puma_pin_hog { 531 rockchip,pins = 532 /* We need pull-ups on Q7 buttons */ 533 <0 4 RK_FUNC_GPIO &pcfg_pull_up>, /* LID_BTN# */ 534 <0 10 RK_FUNC_GPIO &pcfg_pull_up>, /* BATLOW# */ 535 <0 11 RK_FUNC_GPIO &pcfg_pull_up>, /* SLP_BTN# */ 536 <0 9 RK_FUNC_GPIO &pcfg_pull_up>; /* BIOS_DISABLE# */ 537 }; 538 }; 539 540 pmic { 541 pmic_int_l: pmic-int-l { 542 rockchip,pins = 543 <1 22 RK_FUNC_GPIO &pcfg_pull_up>; 544 }; 545 }; 546 547 leds_pins_puma: led_pins@0 { 548 rockchip,pins = 549 <2 25 RK_FUNC_GPIO &pcfg_pull_none>, 550 <1 2 RK_FUNC_GPIO &pcfg_pull_none>; 551 }; 552 553 usb2 { 554 otg_vbus_drv: otg-vbus-drv { 555 rockchip,pins = 556 <0 2 RK_FUNC_GPIO &pcfg_pull_none>; 557 }; 558 559 host_vbus_drv: host-vbus-drv { 560 rockchip,pins = 561 <0 2 RK_FUNC_GPIO &pcfg_pull_none>; 562 }; 563 }; 564 565 i2c8 { 566 i2c8_xfer_a: i2c8-xfer { 567 rockchip,pins = <1 21 RK_FUNC_1 &pcfg_pull_up>, 568 <1 20 RK_FUNC_1 &pcfg_pull_up>; 569 }; 570 }; 571}; 572 573&i2c1 { 574 status = "okay"; 575 clock-frequency = <400000>; 576}; 577&i2c2 { 578 status = "okay"; 579 clock-frequency = <400000>; 580}; 581&i2c4 { 582 status = "okay"; 583 clock-frequency = <400000>; 584}; 585&i2c6 { 586 status = "okay"; 587 clock-frequency = <400000>; 588}; 589 590&i2c6_xfer { 591 /* Enable pull-ups, the pins would float otherwise. */ 592 rockchip,pins = 593 <2 10 RK_FUNC_2 &pcfg_pull_up>, 594 <2 9 RK_FUNC_2 &pcfg_pull_up>; 595}; 596 597&i2c7 { 598 status = "okay"; 599 clock-frequency = <400000>; 600 601 rtc_twi: rtc@6f { 602 compatible = "isil,isl1208"; 603 reg = <0x6f>; 604 }; 605 fan: fan@18 { 606 compatible = "ti,amc6821"; 607 reg = <0x18>; 608 cooling-min-state = <0>; 609 cooling-max-state = <9>; 610 #cooling-cells = <2>; 611 }; 612}; 613 614&uart0 { 615 u-boot,dm-pre-reloc; 616 pinctrl-names = "default"; 617 pinctrl-0 = <&uart0_xfer &uart0_cts>; 618 status = "okay"; 619}; 620 621 622&spi1 { 623 u-boot,dm-pre-reloc; 624 625 status = "okay"; 626 627 #address-cells = <1>; 628 #size-cells = <0>; 629 630 spiflash: w25q32dw@0 { 631 u-boot,dm-pre-reloc; 632 633 compatible = "spi-flash"; 634 reg = <0>; 635 spi-max-frequency = <49500000>; 636 spi-cpol; 637 spi-cpha; 638 }; 639}; 640 641&spi5 { 642 status = "okay"; 643}; 644 645