xref: /openbmc/u-boot/arch/arm/dts/rk3399-evb.dts (revision ef64e782)
1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * (C) Copyright 2016 Rockchip Electronics Co., Ltd
4 */
5
6/dts-v1/;
7#include <dt-bindings/pwm/pwm.h>
8#include <dt-bindings/pinctrl/rockchip.h>
9#include "rk3399.dtsi"
10#include "rk3399-sdram-lpddr3-4GB-1600.dtsi"
11
12/ {
13	model = "Rockchip RK3399 Evaluation Board";
14	compatible = "rockchip,rk3399-evb", "rockchip,rk3399",
15		     "google,rk3399evb-rev2";
16
17	chosen {
18		stdout-path = &uart2;
19		u-boot,spl-boot-order = \
20			&sdhci, &sdmmc;
21	};
22
23	vdd_center: vdd-center {
24		compatible = "pwm-regulator";
25		pwms = <&pwm3 0 25000 1>;
26		regulator-name = "vdd_center";
27		regulator-min-microvolt = <800000>;
28		regulator-max-microvolt = <1400000>;
29		regulator-init-microvolt = <950000>;
30		regulator-always-on;
31		regulator-boot-on;
32		status = "okay";
33	};
34
35	vccsys: vccsys {
36		compatible = "regulator-fixed";
37		regulator-name = "vccsys";
38		regulator-boot-on;
39		regulator-always-on;
40	};
41
42	vcc3v3_sys: vcc3v3-sys {
43		compatible = "regulator-fixed";
44		regulator-name = "vcc3v3_sys";
45		regulator-always-on;
46		regulator-boot-on;
47		regulator-min-microvolt = <3300000>;
48		regulator-max-microvolt = <3300000>;
49	};
50
51	vcc_phy: vcc-phy-regulator {
52		compatible = "regulator-fixed";
53		regulator-name = "vcc_phy";
54		regulator-always-on;
55		regulator-boot-on;
56	};
57
58	vcc5v0_host: vcc5v0-host-en {
59		compatible = "regulator-fixed";
60		regulator-name = "vcc5v0_host";
61		gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
62	};
63
64	vcc5v0_typec0: vcc5v0-typec0-en {
65		compatible = "regulator-fixed";
66		regulator-name = "vcc5v0_typec0";
67		gpio = <&gpio1 3 GPIO_ACTIVE_HIGH>;
68	};
69
70	vcc5v0_typec1: vcc5v0-typec1-en {
71		compatible = "regulator-fixed";
72		regulator-name = "vcc5v0_typec1";
73		gpio = <&gpio1 4 GPIO_ACTIVE_HIGH>;
74	};
75
76	clkin_gmac: external-gmac-clock {
77		compatible = "fixed-clock";
78		clock-frequency = <125000000>;
79		clock-output-names = "clkin_gmac";
80		#clock-cells = <0>;
81	};
82
83	backlight: backlight {
84		compatible = "pwm-backlight";
85		power-supply = <&vccsys>;
86		enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
87		brightness-levels = <
88			  0   1   2   3   4   5   6   7
89			  8   9  10  11  12  13  14  15
90			 16  17  18  19  20  21  22  23
91			 24  25  26  27  28  29  30  31
92			 32  33  34  35  36  37  38  39
93			 40  41  42  43  44  45  46  47
94			 48  49  50  51  52  53  54  55
95			 56  57  58  59  60  61  62  63
96			 64  65  66  67  68  69  70  71
97			 72  73  74  75  76  77  78  79
98			 80  81  82  83  84  85  86  87
99			 88  89  90  91  92  93  94  95
100			 96  97  98  99 100 101 102 103
101			104 105 106 107 108 109 110 111
102			112 113 114 115 116 117 118 119
103			120 121 122 123 124 125 126 127
104			128 129 130 131 132 133 134 135
105			136 137 138 139 140 141 142 143
106			144 145 146 147 148 149 150 151
107			152 153 154 155 156 157 158 159
108			160 161 162 163 164 165 166 167
109			168 169 170 171 172 173 174 175
110			176 177 178 179 180 181 182 183
111			184 185 186 187 188 189 190 191
112			192 193 194 195 196 197 198 199
113			200 201 202 203 204 205 206 207
114			208 209 210 211 212 213 214 215
115			216 217 218 219 220 221 222 223
116			224 225 226 227 228 229 230 231
117			232 233 234 235 236 237 238 239
118			240 241 242 243 244 245 246 247
119			248 249 250 251 252 253 254 255>;
120		default-brightness-level = <200>;
121		pwms = <&pwm0 0 25000 0>;
122		pinctrl-names = "default";
123		pinctrl-0 = <&pwm0_pin>;
124		pwm-delay-us = <10000>;
125		status = "disabled";
126	};
127
128	panel:panel {
129		compatible = "simple-panel";
130		power-supply = <&vcc33_lcd>;
131		backlight = <&backlight>;
132		/*enable-gpios = <&gpio4 18 GPIO_ACTIVE_HIGH>;*/
133		status = "disabled";
134	};
135};
136
137&emmc_phy {
138	status = "okay";
139};
140
141&pwm0 {
142	status = "okay";
143};
144
145&pwm2 {
146	status = "okay";
147};
148
149&pwm3 {
150	status = "okay";
151};
152
153&saradc {
154	status = "okay";
155};
156
157&sdmmc {
158	u-boot,dm-pre-reloc;
159	bus-width = <4>;
160	status = "okay";
161};
162
163&sdhci {
164	bus-width = <8>;
165	mmc-hs400-1_8v;
166	mmc-hs400-enhanced-strobe;
167	non-removable;
168	status = "okay";
169};
170
171&uart2 {
172	status = "okay";
173};
174
175&usb_host0_ehci {
176	status = "okay";
177};
178
179&usb_host0_ohci {
180	status = "okay";
181};
182
183&dwc3_typec0 {
184	vbus-supply = <&vcc5v0_typec0>;
185	status = "okay";
186};
187
188&usb_host1_ehci {
189	status = "okay";
190};
191
192&usb_host1_ohci {
193	status = "okay";
194};
195
196&dwc3_typec1 {
197	vbus-supply = <&vcc5v0_typec1>;
198	status = "okay";
199};
200
201&i2c0 {
202	status = "okay";
203	clock-frequency = <400000>;
204	i2c-scl-falling-time-ns = <50>;
205	i2c-scl-rising-time-ns = <100>;
206	u-boot,dm-pre-reloc;
207
208	rk808: pmic@1b {
209		compatible = "rockchip,rk808";
210		clock-output-names = "xin32k", "wifibt_32kin";
211		interrupt-parent = <&gpio0>;
212		interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
213		pinctrl-names = "default";
214		pinctrl-0 = <&pmic_int_l>;
215		reg = <0x1b>;
216		rockchip,system-power-controller;
217		#clock-cells = <1>;
218		u-boot,dm-pre-reloc;
219		status = "okay";
220
221		vcc12-supply = <&vcc3v3_sys>;
222
223		regulators {
224			vcc33_lcd: SWITCH_REG2 {
225				regulator-always-on;
226				regulator-boot-on;
227				regulator-name = "vcc33_lcd";
228			};
229		};
230	};
231};
232
233&mipi_dsi {
234	status = "disabled";
235	rockchip,panel = <&panel>;
236	display-timings {
237		timing0 {
238		bits-per-pixel = <24>;
239		clock-frequency = <160000000>;
240		hfront-porch = <120>;
241		hsync-len = <20>;
242		hback-porch = <21>;
243		hactive = <1200>;
244		vfront-porch = <21>;
245		vsync-len = <3>;
246		vback-porch = <18>;
247		vactive = <1920>;
248		hsync-active = <0>;
249		vsync-active = <0>;
250		de-active = <1>;
251		pixelclk-active = <0>;
252		};
253	};
254};
255
256&pinctrl {
257	pmic {
258		pmic_int_l: pmic-int-l {
259			rockchip,pins =
260				<1 21 RK_FUNC_GPIO &pcfg_pull_up>;
261		};
262
263		pmic_dvs2: pmic-dvs2 {
264			rockchip,pins =
265				<1 18 RK_FUNC_GPIO &pcfg_pull_down>;
266		};
267	};
268};
269
270&gmac {
271        phy-supply = <&vcc_phy>;
272	phy-mode = "rgmii";
273	clock_in_out = "input";
274	snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
275	snps,reset-active-low;
276	snps,reset-delays-us = <0 10000 50000>;
277	assigned-clocks = <&cru SCLK_RMII_SRC>;
278	assigned-clock-parents = <&clkin_gmac>;
279	pinctrl-names = "default";
280	pinctrl-0 = <&rgmii_pins>;
281	tx_delay = <0x28>;
282	rx_delay = <0x11>;
283	status = "okay";
284};
285