xref: /openbmc/u-boot/arch/arm/dts/rk3399-evb.dts (revision d77af8a8)
1/*
2 * (C) Copyright 2016 Rockchip Electronics Co., Ltd
3 *
4 * SPDX-License-Identifier:     GPL-2.0+
5 */
6
7/dts-v1/;
8#include <dt-bindings/pwm/pwm.h>
9#include <dt-bindings/pinctrl/rockchip.h>
10#include "rk3399.dtsi"
11#include "rk3399-sdram-lpddr3-4GB-1600.dtsi"
12
13/ {
14	model = "Rockchip RK3399 Evaluation Board";
15	compatible = "rockchip,rk3399-evb", "rockchip,rk3399",
16		     "google,rk3399evb-rev2";
17
18	chosen {
19		stdout-path = &uart2;
20	};
21
22	vdd_center: vdd-center {
23		compatible = "pwm-regulator";
24		pwms = <&pwm3 0 25000 1>;
25		regulator-name = "vdd_center";
26		regulator-min-microvolt = <800000>;
27		regulator-max-microvolt = <1400000>;
28		regulator-init-microvolt = <950000>;
29		regulator-always-on;
30		regulator-boot-on;
31		status = "okay";
32	};
33
34	vccsys: vccsys {
35		compatible = "regulator-fixed";
36		regulator-name = "vccsys";
37		regulator-boot-on;
38		regulator-always-on;
39	};
40
41	vcc3v3_sys: vcc3v3-sys {
42		compatible = "regulator-fixed";
43		regulator-name = "vcc3v3_sys";
44		regulator-always-on;
45		regulator-boot-on;
46		regulator-min-microvolt = <3300000>;
47		regulator-max-microvolt = <3300000>;
48	};
49
50	vcc_phy: vcc-phy-regulator {
51		compatible = "regulator-fixed";
52		regulator-name = "vcc_phy";
53		regulator-always-on;
54		regulator-boot-on;
55	};
56
57	vcc5v0_host: vcc5v0-host-en {
58		compatible = "regulator-fixed";
59		regulator-name = "vcc5v0_host";
60		gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
61	};
62
63	clkin_gmac: external-gmac-clock {
64		compatible = "fixed-clock";
65		clock-frequency = <125000000>;
66		clock-output-names = "clkin_gmac";
67		#clock-cells = <0>;
68	};
69};
70
71&emmc_phy {
72	status = "okay";
73};
74
75&pwm0 {
76	status = "okay";
77};
78
79&pwm2 {
80	status = "okay";
81};
82
83&pwm3 {
84	status = "okay";
85};
86
87&sdmmc {
88	bus-width = <4>;
89	status = "okay";
90};
91
92&sdhci {
93	bus-width = <8>;
94	mmc-hs400-1_8v;
95	mmc-hs400-enhanced-strobe;
96	non-removable;
97	status = "okay";
98};
99
100&uart2 {
101	status = "okay";
102};
103
104&usb_host0_ehci {
105	status = "okay";
106};
107
108&usb_host0_ohci {
109	status = "okay";
110};
111
112&dwc3_typec0 {
113	rockchip,vbus-gpio = <&gpio1 3 GPIO_ACTIVE_HIGH>;
114	status = "okay";
115};
116
117&usb_host1_ehci {
118	status = "okay";
119};
120
121&usb_host1_ohci {
122	status = "okay";
123};
124
125&dwc3_typec1 {
126	rockchip,vbus-gpio = <&gpio1 4 GPIO_ACTIVE_HIGH>;
127	status = "okay";
128};
129
130&i2c0 {
131	status = "okay";
132	clock-frequency = <400000>;
133	i2c-scl-falling-time-ns = <50>;
134	i2c-scl-rising-time-ns = <100>;
135	u-boot,dm-pre-reloc;
136
137	rk808: pmic@1b {
138		compatible = "rockchip,rk808";
139		clock-output-names = "xin32k", "wifibt_32kin";
140		interrupt-parent = <&gpio0>;
141		interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
142		pinctrl-names = "default";
143		pinctrl-0 = <&pmic_int_l>;
144		reg = <0x1b>;
145		rockchip,system-power-controller;
146		#clock-cells = <1>;
147		u-boot,dm-pre-reloc;
148		status = "okay";
149
150		vcc12-supply = <&vcc3v3_sys>;
151		regulators {
152			vcc33_lcd: SWITCH_REG2 {
153				regulator-always-on;
154				regulator-boot-on;
155				regulator-name = "vcc33_lcd";
156			};
157		};
158	};
159};
160
161&pinctrl {
162	pmic {
163		pmic_int_l: pmic-int-l {
164			rockchip,pins =
165				<1 21 RK_FUNC_GPIO &pcfg_pull_up>;
166		};
167
168		pmic_dvs2: pmic-dvs2 {
169			rockchip,pins =
170				<1 18 RK_FUNC_GPIO &pcfg_pull_down>;
171		};
172	};
173};
174
175&gmac {
176        phy-supply = <&vcc_phy>;
177	phy-mode = "rgmii";
178	clock_in_out = "input";
179	snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
180	snps,reset-active-low;
181	snps,reset-delays-us = <0 10000 50000>;
182	assigned-clocks = <&cru SCLK_RMII_SRC>;
183	assigned-clock-parents = <&clkin_gmac>;
184	pinctrl-names = "default";
185	pinctrl-0 = <&rgmii_pins>;
186	tx_delay = <0x10>;
187	rx_delay = <0x10>;
188	status = "okay";
189};
190
191&gmac {
192        phy-supply = <&vcc_phy>;
193	phy-mode = "rgmii";
194	clock_in_out = "input";
195	snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
196	snps,reset-active-low;
197	snps,reset-delays-us = <0 10000 50000>;
198	assigned-clocks = <&cru SCLK_RMII_SRC>;
199	assigned-clock-parents = <&clkin_gmac>;
200	pinctrl-names = "default";
201	pinctrl-0 = <&rgmii_pins>;
202	tx_delay = <0x10>;
203	rx_delay = <0x10>;
204	status = "okay";
205};
206