1/* 2 * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH 3 * 4 * SPDX-License-Identifier: GPL-2.0+ X11 5 */ 6 7/dts-v1/; 8#include "rk3368.dtsi" 9#include "rk3368-lion-u-boot.dtsi" 10#include <dt-bindings/input/input.h> 11 12/ { 13 model = "Theobroma Systems RK3368-uQ7 SoM"; 14 compatible = "tsd,rk3368-uq7", "tsd,lion", "rockchip,rk3368"; 15 16 aliases { 17 mmc0 = &emmc; 18 mmc1 = &sdmmc; 19 }; 20 21 memory@0 { 22 device_type = "memory"; 23 reg = <0x0 0x0 0x0 0x80000000>; 24 }; 25 26 ext_gmac: gmac-clk { 27 compatible = "fixed-clock"; 28 clock-frequency = <125000000>; 29 clock-output-names = "ext_gmac"; 30 #clock-cells = <0>; 31 }; 32 33 vcc_sys: vcc-sys-regulator { 34 compatible = "regulator-fixed"; 35 regulator-name = "vcc_sys"; 36 regulator-min-microvolt = <5000000>; 37 regulator-max-microvolt = <5000000>; 38 regulator-always-on; 39 regulator-boot-on; 40 }; 41}; 42 43&uart0 { 44 status = "okay"; 45}; 46 47&emmc { 48 status = "okay"; 49 bus-width = <8>; 50 cap-mmc-highspeed; 51 clock-frequency = <150000000>; 52 disable-wp; 53 keep-power-in-suspend; 54 non-removable; 55 num-slots = <1>; 56 vmmc-supply = <&vcc33_io>; 57 vqmmc-supply = <&vcc18_io>; 58 pinctrl-names = "default"; 59 pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_bus8>; 60}; 61 62&sdmmc { 63 status = "okay"; 64}; 65 66&gmac { 67 status = "okay"; 68 phy-supply = <&vcc33_io>; 69 phy-mode = "rgmii"; 70 clock_in_out = "input"; 71 snps,reset-gpio = <&gpio3 11 GPIO_ACTIVE_LOW>; 72 snps,reset-active-low; 73 snps,reset-delays-us = <2 10000 50000>; 74 assigned-clocks = <&cru SCLK_MAC>; 75 assigned-clock-parents = <&ext_gmac>; 76 pinctrl-names = "default"; 77 pinctrl-0 = <&rgmii_pins>; 78 tx_delay = <0x10>; 79 rx_delay = <0x10>; 80}; 81 82&i2c0 { 83 status = "okay"; 84 85 rk808: pmic@1b { 86 compatible = "rockchip,rk808"; 87 reg = <0x1b>; 88 interrupt-parent = <&gpio0>; 89 interrupts = <5 IRQ_TYPE_LEVEL_LOW>; 90 rockchip,system-power-controller; 91 vcc1-supply = <&vcc_sys>; 92 vcc2-supply = <&vcc_sys>; 93 vcc3-supply = <&vcc_sys>; 94 vcc4-supply = <&vcc_sys>; 95 vcc6-supply = <&vcc_sys>; 96 vcc7-supply = <&vcc_sys>; 97 vcc8-supply = <&vcc_sys>; 98 vcc9-supply = <&vcc_sys>; 99 vcc10-supply = <&vcc_sys>; 100 vcc11-supply = <&vcc_sys>; 101 vcc12-supply = <&vcc_sys>; 102 clock-output-names = "xin32k", "rk808-clkout2"; 103 #clock-cells = <1>; 104 105 regulators { 106 vdd_cpu: DCDC_REG1 { 107 regulator-always-on; 108 regulator-boot-on; 109 regulator-min-microvolt = <700000>; 110 regulator-max-microvolt = <1500000>; 111 regulator-name = "vdd_cpu"; 112 }; 113 114 vdd_log: DCDC_REG2 { 115 regulator-always-on; 116 regulator-boot-on; 117 regulator-min-microvolt = <700000>; 118 regulator-max-microvolt = <1500000>; 119 regulator-name = "vdd_log"; 120 }; 121 122 vcc_ddr: DCDC_REG3 { 123 regulator-always-on; 124 regulator-boot-on; 125 regulator-name = "vcc_ddr"; 126 }; 127 128 vcc33_io: DCDC_REG4 { 129 regulator-always-on; 130 regulator-boot-on; 131 regulator-min-microvolt = <3300000>; 132 regulator-max-microvolt = <3300000>; 133 regulator-name = "vcc33_io"; 134 }; 135 136 vcc33_video: LDO_REG2 { 137 regulator-always-on; 138 regulator-boot-on; 139 regulator-min-microvolt = <3300000>; 140 regulator-max-microvolt = <3300000>; 141 regulator-name = "vcc33_video"; 142 }; 143 144 vdd10_pll: LDO_REG3 { 145 regulator-always-on; 146 regulator-boot-on; 147 regulator-min-microvolt = <1000000>; 148 regulator-max-microvolt = <1000000>; 149 regulator-name = "vdd10_pll"; 150 }; 151 152 vcc18_io: LDO_REG4 { 153 regulator-boot-on; 154 regulator-min-microvolt = <1800000>; 155 regulator-max-microvolt = <1800000>; 156 regulator-name = "vcc18_io"; 157 }; 158 159 vdd10_video: LDO_REG6 { 160 regulator-always-on; 161 regulator-boot-on; 162 regulator-min-microvolt = <1000000>; 163 regulator-max-microvolt = <1000000>; 164 regulator-name = "vdd10_video"; 165 }; 166 167 vcc18_video: LDO_REG8 { 168 regulator-always-on; 169 regulator-boot-on; 170 regulator-min-microvolt = <1800000>; 171 regulator-max-microvolt = <1800000>; 172 regulator-name = "vcc18_video"; 173 }; 174 }; 175 }; 176}; 177 178&uart0 { 179 status = "okay"; 180}; 181 182&spi1 { 183 status = "okay"; 184 185 #address-cells = <1>; 186 #size-cells = <0>; 187 188 spiflash: w25q32dw@0 { 189 compatible = "spi-flash"; 190 reg = <0>; 191 spi-max-frequency = <49500000>; 192 spi-cpol; 193 spi-cpha; 194 }; 195}; 196