14d02d206SPhilipp Tomsich/* 24d02d206SPhilipp Tomsich * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH 34d02d206SPhilipp Tomsich * 44d02d206SPhilipp Tomsich * SPDX-License-Identifier: GPL-2.0+ X11 54d02d206SPhilipp Tomsich */ 64d02d206SPhilipp Tomsich 74d02d206SPhilipp Tomsich/ { 84d02d206SPhilipp Tomsich config { 94d02d206SPhilipp Tomsich u-boot,spl-payload-offset = <0x40000>; /* @ 256KB */ 104d02d206SPhilipp Tomsich u-boot,mmc-env-offset = <0x4000>; /* @ 16KB */ 114d02d206SPhilipp Tomsich }; 124d02d206SPhilipp Tomsich 134d02d206SPhilipp Tomsich chosen { 144d02d206SPhilipp Tomsich stdout-path = "serial0:115200n8"; 154d02d206SPhilipp Tomsich u-boot,spl-boot-order = &emmc, &sdmmc; 164d02d206SPhilipp Tomsich }; 174d02d206SPhilipp Tomsich 184d02d206SPhilipp Tomsich}; 194d02d206SPhilipp Tomsich 204d02d206SPhilipp Tomsich&pinctrl { 214d02d206SPhilipp Tomsich u-boot,dm-pre-reloc; 224d02d206SPhilipp Tomsich}; 234d02d206SPhilipp Tomsich 244d02d206SPhilipp Tomsich&service_msch { 254d02d206SPhilipp Tomsich u-boot,dm-pre-reloc; 264d02d206SPhilipp Tomsich}; 274d02d206SPhilipp Tomsich 284d02d206SPhilipp Tomsich&dmc { 294d02d206SPhilipp Tomsich u-boot,dm-pre-reloc; 304d02d206SPhilipp Tomsich 314d02d206SPhilipp Tomsich /* 324d02d206SPhilipp Tomsich * Validation of throughput using SPEC2000 shows the following 334d02d206SPhilipp Tomsich * relative performance for the different memory schedules: 344d02d206SPhilipp Tomsich * - CBDR: 30.1 354d02d206SPhilipp Tomsich * - CBRD: 29.8 364d02d206SPhilipp Tomsich * - CRBD: 29.9 374d02d206SPhilipp Tomsich * Note that the best performance for any given application workload 384d02d206SPhilipp Tomsich * may vary from the default configured here (e.g. 164.gzip is fastest 394d02d206SPhilipp Tomsich * with CBRD, whereas 252.eon and 186.crafty are fastest with CRBD). 404d02d206SPhilipp Tomsich * 414d02d206SPhilipp Tomsich * See doc/device-tree-bindings/clock/rockchip,rk3368-dmc.txt for 424d02d206SPhilipp Tomsich * details on the 'rockchip,memory-schedule' property and how it 434d02d206SPhilipp Tomsich * affects the physical-address to device-address mapping. 444d02d206SPhilipp Tomsich */ 454d02d206SPhilipp Tomsich rockchip,memory-schedule = <DMC_MSCH_CBDR>; 464d02d206SPhilipp Tomsich rockchip,ddr-frequency = <800000000>; 474d02d206SPhilipp Tomsich rockchip,ddr-speed-bin = <DDR3_1600K>; 484d02d206SPhilipp Tomsich 494d02d206SPhilipp Tomsich status = "okay"; 504d02d206SPhilipp Tomsich}; 514d02d206SPhilipp Tomsich 524d02d206SPhilipp Tomsich&pmugrf { 534d02d206SPhilipp Tomsich u-boot,dm-pre-reloc; 544d02d206SPhilipp Tomsich}; 554d02d206SPhilipp Tomsich 564d02d206SPhilipp Tomsich&sgrf { 574d02d206SPhilipp Tomsich u-boot,dm-pre-reloc; 584d02d206SPhilipp Tomsich}; 594d02d206SPhilipp Tomsich 604d02d206SPhilipp Tomsich&cru { 614d02d206SPhilipp Tomsich u-boot,dm-pre-reloc; 624d02d206SPhilipp Tomsich}; 634d02d206SPhilipp Tomsich 644d02d206SPhilipp Tomsich&grf { 654d02d206SPhilipp Tomsich u-boot,dm-pre-reloc; 664d02d206SPhilipp Tomsich}; 674d02d206SPhilipp Tomsich 684d02d206SPhilipp Tomsich&uart0 { 694d02d206SPhilipp Tomsich u-boot,dm-pre-reloc; 704d02d206SPhilipp Tomsich}; 714d02d206SPhilipp Tomsich 724d02d206SPhilipp Tomsich&emmc { 734d02d206SPhilipp Tomsich u-boot,dm-pre-reloc; 744d02d206SPhilipp Tomsich}; 754d02d206SPhilipp Tomsich 764d02d206SPhilipp Tomsich&sdmmc { 774d02d206SPhilipp Tomsich u-boot,dm-pre-reloc; 784d02d206SPhilipp Tomsich}; 794d02d206SPhilipp Tomsich 804d02d206SPhilipp Tomsich&spi1 { 814d02d206SPhilipp Tomsich u-boot,dm-pre-reloc; 824d02d206SPhilipp Tomsich 834d02d206SPhilipp Tomsich spiflash: w25q32dw@0 { 844d02d206SPhilipp Tomsich u-boot,dm-pre-reloc; 854d02d206SPhilipp Tomsich }; 864d02d206SPhilipp Tomsich}; 874d02d206SPhilipp Tomsich 88*bc824cc0SPhilipp Tomsich&timer0 { 89*bc824cc0SPhilipp Tomsich u-boot,dm-pre-reloc; 90*bc824cc0SPhilipp Tomsich clock-frequency = <24000000>; 91*bc824cc0SPhilipp Tomsich}; 92*bc824cc0SPhilipp Tomsich 934d02d206SPhilipp Tomsich 94