1e94ffee3SKever Yang/* 2e94ffee3SKever Yang * (C) Copyright 2016 Rockchip Electronics Co., Ltd 3e94ffee3SKever Yang * 4e94ffee3SKever Yang * SPDX-License-Identifier: GPL-2.0+ 5e94ffee3SKever Yang */ 6e94ffee3SKever Yang 7e94ffee3SKever Yang/dts-v1/; 8e94ffee3SKever Yang#include "rk3328.dtsi" 9e94ffee3SKever Yang 10e94ffee3SKever Yang/ { 11e94ffee3SKever Yang model = "Rockchip RK3328 EVB"; 12e94ffee3SKever Yang compatible = "rockchip,rk3328-evb", "rockchip,rk3328"; 13e94ffee3SKever Yang 14e94ffee3SKever Yang chosen { 15e94ffee3SKever Yang stdout-path = &uart2; 16e94ffee3SKever Yang }; 17296bd19eSMeng Dongyang 18*c132f38dSDavid Wu gmac_clkin: external-gmac-clock { 19*c132f38dSDavid Wu compatible = "fixed-clock"; 20*c132f38dSDavid Wu clock-frequency = <125000000>; 21*c132f38dSDavid Wu clock-output-names = "gmac_clkin"; 22*c132f38dSDavid Wu #clock-cells = <0>; 23*c132f38dSDavid Wu }; 24*c132f38dSDavid Wu 25df813322SKever Yang vcc3v3_sdmmc: sdmmc-pwren { 26df813322SKever Yang compatible = "regulator-fixed"; 27df813322SKever Yang regulator-name = "vcc3v3"; 28df813322SKever Yang gpio = <&gpio0 30 GPIO_ACTIVE_LOW>; 29df813322SKever Yang regulator-always-on; 30df813322SKever Yang regulator-boot-on; 31df813322SKever Yang }; 32df813322SKever Yang 33863456adSMeng Dongyang vcc5v0_otg: vcc5v0-otg-drv { 34863456adSMeng Dongyang compatible = "regulator-fixed"; 35863456adSMeng Dongyang enable-active-high; 36863456adSMeng Dongyang regulator-name = "vcc5v0_otg"; 37863456adSMeng Dongyang gpio = <&gpio0 27 GPIO_ACTIVE_HIGH>; 38863456adSMeng Dongyang regulator-min-microvolt = <5000000>; 39863456adSMeng Dongyang regulator-max-microvolt = <5000000>; 40863456adSMeng Dongyang }; 41863456adSMeng Dongyang 42296bd19eSMeng Dongyang vcc5v0_host_xhci: vcc5v0-host-xhci-drv { 43296bd19eSMeng Dongyang compatible = "regulator-fixed"; 44296bd19eSMeng Dongyang enable-active-high; 45296bd19eSMeng Dongyang regulator-name = "vcc5v0_host_xhci"; 46296bd19eSMeng Dongyang gpio = <&gpio0 0 GPIO_ACTIVE_HIGH>; 47296bd19eSMeng Dongyang regulator-min-microvolt = <5000000>; 48296bd19eSMeng Dongyang regulator-max-microvolt = <5000000>; 49296bd19eSMeng Dongyang }; 50*c132f38dSDavid Wu 51*c132f38dSDavid Wu vcc_phy: vcc-phy-regulator { 52*c132f38dSDavid Wu compatible = "regulator-fixed"; 53*c132f38dSDavid Wu regulator-name = "vcc_phy"; 54*c132f38dSDavid Wu regulator-always-on; 55*c132f38dSDavid Wu regulator-boot-on; 56*c132f38dSDavid Wu }; 57e94ffee3SKever Yang}; 58e94ffee3SKever Yang 59f957dec6SDavid Wu&saradc { 60f957dec6SDavid Wu status = "okay"; 61f957dec6SDavid Wu}; 62f957dec6SDavid Wu 63e94ffee3SKever Yang&uart2 { 64e94ffee3SKever Yang status = "okay"; 65e94ffee3SKever Yang}; 66e94ffee3SKever Yang 67e94ffee3SKever Yang&sdmmc { 68e94ffee3SKever Yang bus-width = <4>; 69e94ffee3SKever Yang cap-mmc-highspeed; 70e94ffee3SKever Yang cap-sd-highspeed; 71e94ffee3SKever Yang card-detect-delay = <200>; 72e94ffee3SKever Yang disable-wp; 73e94ffee3SKever Yang num-slots = <1>; 74e94ffee3SKever Yang pinctrl-names = "default"; 75e94ffee3SKever Yang pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_dectn>, <&sdmmc0_bus4>; 76e94ffee3SKever Yang status = "okay"; 77e94ffee3SKever Yang}; 78e94ffee3SKever Yang 79e94ffee3SKever Yang&emmc { 80e94ffee3SKever Yang bus-width = <8>; 81e94ffee3SKever Yang cap-mmc-highspeed; 82e94ffee3SKever Yang supports-emmc; 83e94ffee3SKever Yang disable-wp; 84e94ffee3SKever Yang non-removable; 85e94ffee3SKever Yang num-slots = <1>; 86e94ffee3SKever Yang pinctrl-names = "default"; 87e94ffee3SKever Yang pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>; 88e94ffee3SKever Yang status = "okay"; 89e94ffee3SKever Yang}; 90ef82a0dbSMeng Dongyang 91*c132f38dSDavid Wu&gmac2io { 92*c132f38dSDavid Wu phy-supply = <&vcc_phy>; 93*c132f38dSDavid Wu phy-mode = "rgmii"; 94*c132f38dSDavid Wu clock_in_out = "input"; 95*c132f38dSDavid Wu snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; 96*c132f38dSDavid Wu snps,reset-active-low; 97*c132f38dSDavid Wu snps,reset-delays-us = <0 10000 50000>; 98*c132f38dSDavid Wu assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; 99*c132f38dSDavid Wu assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>; 100*c132f38dSDavid Wu pinctrl-names = "default"; 101*c132f38dSDavid Wu pinctrl-0 = <&rgmiim1_pins>; 102*c132f38dSDavid Wu tx_delay = <0x26>; 103*c132f38dSDavid Wu rx_delay = <0x11>; 104*c132f38dSDavid Wu status = "okay"; 105*c132f38dSDavid Wu}; 106*c132f38dSDavid Wu 107ef82a0dbSMeng Dongyang&usb_host0_ehci { 108ef82a0dbSMeng Dongyang status = "okay"; 109ef82a0dbSMeng Dongyang}; 110ef82a0dbSMeng Dongyang 111ef82a0dbSMeng Dongyang&usb_host0_ohci { 112ef82a0dbSMeng Dongyang status = "okay"; 113ef82a0dbSMeng Dongyang}; 11475ff918fSMeng Dongyang 115863456adSMeng Dongyang&usb20_otg { 116863456adSMeng Dongyang vbus-supply = <&vcc5v0_otg>; 117863456adSMeng Dongyang status = "okay"; 118863456adSMeng Dongyang}; 119863456adSMeng Dongyang 12075ff918fSMeng Dongyang&usb_host0_xhci { 121296bd19eSMeng Dongyang vbus-supply = <&vcc5v0_host_xhci>; 12275ff918fSMeng Dongyang status = "okay"; 12375ff918fSMeng Dongyang}; 124f9674f5eSElaine Zhang 125f9674f5eSElaine Zhang&i2c1 { 126f9674f5eSElaine Zhang clock-frequency = <400000>; 127f9674f5eSElaine Zhang i2c-scl-rising-time-ns = <168>; 128f9674f5eSElaine Zhang i2c-scl-falling-time-ns = <4>; 129f9674f5eSElaine Zhang status = "okay"; 130f9674f5eSElaine Zhang 131f9674f5eSElaine Zhang rk805: pmic@18 { 132f9674f5eSElaine Zhang compatible = "rockchip,rk805"; 133f9674f5eSElaine Zhang status = "okay"; 134f9674f5eSElaine Zhang reg = <0x18>; 135f9674f5eSElaine Zhang interrupt-parent = <&gpio2>; 136f9674f5eSElaine Zhang interrupts = <6 IRQ_TYPE_LEVEL_LOW>; 137f9674f5eSElaine Zhang pinctrl-names = "default"; 138f9674f5eSElaine Zhang pinctrl-0 = <&pmic_int_l>; 139f9674f5eSElaine Zhang rockchip,system-power-controller; 140f9674f5eSElaine Zhang wakeup-source; 141f9674f5eSElaine Zhang gpio-controller; 142f9674f5eSElaine Zhang #gpio-cells = <2>; 143f9674f5eSElaine Zhang #clock-cells = <1>; 144f9674f5eSElaine Zhang clock-output-names = "xin32k", "rk805-clkout2"; 145f9674f5eSElaine Zhang 146f9674f5eSElaine Zhang regulators { 147f9674f5eSElaine Zhang vdd_logic: DCDC_REG1 { 148f9674f5eSElaine Zhang regulator-name = "vdd_logic"; 149f9674f5eSElaine Zhang regulator-min-microvolt = <712500>; 150f9674f5eSElaine Zhang regulator-max-microvolt = <1450000>; 151f9674f5eSElaine Zhang regulator-ramp-delay = <6001>; 152f9674f5eSElaine Zhang regulator-boot-on; 153f9674f5eSElaine Zhang regulator-always-on; 154f9674f5eSElaine Zhang regulator-state-mem { 155f9674f5eSElaine Zhang regulator-on-in-suspend; 156f9674f5eSElaine Zhang regulator-suspend-microvolt = <1000000>; 157f9674f5eSElaine Zhang }; 158f9674f5eSElaine Zhang }; 159f9674f5eSElaine Zhang 160f9674f5eSElaine Zhang vdd_arm: DCDC_REG2 { 161f9674f5eSElaine Zhang regulator-name = "vdd_arm"; 162f9674f5eSElaine Zhang regulator-min-microvolt = <712500>; 163f9674f5eSElaine Zhang regulator-max-microvolt = <1450000>; 164f9674f5eSElaine Zhang regulator-ramp-delay = <6001>; 165f9674f5eSElaine Zhang regulator-boot-on; 166f9674f5eSElaine Zhang regulator-always-on; 167f9674f5eSElaine Zhang regulator-state-mem { 168f9674f5eSElaine Zhang regulator-on-in-suspend; 169f9674f5eSElaine Zhang regulator-suspend-microvolt = <1000000>; 170f9674f5eSElaine Zhang }; 171f9674f5eSElaine Zhang }; 172f9674f5eSElaine Zhang 173f9674f5eSElaine Zhang vcc_ddr: DCDC_REG3 { 174f9674f5eSElaine Zhang regulator-name = "vcc_ddr"; 175f9674f5eSElaine Zhang regulator-boot-on; 176f9674f5eSElaine Zhang regulator-always-on; 177f9674f5eSElaine Zhang regulator-state-mem { 178f9674f5eSElaine Zhang regulator-on-in-suspend; 179f9674f5eSElaine Zhang }; 180f9674f5eSElaine Zhang }; 181f9674f5eSElaine Zhang 182f9674f5eSElaine Zhang vcc_io: DCDC_REG4 { 183f9674f5eSElaine Zhang regulator-name = "vcc_io"; 184f9674f5eSElaine Zhang regulator-min-microvolt = <3300000>; 185f9674f5eSElaine Zhang regulator-max-microvolt = <3300000>; 186f9674f5eSElaine Zhang regulator-boot-on; 187f9674f5eSElaine Zhang regulator-always-on; 188f9674f5eSElaine Zhang regulator-state-mem { 189f9674f5eSElaine Zhang regulator-on-in-suspend; 190f9674f5eSElaine Zhang regulator-suspend-microvolt = <3300000>; 191f9674f5eSElaine Zhang }; 192f9674f5eSElaine Zhang }; 193f9674f5eSElaine Zhang 194f9674f5eSElaine Zhang vdd_18: LDO_REG1 { 195f9674f5eSElaine Zhang regulator-name = "vdd_18"; 196f9674f5eSElaine Zhang regulator-min-microvolt = <1800000>; 197f9674f5eSElaine Zhang regulator-max-microvolt = <1800000>; 198f9674f5eSElaine Zhang regulator-boot-on; 199f9674f5eSElaine Zhang regulator-always-on; 200f9674f5eSElaine Zhang regulator-state-mem { 201f9674f5eSElaine Zhang regulator-on-in-suspend; 202f9674f5eSElaine Zhang regulator-suspend-microvolt = <1800000>; 203f9674f5eSElaine Zhang }; 204f9674f5eSElaine Zhang }; 205f9674f5eSElaine Zhang 206f9674f5eSElaine Zhang vcc_18emmc: LDO_REG2 { 207f9674f5eSElaine Zhang regulator-name = "vcc_18emmc"; 208f9674f5eSElaine Zhang regulator-min-microvolt = <1800000>; 209f9674f5eSElaine Zhang regulator-max-microvolt = <1800000>; 210f9674f5eSElaine Zhang regulator-boot-on; 211f9674f5eSElaine Zhang regulator-always-on; 212f9674f5eSElaine Zhang regulator-state-mem { 213f9674f5eSElaine Zhang regulator-on-in-suspend; 214f9674f5eSElaine Zhang regulator-suspend-microvolt = <1800000>; 215f9674f5eSElaine Zhang }; 216f9674f5eSElaine Zhang }; 217f9674f5eSElaine Zhang 218f9674f5eSElaine Zhang vdd_10: LDO_REG3 { 219f9674f5eSElaine Zhang regulator-name = "vdd_10"; 220f9674f5eSElaine Zhang regulator-min-microvolt = <1000000>; 221f9674f5eSElaine Zhang regulator-max-microvolt = <1000000>; 222f9674f5eSElaine Zhang regulator-boot-on; 223f9674f5eSElaine Zhang regulator-always-on; 224f9674f5eSElaine Zhang regulator-state-mem { 225f9674f5eSElaine Zhang regulator-on-in-suspend; 226f9674f5eSElaine Zhang regulator-suspend-microvolt = <1000000>; 227f9674f5eSElaine Zhang }; 228f9674f5eSElaine Zhang }; 229f9674f5eSElaine Zhang }; 230f9674f5eSElaine Zhang }; 231f9674f5eSElaine Zhang}; 232f9674f5eSElaine Zhang 233f9674f5eSElaine Zhang&pinctrl { 234f9674f5eSElaine Zhang pmic { 235f9674f5eSElaine Zhang pmic_int_l: pmic-int-l { 236f9674f5eSElaine Zhang rockchip,pins = 237f9674f5eSElaine Zhang <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>; /* gpio2_a6 */ 238f9674f5eSElaine Zhang }; 239f9674f5eSElaine Zhang }; 240f9674f5eSElaine Zhang}; 241f9674f5eSElaine Zhang 242