1/* 2 * Google Veyron (and derivatives) board device tree source 3 * 4 * Copyright 2014 Google, Inc 5 * 6 * SPDX-License-Identifier: GPL-2.0 7 */ 8 9#include <dt-bindings/clock/rockchip,rk808.h> 10#include <dt-bindings/input/input.h> 11#include "rk3288-veyron.dtsi" 12 13/ { 14 aliases { 15 i2c20 = &i2c_tunnel; 16 }; 17 18 gpio_keys: gpio-keys { 19 pinctrl-0 = <&pwr_key_h &ap_lid_int_l>; 20 lid { 21 label = "Lid"; 22 gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; 23 linux,code = <0>; /* SW_LID */ 24 linux,input-type = <5>; /* EV_SW */ 25 debounce-interval = <1>; 26 gpio-key,wakeup; 27 }; 28 }; 29 30 gpio-charger { 31 compatible = "gpio-charger"; 32 gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>; 33 pinctrl-names = "default"; 34 pinctrl-0 = <&ac_present_ap>; 35 charger-type = "mains"; 36 }; 37 38 /* A non-regulated voltage from power supply or battery */ 39 vccsys: vccsys { 40 compatible = "regulator-fixed"; 41 regulator-name = "vccsys"; 42 regulator-boot-on; 43 regulator-always-on; 44 }; 45 46 vcc33_sys: vcc33-sys { 47 vin-supply = <&vccsys>; 48 }; 49 50 vcc_5v: vcc-5v { 51 vin-supply = <&vccsys>; 52 }; 53 54 /* This turns on vbus for host1 (dwc2) */ 55 vcc5_host1: vcc5-host1-regulator { 56 compatible = "regulator-fixed"; 57 enable-active-high; 58 gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>; 59 pinctrl-names = "default"; 60 pinctrl-0 = <&host1_pwr_en>; 61 regulator-name = "vcc5_host1"; 62 regulator-always-on; 63 regulator-boot-on; 64 }; 65 66 /* This turns on vbus for otg for host mode (dwc2) */ 67 vcc5v_otg: vcc5v-otg-regulator { 68 compatible = "regulator-fixed"; 69 enable-active-high; 70 gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>; 71 pinctrl-names = "default"; 72 pinctrl-0 = <&usbotg_pwren_h>; 73 regulator-name = "vcc5_host2"; 74 regulator-always-on; 75 regulator-boot-on; 76 }; 77}; 78 79&rk808 { 80 regulators { 81 vcc33_ccd: LDO_REG8 { 82 regulator-always-on; 83 regulator-boot-on; 84 regulator-min-microvolt = <3300000>; 85 regulator-max-microvolt = <3300000>; 86 regulator-name = "vcc33_ccd"; 87 regulator-suspend-mem-disabled; 88 }; 89 }; 90}; 91 92&spi0 { 93 status = "okay"; 94 95 cros_ec: ec@0 { 96 compatible = "google,cros-ec-spi"; 97 spi-max-frequency = <3000000>; 98 interrupt-parent = <&gpio7>; 99 interrupts = <7 IRQ_TYPE_LEVEL_LOW>; 100 pinctrl-names = "default"; 101 pinctrl-0 = <&ec_int>; 102 reg = <0>; 103 google,cros-ec-spi-pre-delay = <30>; 104 105 i2c_tunnel: i2c-tunnel { 106 compatible = "google,cros-ec-i2c-tunnel"; 107 google,remote-bus = <0>; 108 #address-cells = <1>; 109 #size-cells = <0>; 110 }; 111 }; 112}; 113 114&i2c4 { 115 trackpad@15 { 116 compatible = "elan,i2c_touchpad"; 117 interrupt-parent = <&gpio7>; 118 interrupts = <3 IRQ_TYPE_EDGE_FALLING>; 119 pinctrl-names = "default"; 120 pinctrl-0 = <&trackpad_int>; 121 reg = <0x15>; 122 vcc-supply = <&vcc33_io>; 123 wakeup-source; 124 }; 125}; 126 127&pinctrl { 128 pinctrl-0 = < 129 /* Common for sleep and wake, but no owners */ 130 &ddr0_retention 131 &ddrio_pwroff 132 &global_pwroff 133 134 /* Wake only */ 135 &suspend_l_wake 136 &bt_dev_wake_awake 137 >; 138 pinctrl-1 = < 139 /* Common for sleep and wake, but no owners */ 140 &ddr0_retention 141 &ddrio_pwroff 142 &global_pwroff 143 144 /* Sleep only */ 145 &suspend_l_sleep 146 &bt_dev_wake_sleep 147 >; 148 149 buttons { 150 ap_lid_int_l: ap-lid-int-l { 151 rockchip,pins = <0 6 RK_FUNC_GPIO &pcfg_pull_up>; 152 }; 153 }; 154 155 charger { 156 ac_present_ap: ac-present-ap { 157 rockchip,pins = <0 8 RK_FUNC_GPIO &pcfg_pull_up>; 158 }; 159 }; 160 161 cros-ec { 162 ec_int: ec-int { 163 rockchip,pins = <7 7 RK_FUNC_GPIO &pcfg_pull_none>; 164 }; 165 }; 166 167 sdmmc { 168 sdmmc_wp_gpio: sdmmc-wp-gpio { 169 rockchip,pins = <7 10 RK_FUNC_GPIO &pcfg_pull_up>; 170 }; 171 }; 172 173 suspend { 174 suspend_l_wake: suspend-l-wake { 175 rockchip,pins = <0 17 RK_FUNC_GPIO &pcfg_output_low>; 176 }; 177 178 suspend_l_sleep: suspend-l-sleep { 179 rockchip,pins = <0 17 RK_FUNC_GPIO &pcfg_output_high>; 180 }; 181 }; 182 183 trackpad { 184 trackpad_int: trackpad-int { 185 rockchip,pins = <7 3 RK_FUNC_GPIO &pcfg_pull_up>; 186 }; 187 }; 188 189 usb-host { 190 host1_pwr_en: host1-pwr-en { 191 rockchip,pins = <0 11 RK_FUNC_GPIO &pcfg_pull_none>; 192 }; 193 194 usbotg_pwren_h: usbotg-pwren-h { 195 rockchip,pins = <0 12 RK_FUNC_GPIO &pcfg_pull_none>; 196 }; 197 }; 198}; 199 200#include "cros-ec-keyboard.dtsi" 201