1/* 2 * Device Tree Source for the Draak board 3 * 4 * Copyright (C) 2016 Renesas Electronics Corp. 5 * Copyright (C) 2017 Glider bvba 6 * 7 * SPDX-License-Identifier: GPL-2.0 8 */ 9 10/dts-v1/; 11#include "r8a77995.dtsi" 12#include <dt-bindings/gpio/gpio.h> 13 14/ { 15 model = "Renesas Draak board based on r8a77995"; 16 compatible = "renesas,draak", "renesas,r8a77995"; 17 18 aliases { 19 serial0 = &scif2; 20 ethernet0 = &avb; 21 }; 22 23 chosen { 24 bootargs = "ignore_loglevel"; 25 stdout-path = "serial0:115200n8"; 26 }; 27 28 memory@48000000 { 29 device_type = "memory"; 30 /* first 128MB is reserved for secure area. */ 31 reg = <0x0 0x48000000 0x0 0x18000000>; 32 }; 33}; 34 35&extal_clk { 36 clock-frequency = <48000000>; 37}; 38 39&pfc { 40 avb0_pins: avb { 41 mux { 42 groups = "avb0_link", "avb0_mdc", "avb0_mii"; 43 function = "avb0"; 44 }; 45 }; 46 47 pwm0_pins: pwm0 { 48 groups = "pwm0_c"; 49 function = "pwm0"; 50 }; 51 52 pwm1_pins: pwm1 { 53 groups = "pwm1_c"; 54 function = "pwm1"; 55 }; 56 57 scif2_pins: scif2 { 58 groups = "scif2_data"; 59 function = "scif2"; 60 }; 61 62 usb0_pins: usb0 { 63 groups = "usb0"; 64 function = "usb0"; 65 }; 66}; 67 68&ehci0 { 69 status = "okay"; 70}; 71 72&ohci0 { 73 status = "okay"; 74}; 75 76&avb { 77 pinctrl-0 = <&avb0_pins>; 78 pinctrl-names = "default"; 79 renesas,no-ether-link; 80 phy-handle = <&phy0>; 81 status = "okay"; 82 83 phy0: ethernet-phy@0 { 84 rxc-skew-ps = <1500>; 85 reg = <0>; 86 interrupt-parent = <&gpio5>; 87 interrupts = <19 IRQ_TYPE_LEVEL_LOW>; 88 }; 89}; 90 91&scif2 { 92 pinctrl-0 = <&scif2_pins>; 93 pinctrl-names = "default"; 94 95 status = "okay"; 96}; 97 98&usb2_phy0 { 99 pinctrl-0 = <&usb0_pins>; 100 pinctrl-names = "default"; 101 102 status = "okay"; 103}; 104 105&pwm0 { 106 pinctrl-0 = <&pwm0_pins>; 107 pinctrl-names = "default"; 108 109 status = "okay"; 110}; 111 112&pwm1 { 113 pinctrl-0 = <&pwm1_pins>; 114 pinctrl-names = "default"; 115 116 status = "okay"; 117}; 118 119&rwdt { 120 timeout-sec = <60>; 121 status = "okay"; 122}; 123