xref: /openbmc/u-boot/arch/arm/dts/r8a77995-draak.dts (revision 57efeb04)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the Draak board
4 *
5 * Copyright (C) 2016 Renesas Electronics Corp.
6 * Copyright (C) 2017 Glider bvba
7 */
8
9/dts-v1/;
10#include "r8a77995.dtsi"
11#include <dt-bindings/gpio/gpio.h>
12
13/ {
14	model = "Renesas Draak board based on r8a77995";
15	compatible = "renesas,draak", "renesas,r8a77995";
16
17	aliases {
18		serial0 = &scif2;
19		ethernet0 = &avb;
20	};
21
22	chosen {
23		bootargs = "ignore_loglevel";
24		stdout-path = "serial0:115200n8";
25	};
26
27	vga {
28		compatible = "vga-connector";
29
30		port {
31			vga_in: endpoint {
32				remote-endpoint = <&adv7123_out>;
33			};
34		};
35	};
36
37	vga-encoder {
38		compatible = "adi,adv7123";
39
40		ports {
41			#address-cells = <1>;
42			#size-cells = <0>;
43
44			port@0 {
45				reg = <0>;
46				adv7123_in: endpoint {
47					remote-endpoint = <&du_out_rgb>;
48				};
49			};
50			port@1 {
51				reg = <1>;
52				adv7123_out: endpoint {
53					remote-endpoint = <&vga_in>;
54				};
55			};
56		};
57	};
58
59	composite-in {
60		compatible = "composite-video-connector";
61
62		port {
63			composite_con_in: endpoint {
64				remote-endpoint = <&adv7180_in>;
65			};
66		};
67	};
68
69	hdmi-in {
70		compatible = "hdmi-connector";
71		type = "a";
72
73		port {
74			hdmi_con_in: endpoint {
75				remote-endpoint = <&adv7612_in>;
76			};
77		};
78	};
79
80	memory@48000000 {
81		device_type = "memory";
82		/* first 128MB is reserved for secure area. */
83		reg = <0x0 0x48000000 0x0 0x18000000>;
84	};
85
86	reg_1p8v: regulator0 {
87		compatible = "regulator-fixed";
88		regulator-name = "fixed-1.8V";
89		regulator-min-microvolt = <1800000>;
90		regulator-max-microvolt = <1800000>;
91		regulator-boot-on;
92		regulator-always-on;
93	};
94
95	reg_3p3v: regulator1 {
96		compatible = "regulator-fixed";
97		regulator-name = "fixed-3.3V";
98		regulator-min-microvolt = <3300000>;
99		regulator-max-microvolt = <3300000>;
100		regulator-boot-on;
101		regulator-always-on;
102	};
103
104	x12_clk: x12 {
105		compatible = "fixed-clock";
106		#clock-cells = <0>;
107		clock-frequency = <74250000>;
108	};
109};
110
111&extal_clk {
112	clock-frequency = <48000000>;
113};
114
115&pfc {
116	avb0_pins: avb {
117		mux {
118			groups = "avb0_link", "avb0_mdio", "avb0_mii";
119			function = "avb0";
120		};
121	};
122
123	du_pins: du {
124		groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0";
125		function = "du";
126	};
127
128	i2c0_pins: i2c0 {
129		groups = "i2c0";
130		function = "i2c0";
131	};
132
133	i2c1_pins: i2c1 {
134		groups = "i2c1";
135		function = "i2c1";
136	};
137
138	pwm0_pins: pwm0 {
139		groups = "pwm0_c";
140		function = "pwm0";
141	};
142
143	pwm1_pins: pwm1 {
144		groups = "pwm1_c";
145		function = "pwm1";
146	};
147
148	scif2_pins: scif2 {
149		groups = "scif2_data";
150		function = "scif2";
151	};
152
153	sdhi2_pins: sd2 {
154		groups = "mmc_data8", "mmc_ctrl";
155		function = "mmc";
156		power-source = <1800>;
157	};
158
159	sdhi2_pins_uhs: sd2_uhs {
160		groups = "mmc_data8", "mmc_ctrl";
161		function = "mmc";
162		power-source = <1800>;
163	};
164
165	usb0_pins: usb0 {
166		groups = "usb0";
167		function = "usb0";
168	};
169
170	vin4_pins_cvbs: vin4 {
171		groups = "vin4_data8", "vin4_sync", "vin4_clk";
172		function = "vin4";
173	};
174};
175
176&i2c0 {
177	pinctrl-0 = <&i2c0_pins>;
178	pinctrl-names = "default";
179	status = "okay";
180
181	eeprom@50 {
182		compatible = "rohm,br24t01", "atmel,24c01";
183		reg = <0x50>;
184		pagesize = <8>;
185	};
186
187	composite-in@20 {
188		compatible = "adi,adv7180cp";
189		reg = <0x20>;
190
191		port {
192			#address-cells = <1>;
193			#size-cells = <0>;
194
195			port@0 {
196				reg = <0>;
197				adv7180_in: endpoint {
198					remote-endpoint = <&composite_con_in>;
199				};
200			};
201
202			port@3 {
203				reg = <3>;
204
205				/*
206				 * The VIN4 video input path is shared between
207				 * CVBS and HDMI inputs through SW[49-53]
208				 * switches.
209				 *
210				 * CVBS is the default selection, link it to
211				 * VIN4 here.
212				 */
213				adv7180_out: endpoint {
214					remote-endpoint = <&vin4_in>;
215				};
216			};
217		};
218
219	};
220
221	hdmi-decoder@4c {
222		compatible = "adi,adv7612";
223		reg = <0x4c>;
224		default-input = <0>;
225
226		ports {
227			#address-cells = <1>;
228			#size-cells = <0>;
229
230			port@0 {
231				reg = <0>;
232
233				adv7612_in: endpoint {
234					remote-endpoint = <&hdmi_con_in>;
235				};
236			};
237
238			port@2 {
239				reg = <2>;
240
241				/*
242				 * The VIN4 video input path is shared between
243				 * CVBS and HDMI inputs through SW[49-53]
244				 * switches.
245				 *
246				 * CVBS is the default selection, leave HDMI
247				 * not connected here.
248				 */
249				adv7612_out: endpoint {
250					pclk-sample = <0>;
251					hsync-active = <0>;
252					vsync-active = <0>;
253				};
254			};
255		};
256	};
257};
258
259&i2c1 {
260	pinctrl-0 = <&i2c1_pins>;
261	pinctrl-names = "default";
262	status = "okay";
263};
264
265&du {
266	pinctrl-0 = <&du_pins>;
267	pinctrl-names = "default";
268	status = "okay";
269
270	clocks = <&cpg CPG_MOD 724>,
271		 <&cpg CPG_MOD 723>,
272		 <&x12_clk>;
273	clock-names = "du.0", "du.1", "dclkin.0";
274
275	ports {
276		port@0 {
277			endpoint {
278				remote-endpoint = <&adv7123_in>;
279			};
280		};
281	};
282};
283
284&ehci0 {
285	status = "okay";
286};
287
288&ohci0 {
289	status = "okay";
290};
291
292&avb {
293	pinctrl-0 = <&avb0_pins>;
294	pinctrl-names = "default";
295	renesas,no-ether-link;
296	phy-handle = <&phy0>;
297	phy-mode = "rgmii-txid";
298	status = "okay";
299
300	phy0: ethernet-phy@0 {
301		rxc-skew-ps = <1500>;
302		reg = <0>;
303		interrupt-parent = <&gpio5>;
304		interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
305	};
306};
307
308&scif2 {
309	pinctrl-0 = <&scif2_pins>;
310	pinctrl-names = "default";
311
312	status = "okay";
313};
314
315&sdhi2 {
316	/* used for on-board eMMC */
317	pinctrl-0 = <&sdhi2_pins>;
318	pinctrl-1 = <&sdhi2_pins_uhs>;
319	pinctrl-names = "default", "state_uhs";
320
321	vmmc-supply = <&reg_3p3v>;
322	vqmmc-supply = <&reg_1p8v>;
323	bus-width = <8>;
324	mmc-hs200-1_8v;
325	non-removable;
326	status = "okay";
327};
328
329&usb2_phy0 {
330	pinctrl-0 = <&usb0_pins>;
331	pinctrl-names = "default";
332
333	status = "okay";
334};
335
336&pwm0 {
337	pinctrl-0 = <&pwm0_pins>;
338	pinctrl-names = "default";
339
340	status = "okay";
341};
342
343&pwm1 {
344	pinctrl-0 = <&pwm1_pins>;
345	pinctrl-names = "default";
346
347	status = "okay";
348};
349
350&rwdt {
351	timeout-sec = <60>;
352	status = "okay";
353};
354
355&vin4 {
356	pinctrl-0 = <&vin4_pins_cvbs>;
357	pinctrl-names = "default";
358
359	status = "okay";
360
361	ports {
362		#address-cells = <1>;
363		#size-cells = <0>;
364
365		port@0 {
366			reg = <0>;
367
368			vin4_in: endpoint {
369				remote-endpoint = <&adv7180_out>;
370			};
371		};
372	};
373};
374