1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the Draak board 4 * 5 * Copyright (C) 2016 Renesas Electronics Corp. 6 * Copyright (C) 2017 Glider bvba 7 */ 8 9/dts-v1/; 10#include "r8a77995.dtsi" 11#include <dt-bindings/gpio/gpio.h> 12 13/ { 14 model = "Renesas Draak board based on r8a77995"; 15 compatible = "renesas,draak", "renesas,r8a77995"; 16 17 aliases { 18 serial0 = &scif2; 19 ethernet0 = &avb; 20 }; 21 22 chosen { 23 bootargs = "ignore_loglevel"; 24 stdout-path = "serial0:115200n8"; 25 }; 26 27 memory@48000000 { 28 device_type = "memory"; 29 /* first 128MB is reserved for secure area. */ 30 reg = <0x0 0x48000000 0x0 0x18000000>; 31 }; 32}; 33 34&extal_clk { 35 clock-frequency = <48000000>; 36}; 37 38&pfc { 39 avb0_pins: avb { 40 mux { 41 groups = "avb0_link", "avb0_mdc", "avb0_mii"; 42 function = "avb0"; 43 }; 44 }; 45 46 pwm0_pins: pwm0 { 47 groups = "pwm0_c"; 48 function = "pwm0"; 49 }; 50 51 pwm1_pins: pwm1 { 52 groups = "pwm1_c"; 53 function = "pwm1"; 54 }; 55 56 scif2_pins: scif2 { 57 groups = "scif2_data"; 58 function = "scif2"; 59 }; 60 61 usb0_pins: usb0 { 62 groups = "usb0"; 63 function = "usb0"; 64 }; 65}; 66 67&ehci0 { 68 status = "okay"; 69}; 70 71&ohci0 { 72 status = "okay"; 73}; 74 75&avb { 76 pinctrl-0 = <&avb0_pins>; 77 pinctrl-names = "default"; 78 renesas,no-ether-link; 79 phy-handle = <&phy0>; 80 status = "okay"; 81 82 phy0: ethernet-phy@0 { 83 rxc-skew-ps = <1500>; 84 reg = <0>; 85 interrupt-parent = <&gpio5>; 86 interrupts = <19 IRQ_TYPE_LEVEL_LOW>; 87 }; 88}; 89 90&scif2 { 91 pinctrl-0 = <&scif2_pins>; 92 pinctrl-names = "default"; 93 94 status = "okay"; 95}; 96 97&usb2_phy0 { 98 pinctrl-0 = <&usb0_pins>; 99 pinctrl-names = "default"; 100 101 status = "okay"; 102}; 103 104&pwm0 { 105 pinctrl-0 = <&pwm0_pins>; 106 pinctrl-names = "default"; 107 108 status = "okay"; 109}; 110 111&pwm1 { 112 pinctrl-0 = <&pwm1_pins>; 113 pinctrl-names = "default"; 114 115 status = "okay"; 116}; 117 118&rwdt { 119 timeout-sec = <60>; 120 status = "okay"; 121}; 122