1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the r8a7795 SoC 4 * 5 * Copyright (C) 2015 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/clock/r8a7795-cpg-mssr.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/power/r8a7795-sysc.h> 11 12#define CPG_AUDIO_CLK_I R8A7795_CLK_S0D4 13 14/ { 15 compatible = "renesas,r8a7795"; 16 #address-cells = <2>; 17 #size-cells = <2>; 18 19 aliases { 20 i2c0 = &i2c0; 21 i2c1 = &i2c1; 22 i2c2 = &i2c2; 23 i2c3 = &i2c3; 24 i2c4 = &i2c4; 25 i2c5 = &i2c5; 26 i2c6 = &i2c6; 27 i2c7 = &i2c_dvfs; 28 }; 29 30 /* 31 * The external audio clocks are configured as 0 Hz fixed frequency 32 * clocks by default. 33 * Boards that provide audio clocks should override them. 34 */ 35 audio_clk_a: audio_clk_a { 36 compatible = "fixed-clock"; 37 #clock-cells = <0>; 38 clock-frequency = <0>; 39 }; 40 41 audio_clk_b: audio_clk_b { 42 compatible = "fixed-clock"; 43 #clock-cells = <0>; 44 clock-frequency = <0>; 45 }; 46 47 audio_clk_c: audio_clk_c { 48 compatible = "fixed-clock"; 49 #clock-cells = <0>; 50 clock-frequency = <0>; 51 }; 52 53 /* External CAN clock - to be overridden by boards that provide it */ 54 can_clk: can { 55 compatible = "fixed-clock"; 56 #clock-cells = <0>; 57 clock-frequency = <0>; 58 }; 59 60 cluster0_opp: opp_table0 { 61 compatible = "operating-points-v2"; 62 opp-shared; 63 64 opp-500000000 { 65 opp-hz = /bits/ 64 <500000000>; 66 opp-microvolt = <830000>; 67 clock-latency-ns = <300000>; 68 }; 69 opp-1000000000 { 70 opp-hz = /bits/ 64 <1000000000>; 71 opp-microvolt = <830000>; 72 clock-latency-ns = <300000>; 73 }; 74 opp-1500000000 { 75 opp-hz = /bits/ 64 <1500000000>; 76 opp-microvolt = <830000>; 77 clock-latency-ns = <300000>; 78 opp-suspend; 79 }; 80 opp-1600000000 { 81 opp-hz = /bits/ 64 <1600000000>; 82 opp-microvolt = <900000>; 83 clock-latency-ns = <300000>; 84 turbo-mode; 85 }; 86 opp-1700000000 { 87 opp-hz = /bits/ 64 <1700000000>; 88 opp-microvolt = <960000>; 89 clock-latency-ns = <300000>; 90 turbo-mode; 91 }; 92 }; 93 94 cluster1_opp: opp_table1 { 95 compatible = "operating-points-v2"; 96 opp-shared; 97 98 opp-800000000 { 99 opp-hz = /bits/ 64 <800000000>; 100 opp-microvolt = <820000>; 101 clock-latency-ns = <300000>; 102 }; 103 opp-1000000000 { 104 opp-hz = /bits/ 64 <1000000000>; 105 opp-microvolt = <820000>; 106 clock-latency-ns = <300000>; 107 }; 108 opp-1200000000 { 109 opp-hz = /bits/ 64 <1200000000>; 110 opp-microvolt = <820000>; 111 clock-latency-ns = <300000>; 112 }; 113 }; 114 115 cpus { 116 #address-cells = <1>; 117 #size-cells = <0>; 118 119 a57_0: cpu@0 { 120 compatible = "arm,cortex-a57", "arm,armv8"; 121 reg = <0x0>; 122 device_type = "cpu"; 123 power-domains = <&sysc R8A7795_PD_CA57_CPU0>; 124 next-level-cache = <&L2_CA57>; 125 enable-method = "psci"; 126 clocks =<&cpg CPG_CORE R8A7795_CLK_Z>; 127 operating-points-v2 = <&cluster0_opp>; 128 #cooling-cells = <2>; 129 }; 130 131 a57_1: cpu@1 { 132 compatible = "arm,cortex-a57", "arm,armv8"; 133 reg = <0x1>; 134 device_type = "cpu"; 135 power-domains = <&sysc R8A7795_PD_CA57_CPU1>; 136 next-level-cache = <&L2_CA57>; 137 enable-method = "psci"; 138 clocks =<&cpg CPG_CORE R8A7795_CLK_Z>; 139 operating-points-v2 = <&cluster0_opp>; 140 #cooling-cells = <2>; 141 }; 142 143 a57_2: cpu@2 { 144 compatible = "arm,cortex-a57", "arm,armv8"; 145 reg = <0x2>; 146 device_type = "cpu"; 147 power-domains = <&sysc R8A7795_PD_CA57_CPU2>; 148 next-level-cache = <&L2_CA57>; 149 enable-method = "psci"; 150 clocks =<&cpg CPG_CORE R8A7795_CLK_Z>; 151 operating-points-v2 = <&cluster0_opp>; 152 #cooling-cells = <2>; 153 }; 154 155 a57_3: cpu@3 { 156 compatible = "arm,cortex-a57", "arm,armv8"; 157 reg = <0x3>; 158 device_type = "cpu"; 159 power-domains = <&sysc R8A7795_PD_CA57_CPU3>; 160 next-level-cache = <&L2_CA57>; 161 enable-method = "psci"; 162 clocks =<&cpg CPG_CORE R8A7795_CLK_Z>; 163 operating-points-v2 = <&cluster0_opp>; 164 #cooling-cells = <2>; 165 }; 166 167 a53_0: cpu@100 { 168 compatible = "arm,cortex-a53", "arm,armv8"; 169 reg = <0x100>; 170 device_type = "cpu"; 171 power-domains = <&sysc R8A7795_PD_CA53_CPU0>; 172 next-level-cache = <&L2_CA53>; 173 enable-method = "psci"; 174 clocks =<&cpg CPG_CORE R8A7795_CLK_Z2>; 175 operating-points-v2 = <&cluster1_opp>; 176 }; 177 178 a53_1: cpu@101 { 179 compatible = "arm,cortex-a53", "arm,armv8"; 180 reg = <0x101>; 181 device_type = "cpu"; 182 power-domains = <&sysc R8A7795_PD_CA53_CPU1>; 183 next-level-cache = <&L2_CA53>; 184 enable-method = "psci"; 185 clocks =<&cpg CPG_CORE R8A7795_CLK_Z2>; 186 operating-points-v2 = <&cluster1_opp>; 187 }; 188 189 a53_2: cpu@102 { 190 compatible = "arm,cortex-a53", "arm,armv8"; 191 reg = <0x102>; 192 device_type = "cpu"; 193 power-domains = <&sysc R8A7795_PD_CA53_CPU2>; 194 next-level-cache = <&L2_CA53>; 195 enable-method = "psci"; 196 clocks =<&cpg CPG_CORE R8A7795_CLK_Z2>; 197 operating-points-v2 = <&cluster1_opp>; 198 }; 199 200 a53_3: cpu@103 { 201 compatible = "arm,cortex-a53", "arm,armv8"; 202 reg = <0x103>; 203 device_type = "cpu"; 204 power-domains = <&sysc R8A7795_PD_CA53_CPU3>; 205 next-level-cache = <&L2_CA53>; 206 enable-method = "psci"; 207 clocks =<&cpg CPG_CORE R8A7795_CLK_Z2>; 208 operating-points-v2 = <&cluster1_opp>; 209 }; 210 211 L2_CA57: cache-controller-0 { 212 compatible = "cache"; 213 power-domains = <&sysc R8A7795_PD_CA57_SCU>; 214 cache-unified; 215 cache-level = <2>; 216 }; 217 218 L2_CA53: cache-controller-1 { 219 compatible = "cache"; 220 power-domains = <&sysc R8A7795_PD_CA53_SCU>; 221 cache-unified; 222 cache-level = <2>; 223 }; 224 }; 225 226 extal_clk: extal { 227 compatible = "fixed-clock"; 228 #clock-cells = <0>; 229 /* This value must be overridden by the board */ 230 clock-frequency = <0>; 231 }; 232 233 extalr_clk: extalr { 234 compatible = "fixed-clock"; 235 #clock-cells = <0>; 236 /* This value must be overridden by the board */ 237 clock-frequency = <0>; 238 }; 239 240 /* External PCIe clock - can be overridden by the board */ 241 pcie_bus_clk: pcie_bus { 242 compatible = "fixed-clock"; 243 #clock-cells = <0>; 244 clock-frequency = <0>; 245 }; 246 247 pmu_a53 { 248 compatible = "arm,cortex-a53-pmu"; 249 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, 250 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, 251 <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, 252 <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; 253 interrupt-affinity = <&a53_0>, 254 <&a53_1>, 255 <&a53_2>, 256 <&a53_3>; 257 }; 258 259 pmu_a57 { 260 compatible = "arm,cortex-a57-pmu"; 261 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, 262 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>, 263 <&gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>, 264 <&gic GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; 265 interrupt-affinity = <&a57_0>, 266 <&a57_1>, 267 <&a57_2>, 268 <&a57_3>; 269 }; 270 271 psci { 272 compatible = "arm,psci-1.0", "arm,psci-0.2"; 273 method = "smc"; 274 }; 275 276 /* External SCIF clock - to be overridden by boards that provide it */ 277 scif_clk: scif { 278 compatible = "fixed-clock"; 279 #clock-cells = <0>; 280 clock-frequency = <0>; 281 }; 282 283 soc: soc { 284 compatible = "simple-bus"; 285 interrupt-parent = <&gic>; 286 287 #address-cells = <2>; 288 #size-cells = <2>; 289 ranges; 290 291 rwdt: watchdog@e6020000 { 292 compatible = "renesas,r8a7795-wdt", "renesas,rcar-gen3-wdt"; 293 reg = <0 0xe6020000 0 0x0c>; 294 clocks = <&cpg CPG_MOD 402>; 295 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 296 resets = <&cpg 402>; 297 status = "disabled"; 298 }; 299 300 gpio0: gpio@e6050000 { 301 compatible = "renesas,gpio-r8a7795", 302 "renesas,rcar-gen3-gpio"; 303 reg = <0 0xe6050000 0 0x50>; 304 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 305 #gpio-cells = <2>; 306 gpio-controller; 307 gpio-ranges = <&pfc 0 0 16>; 308 #interrupt-cells = <2>; 309 interrupt-controller; 310 clocks = <&cpg CPG_MOD 912>; 311 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 312 resets = <&cpg 912>; 313 }; 314 315 gpio1: gpio@e6051000 { 316 compatible = "renesas,gpio-r8a7795", 317 "renesas,rcar-gen3-gpio"; 318 reg = <0 0xe6051000 0 0x50>; 319 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 320 #gpio-cells = <2>; 321 gpio-controller; 322 gpio-ranges = <&pfc 0 32 29>; 323 #interrupt-cells = <2>; 324 interrupt-controller; 325 clocks = <&cpg CPG_MOD 911>; 326 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 327 resets = <&cpg 911>; 328 }; 329 330 gpio2: gpio@e6052000 { 331 compatible = "renesas,gpio-r8a7795", 332 "renesas,rcar-gen3-gpio"; 333 reg = <0 0xe6052000 0 0x50>; 334 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 335 #gpio-cells = <2>; 336 gpio-controller; 337 gpio-ranges = <&pfc 0 64 15>; 338 #interrupt-cells = <2>; 339 interrupt-controller; 340 clocks = <&cpg CPG_MOD 910>; 341 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 342 resets = <&cpg 910>; 343 }; 344 345 gpio3: gpio@e6053000 { 346 compatible = "renesas,gpio-r8a7795", 347 "renesas,rcar-gen3-gpio"; 348 reg = <0 0xe6053000 0 0x50>; 349 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 350 #gpio-cells = <2>; 351 gpio-controller; 352 gpio-ranges = <&pfc 0 96 16>; 353 #interrupt-cells = <2>; 354 interrupt-controller; 355 clocks = <&cpg CPG_MOD 909>; 356 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 357 resets = <&cpg 909>; 358 }; 359 360 gpio4: gpio@e6054000 { 361 compatible = "renesas,gpio-r8a7795", 362 "renesas,rcar-gen3-gpio"; 363 reg = <0 0xe6054000 0 0x50>; 364 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 365 #gpio-cells = <2>; 366 gpio-controller; 367 gpio-ranges = <&pfc 0 128 18>; 368 #interrupt-cells = <2>; 369 interrupt-controller; 370 clocks = <&cpg CPG_MOD 908>; 371 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 372 resets = <&cpg 908>; 373 }; 374 375 gpio5: gpio@e6055000 { 376 compatible = "renesas,gpio-r8a7795", 377 "renesas,rcar-gen3-gpio"; 378 reg = <0 0xe6055000 0 0x50>; 379 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 380 #gpio-cells = <2>; 381 gpio-controller; 382 gpio-ranges = <&pfc 0 160 26>; 383 #interrupt-cells = <2>; 384 interrupt-controller; 385 clocks = <&cpg CPG_MOD 907>; 386 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 387 resets = <&cpg 907>; 388 }; 389 390 gpio6: gpio@e6055400 { 391 compatible = "renesas,gpio-r8a7795", 392 "renesas,rcar-gen3-gpio"; 393 reg = <0 0xe6055400 0 0x50>; 394 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 395 #gpio-cells = <2>; 396 gpio-controller; 397 gpio-ranges = <&pfc 0 192 32>; 398 #interrupt-cells = <2>; 399 interrupt-controller; 400 clocks = <&cpg CPG_MOD 906>; 401 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 402 resets = <&cpg 906>; 403 }; 404 405 gpio7: gpio@e6055800 { 406 compatible = "renesas,gpio-r8a7795", 407 "renesas,rcar-gen3-gpio"; 408 reg = <0 0xe6055800 0 0x50>; 409 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 410 #gpio-cells = <2>; 411 gpio-controller; 412 gpio-ranges = <&pfc 0 224 4>; 413 #interrupt-cells = <2>; 414 interrupt-controller; 415 clocks = <&cpg CPG_MOD 905>; 416 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 417 resets = <&cpg 905>; 418 }; 419 420 pfc: pin-controller@e6060000 { 421 compatible = "renesas,pfc-r8a7795"; 422 reg = <0 0xe6060000 0 0x50c>; 423 }; 424 425 cpg: clock-controller@e6150000 { 426 compatible = "renesas,r8a7795-cpg-mssr"; 427 reg = <0 0xe6150000 0 0x1000>; 428 clocks = <&extal_clk>, <&extalr_clk>; 429 clock-names = "extal", "extalr"; 430 #clock-cells = <2>; 431 #power-domain-cells = <0>; 432 #reset-cells = <1>; 433 }; 434 435 rst: reset-controller@e6160000 { 436 compatible = "renesas,r8a7795-rst"; 437 reg = <0 0xe6160000 0 0x0200>; 438 }; 439 440 sysc: system-controller@e6180000 { 441 compatible = "renesas,r8a7795-sysc"; 442 reg = <0 0xe6180000 0 0x0400>; 443 #power-domain-cells = <1>; 444 }; 445 446 tsc: thermal@e6198000 { 447 compatible = "renesas,r8a7795-thermal"; 448 reg = <0 0xe6198000 0 0x100>, 449 <0 0xe61a0000 0 0x100>, 450 <0 0xe61a8000 0 0x100>; 451 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 452 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, 453 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 454 clocks = <&cpg CPG_MOD 522>; 455 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 456 resets = <&cpg 522>; 457 #thermal-sensor-cells = <1>; 458 status = "okay"; 459 }; 460 461 intc_ex: interrupt-controller@e61c0000 { 462 compatible = "renesas,intc-ex-r8a7795", "renesas,irqc"; 463 #interrupt-cells = <2>; 464 interrupt-controller; 465 reg = <0 0xe61c0000 0 0x200>; 466 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH 467 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 468 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH 469 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH 470 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH 471 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 472 clocks = <&cpg CPG_MOD 407>; 473 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 474 resets = <&cpg 407>; 475 }; 476 477 i2c0: i2c@e6500000 { 478 #address-cells = <1>; 479 #size-cells = <0>; 480 compatible = "renesas,i2c-r8a7795", 481 "renesas,rcar-gen3-i2c"; 482 reg = <0 0xe6500000 0 0x40>; 483 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 484 clocks = <&cpg CPG_MOD 931>; 485 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 486 resets = <&cpg 931>; 487 dmas = <&dmac1 0x91>, <&dmac1 0x90>, 488 <&dmac2 0x91>, <&dmac2 0x90>; 489 dma-names = "tx", "rx", "tx", "rx"; 490 i2c-scl-internal-delay-ns = <110>; 491 status = "disabled"; 492 }; 493 494 i2c1: i2c@e6508000 { 495 #address-cells = <1>; 496 #size-cells = <0>; 497 compatible = "renesas,i2c-r8a7795", 498 "renesas,rcar-gen3-i2c"; 499 reg = <0 0xe6508000 0 0x40>; 500 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 501 clocks = <&cpg CPG_MOD 930>; 502 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 503 resets = <&cpg 930>; 504 dmas = <&dmac1 0x93>, <&dmac1 0x92>, 505 <&dmac2 0x93>, <&dmac2 0x92>; 506 dma-names = "tx", "rx", "tx", "rx"; 507 i2c-scl-internal-delay-ns = <6>; 508 status = "disabled"; 509 }; 510 511 i2c2: i2c@e6510000 { 512 #address-cells = <1>; 513 #size-cells = <0>; 514 compatible = "renesas,i2c-r8a7795", 515 "renesas,rcar-gen3-i2c"; 516 reg = <0 0xe6510000 0 0x40>; 517 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 518 clocks = <&cpg CPG_MOD 929>; 519 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 520 resets = <&cpg 929>; 521 dmas = <&dmac1 0x95>, <&dmac1 0x94>, 522 <&dmac2 0x95>, <&dmac2 0x94>; 523 dma-names = "tx", "rx", "tx", "rx"; 524 i2c-scl-internal-delay-ns = <6>; 525 status = "disabled"; 526 }; 527 528 arm_cc630p: crypto@e6601000 { 529 compatible = "arm,cryptocell-630p-ree"; 530 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 531 reg = <0x0 0xe6601000 0 0x1000>; 532 clocks = <&cpg CPG_MOD 229>; 533 resets = <&cpg 229>; 534 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 535 }; 536 537 i2c3: i2c@e66d0000 { 538 #address-cells = <1>; 539 #size-cells = <0>; 540 compatible = "renesas,i2c-r8a7795", 541 "renesas,rcar-gen3-i2c"; 542 reg = <0 0xe66d0000 0 0x40>; 543 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 544 clocks = <&cpg CPG_MOD 928>; 545 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 546 resets = <&cpg 928>; 547 dmas = <&dmac0 0x97>, <&dmac0 0x96>; 548 dma-names = "tx", "rx"; 549 i2c-scl-internal-delay-ns = <110>; 550 status = "disabled"; 551 }; 552 553 i2c4: i2c@e66d8000 { 554 #address-cells = <1>; 555 #size-cells = <0>; 556 compatible = "renesas,i2c-r8a7795", 557 "renesas,rcar-gen3-i2c"; 558 reg = <0 0xe66d8000 0 0x40>; 559 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 560 clocks = <&cpg CPG_MOD 927>; 561 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 562 resets = <&cpg 927>; 563 dmas = <&dmac0 0x99>, <&dmac0 0x98>; 564 dma-names = "tx", "rx"; 565 i2c-scl-internal-delay-ns = <110>; 566 status = "disabled"; 567 }; 568 569 i2c5: i2c@e66e0000 { 570 #address-cells = <1>; 571 #size-cells = <0>; 572 compatible = "renesas,i2c-r8a7795", 573 "renesas,rcar-gen3-i2c"; 574 reg = <0 0xe66e0000 0 0x40>; 575 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 576 clocks = <&cpg CPG_MOD 919>; 577 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 578 resets = <&cpg 919>; 579 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; 580 dma-names = "tx", "rx"; 581 i2c-scl-internal-delay-ns = <110>; 582 status = "disabled"; 583 }; 584 585 i2c6: i2c@e66e8000 { 586 #address-cells = <1>; 587 #size-cells = <0>; 588 compatible = "renesas,i2c-r8a7795", 589 "renesas,rcar-gen3-i2c"; 590 reg = <0 0xe66e8000 0 0x40>; 591 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 592 clocks = <&cpg CPG_MOD 918>; 593 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 594 resets = <&cpg 918>; 595 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; 596 dma-names = "tx", "rx"; 597 i2c-scl-internal-delay-ns = <6>; 598 status = "disabled"; 599 }; 600 601 i2c_dvfs: i2c@e60b0000 { 602 #address-cells = <1>; 603 #size-cells = <0>; 604 compatible = "renesas,iic-r8a7795", 605 "renesas,rcar-gen3-iic", 606 "renesas,rmobile-iic"; 607 reg = <0 0xe60b0000 0 0x425>; 608 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 609 clocks = <&cpg CPG_MOD 926>; 610 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 611 resets = <&cpg 926>; 612 dmas = <&dmac0 0x11>, <&dmac0 0x10>; 613 dma-names = "tx", "rx"; 614 status = "disabled"; 615 }; 616 617 hscif0: serial@e6540000 { 618 compatible = "renesas,hscif-r8a7795", 619 "renesas,rcar-gen3-hscif", 620 "renesas,hscif"; 621 reg = <0 0xe6540000 0 96>; 622 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 623 clocks = <&cpg CPG_MOD 520>, 624 <&cpg CPG_CORE R8A7795_CLK_S3D1>, 625 <&scif_clk>; 626 clock-names = "fck", "brg_int", "scif_clk"; 627 dmas = <&dmac1 0x31>, <&dmac1 0x30>, 628 <&dmac2 0x31>, <&dmac2 0x30>; 629 dma-names = "tx", "rx", "tx", "rx"; 630 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 631 resets = <&cpg 520>; 632 status = "disabled"; 633 }; 634 635 hscif1: serial@e6550000 { 636 compatible = "renesas,hscif-r8a7795", 637 "renesas,rcar-gen3-hscif", 638 "renesas,hscif"; 639 reg = <0 0xe6550000 0 96>; 640 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 641 clocks = <&cpg CPG_MOD 519>, 642 <&cpg CPG_CORE R8A7795_CLK_S3D1>, 643 <&scif_clk>; 644 clock-names = "fck", "brg_int", "scif_clk"; 645 dmas = <&dmac1 0x33>, <&dmac1 0x32>, 646 <&dmac2 0x33>, <&dmac2 0x32>; 647 dma-names = "tx", "rx", "tx", "rx"; 648 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 649 resets = <&cpg 519>; 650 status = "disabled"; 651 }; 652 653 hscif2: serial@e6560000 { 654 compatible = "renesas,hscif-r8a7795", 655 "renesas,rcar-gen3-hscif", 656 "renesas,hscif"; 657 reg = <0 0xe6560000 0 96>; 658 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 659 clocks = <&cpg CPG_MOD 518>, 660 <&cpg CPG_CORE R8A7795_CLK_S3D1>, 661 <&scif_clk>; 662 clock-names = "fck", "brg_int", "scif_clk"; 663 dmas = <&dmac1 0x35>, <&dmac1 0x34>, 664 <&dmac2 0x35>, <&dmac2 0x34>; 665 dma-names = "tx", "rx", "tx", "rx"; 666 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 667 resets = <&cpg 518>; 668 status = "disabled"; 669 }; 670 671 hscif3: serial@e66a0000 { 672 compatible = "renesas,hscif-r8a7795", 673 "renesas,rcar-gen3-hscif", 674 "renesas,hscif"; 675 reg = <0 0xe66a0000 0 96>; 676 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 677 clocks = <&cpg CPG_MOD 517>, 678 <&cpg CPG_CORE R8A7795_CLK_S3D1>, 679 <&scif_clk>; 680 clock-names = "fck", "brg_int", "scif_clk"; 681 dmas = <&dmac0 0x37>, <&dmac0 0x36>; 682 dma-names = "tx", "rx"; 683 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 684 resets = <&cpg 517>; 685 status = "disabled"; 686 }; 687 688 hscif4: serial@e66b0000 { 689 compatible = "renesas,hscif-r8a7795", 690 "renesas,rcar-gen3-hscif", 691 "renesas,hscif"; 692 reg = <0 0xe66b0000 0 96>; 693 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 694 clocks = <&cpg CPG_MOD 516>, 695 <&cpg CPG_CORE R8A7795_CLK_S3D1>, 696 <&scif_clk>; 697 clock-names = "fck", "brg_int", "scif_clk"; 698 dmas = <&dmac0 0x39>, <&dmac0 0x38>; 699 dma-names = "tx", "rx"; 700 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 701 resets = <&cpg 516>; 702 status = "disabled"; 703 }; 704 705 hsusb: usb@e6590000 { 706 compatible = "renesas,usbhs-r8a7795", 707 "renesas,rcar-gen3-usbhs"; 708 reg = <0 0xe6590000 0 0x100>; 709 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 710 clocks = <&cpg CPG_MOD 704>; 711 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 712 <&usb_dmac1 0>, <&usb_dmac1 1>; 713 dma-names = "ch0", "ch1", "ch2", "ch3"; 714 renesas,buswait = <11>; 715 phys = <&usb2_phy0>; 716 phy-names = "usb"; 717 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 718 resets = <&cpg 704>; 719 status = "disabled"; 720 }; 721 722 hsusb3: usb@e659c000 { 723 compatible = "renesas,usbhs-r8a7795", 724 "renesas,rcar-gen3-usbhs"; 725 reg = <0 0xe659c000 0 0x100>; 726 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; 727 clocks = <&cpg CPG_MOD 705>; 728 dmas = <&usb_dmac2 0>, <&usb_dmac2 1>, 729 <&usb_dmac3 0>, <&usb_dmac3 1>; 730 dma-names = "ch0", "ch1", "ch2", "ch3"; 731 renesas,buswait = <11>; 732 phys = <&usb2_phy3>; 733 phy-names = "usb"; 734 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 735 resets = <&cpg 705>; 736 status = "disabled"; 737 }; 738 739 usb_dmac0: dma-controller@e65a0000 { 740 compatible = "renesas,r8a7795-usb-dmac", 741 "renesas,usb-dmac"; 742 reg = <0 0xe65a0000 0 0x100>; 743 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH 744 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 745 interrupt-names = "ch0", "ch1"; 746 clocks = <&cpg CPG_MOD 330>; 747 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 748 resets = <&cpg 330>; 749 #dma-cells = <1>; 750 dma-channels = <2>; 751 }; 752 753 usb_dmac1: dma-controller@e65b0000 { 754 compatible = "renesas,r8a7795-usb-dmac", 755 "renesas,usb-dmac"; 756 reg = <0 0xe65b0000 0 0x100>; 757 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 758 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 759 interrupt-names = "ch0", "ch1"; 760 clocks = <&cpg CPG_MOD 331>; 761 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 762 resets = <&cpg 331>; 763 #dma-cells = <1>; 764 dma-channels = <2>; 765 }; 766 767 usb_dmac2: dma-controller@e6460000 { 768 compatible = "renesas,r8a7795-usb-dmac", 769 "renesas,usb-dmac"; 770 reg = <0 0xe6460000 0 0x100>; 771 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH 772 GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; 773 interrupt-names = "ch0", "ch1"; 774 clocks = <&cpg CPG_MOD 326>; 775 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 776 resets = <&cpg 326>; 777 #dma-cells = <1>; 778 dma-channels = <2>; 779 }; 780 781 usb_dmac3: dma-controller@e6470000 { 782 compatible = "renesas,r8a7795-usb-dmac", 783 "renesas,usb-dmac"; 784 reg = <0 0xe6470000 0 0x100>; 785 interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH 786 GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; 787 interrupt-names = "ch0", "ch1"; 788 clocks = <&cpg CPG_MOD 329>; 789 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 790 resets = <&cpg 329>; 791 #dma-cells = <1>; 792 dma-channels = <2>; 793 }; 794 795 usb3_phy0: usb-phy@e65ee000 { 796 compatible = "renesas,r8a7795-usb3-phy", 797 "renesas,rcar-gen3-usb3-phy"; 798 reg = <0 0xe65ee000 0 0x90>; 799 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>, 800 <&usb_extal_clk>; 801 clock-names = "usb3-if", "usb3s_clk", "usb_extal"; 802 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 803 resets = <&cpg 328>; 804 #phy-cells = <0>; 805 status = "disabled"; 806 }; 807 808 dmac0: dma-controller@e6700000 { 809 compatible = "renesas,dmac-r8a7795", 810 "renesas,rcar-dmac"; 811 reg = <0 0xe6700000 0 0x10000>; 812 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH 813 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH 814 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH 815 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH 816 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH 817 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH 818 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH 819 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH 820 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH 821 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH 822 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH 823 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH 824 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH 825 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH 826 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH 827 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH 828 GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; 829 interrupt-names = "error", 830 "ch0", "ch1", "ch2", "ch3", 831 "ch4", "ch5", "ch6", "ch7", 832 "ch8", "ch9", "ch10", "ch11", 833 "ch12", "ch13", "ch14", "ch15"; 834 clocks = <&cpg CPG_MOD 219>; 835 clock-names = "fck"; 836 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 837 resets = <&cpg 219>; 838 #dma-cells = <1>; 839 dma-channels = <16>; 840 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, 841 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, 842 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, 843 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, 844 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, 845 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, 846 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, 847 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; 848 }; 849 850 dmac1: dma-controller@e7300000 { 851 compatible = "renesas,dmac-r8a7795", 852 "renesas,rcar-dmac"; 853 reg = <0 0xe7300000 0 0x10000>; 854 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH 855 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH 856 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH 857 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH 858 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH 859 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH 860 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH 861 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH 862 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH 863 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH 864 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH 865 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH 866 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH 867 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH 868 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH 869 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH 870 GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; 871 interrupt-names = "error", 872 "ch0", "ch1", "ch2", "ch3", 873 "ch4", "ch5", "ch6", "ch7", 874 "ch8", "ch9", "ch10", "ch11", 875 "ch12", "ch13", "ch14", "ch15"; 876 clocks = <&cpg CPG_MOD 218>; 877 clock-names = "fck"; 878 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 879 resets = <&cpg 218>; 880 #dma-cells = <1>; 881 dma-channels = <16>; 882 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, 883 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, 884 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, 885 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, 886 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, 887 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, 888 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, 889 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; 890 }; 891 892 dmac2: dma-controller@e7310000 { 893 compatible = "renesas,dmac-r8a7795", 894 "renesas,rcar-dmac"; 895 reg = <0 0xe7310000 0 0x10000>; 896 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH 897 GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH 898 GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH 899 GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH 900 GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH 901 GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH 902 GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH 903 GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH 904 GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH 905 GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH 906 GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH 907 GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH 908 GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH 909 GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH 910 GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH 911 GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH 912 GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 913 interrupt-names = "error", 914 "ch0", "ch1", "ch2", "ch3", 915 "ch4", "ch5", "ch6", "ch7", 916 "ch8", "ch9", "ch10", "ch11", 917 "ch12", "ch13", "ch14", "ch15"; 918 clocks = <&cpg CPG_MOD 217>; 919 clock-names = "fck"; 920 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 921 resets = <&cpg 217>; 922 #dma-cells = <1>; 923 dma-channels = <16>; 924 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, 925 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, 926 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, 927 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, 928 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, 929 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, 930 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, 931 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; 932 }; 933 934 ipmmu_ds0: mmu@e6740000 { 935 compatible = "renesas,ipmmu-r8a7795"; 936 reg = <0 0xe6740000 0 0x1000>; 937 renesas,ipmmu-main = <&ipmmu_mm 0>; 938 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 939 #iommu-cells = <1>; 940 }; 941 942 ipmmu_ds1: mmu@e7740000 { 943 compatible = "renesas,ipmmu-r8a7795"; 944 reg = <0 0xe7740000 0 0x1000>; 945 renesas,ipmmu-main = <&ipmmu_mm 1>; 946 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 947 #iommu-cells = <1>; 948 }; 949 950 ipmmu_hc: mmu@e6570000 { 951 compatible = "renesas,ipmmu-r8a7795"; 952 reg = <0 0xe6570000 0 0x1000>; 953 renesas,ipmmu-main = <&ipmmu_mm 2>; 954 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 955 #iommu-cells = <1>; 956 }; 957 958 ipmmu_ir: mmu@ff8b0000 { 959 compatible = "renesas,ipmmu-r8a7795"; 960 reg = <0 0xff8b0000 0 0x1000>; 961 renesas,ipmmu-main = <&ipmmu_mm 3>; 962 power-domains = <&sysc R8A7795_PD_A3IR>; 963 #iommu-cells = <1>; 964 }; 965 966 ipmmu_mm: mmu@e67b0000 { 967 compatible = "renesas,ipmmu-r8a7795"; 968 reg = <0 0xe67b0000 0 0x1000>; 969 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 970 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; 971 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 972 #iommu-cells = <1>; 973 }; 974 975 ipmmu_mp0: mmu@ec670000 { 976 compatible = "renesas,ipmmu-r8a7795"; 977 reg = <0 0xec670000 0 0x1000>; 978 renesas,ipmmu-main = <&ipmmu_mm 4>; 979 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 980 #iommu-cells = <1>; 981 }; 982 983 ipmmu_pv0: mmu@fd800000 { 984 compatible = "renesas,ipmmu-r8a7795"; 985 reg = <0 0xfd800000 0 0x1000>; 986 renesas,ipmmu-main = <&ipmmu_mm 6>; 987 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 988 #iommu-cells = <1>; 989 }; 990 991 ipmmu_pv1: mmu@fd950000 { 992 compatible = "renesas,ipmmu-r8a7795"; 993 reg = <0 0xfd950000 0 0x1000>; 994 renesas,ipmmu-main = <&ipmmu_mm 7>; 995 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 996 #iommu-cells = <1>; 997 }; 998 999 ipmmu_pv2: mmu@fd960000 { 1000 compatible = "renesas,ipmmu-r8a7795"; 1001 reg = <0 0xfd960000 0 0x1000>; 1002 renesas,ipmmu-main = <&ipmmu_mm 8>; 1003 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1004 #iommu-cells = <1>; 1005 }; 1006 1007 ipmmu_pv3: mmu@fd970000 { 1008 compatible = "renesas,ipmmu-r8a7795"; 1009 reg = <0 0xfd970000 0 0x1000>; 1010 renesas,ipmmu-main = <&ipmmu_mm 9>; 1011 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1012 #iommu-cells = <1>; 1013 }; 1014 1015 ipmmu_rt: mmu@ffc80000 { 1016 compatible = "renesas,ipmmu-r8a7795"; 1017 reg = <0 0xffc80000 0 0x1000>; 1018 renesas,ipmmu-main = <&ipmmu_mm 10>; 1019 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1020 #iommu-cells = <1>; 1021 }; 1022 1023 ipmmu_vc0: mmu@fe6b0000 { 1024 compatible = "renesas,ipmmu-r8a7795"; 1025 reg = <0 0xfe6b0000 0 0x1000>; 1026 renesas,ipmmu-main = <&ipmmu_mm 12>; 1027 power-domains = <&sysc R8A7795_PD_A3VC>; 1028 #iommu-cells = <1>; 1029 }; 1030 1031 ipmmu_vc1: mmu@fe6f0000 { 1032 compatible = "renesas,ipmmu-r8a7795"; 1033 reg = <0 0xfe6f0000 0 0x1000>; 1034 renesas,ipmmu-main = <&ipmmu_mm 13>; 1035 power-domains = <&sysc R8A7795_PD_A3VC>; 1036 #iommu-cells = <1>; 1037 }; 1038 1039 ipmmu_vi0: mmu@febd0000 { 1040 compatible = "renesas,ipmmu-r8a7795"; 1041 reg = <0 0xfebd0000 0 0x1000>; 1042 renesas,ipmmu-main = <&ipmmu_mm 14>; 1043 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1044 #iommu-cells = <1>; 1045 }; 1046 1047 ipmmu_vi1: mmu@febe0000 { 1048 compatible = "renesas,ipmmu-r8a7795"; 1049 reg = <0 0xfebe0000 0 0x1000>; 1050 renesas,ipmmu-main = <&ipmmu_mm 15>; 1051 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1052 #iommu-cells = <1>; 1053 }; 1054 1055 ipmmu_vp0: mmu@fe990000 { 1056 compatible = "renesas,ipmmu-r8a7795"; 1057 reg = <0 0xfe990000 0 0x1000>; 1058 renesas,ipmmu-main = <&ipmmu_mm 16>; 1059 power-domains = <&sysc R8A7795_PD_A3VP>; 1060 #iommu-cells = <1>; 1061 }; 1062 1063 ipmmu_vp1: mmu@fe980000 { 1064 compatible = "renesas,ipmmu-r8a7795"; 1065 reg = <0 0xfe980000 0 0x1000>; 1066 renesas,ipmmu-main = <&ipmmu_mm 17>; 1067 power-domains = <&sysc R8A7795_PD_A3VP>; 1068 #iommu-cells = <1>; 1069 }; 1070 1071 avb: ethernet@e6800000 { 1072 compatible = "renesas,etheravb-r8a7795", 1073 "renesas,etheravb-rcar-gen3"; 1074 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>; 1075 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 1076 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 1077 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 1078 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 1079 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 1080 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 1081 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 1082 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 1083 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 1084 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 1085 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 1086 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 1087 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 1088 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 1089 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 1090 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 1091 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 1092 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 1093 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 1094 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 1095 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 1096 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 1097 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 1098 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 1099 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 1100 interrupt-names = "ch0", "ch1", "ch2", "ch3", 1101 "ch4", "ch5", "ch6", "ch7", 1102 "ch8", "ch9", "ch10", "ch11", 1103 "ch12", "ch13", "ch14", "ch15", 1104 "ch16", "ch17", "ch18", "ch19", 1105 "ch20", "ch21", "ch22", "ch23", 1106 "ch24"; 1107 clocks = <&cpg CPG_MOD 812>; 1108 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1109 resets = <&cpg 812>; 1110 phy-mode = "rgmii"; 1111 iommus = <&ipmmu_ds0 16>; 1112 #address-cells = <1>; 1113 #size-cells = <0>; 1114 status = "disabled"; 1115 }; 1116 1117 can0: can@e6c30000 { 1118 compatible = "renesas,can-r8a7795", 1119 "renesas,rcar-gen3-can"; 1120 reg = <0 0xe6c30000 0 0x1000>; 1121 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 1122 clocks = <&cpg CPG_MOD 916>, 1123 <&cpg CPG_CORE R8A7795_CLK_CANFD>, 1124 <&can_clk>; 1125 clock-names = "clkp1", "clkp2", "can_clk"; 1126 assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>; 1127 assigned-clock-rates = <40000000>; 1128 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1129 resets = <&cpg 916>; 1130 status = "disabled"; 1131 }; 1132 1133 can1: can@e6c38000 { 1134 compatible = "renesas,can-r8a7795", 1135 "renesas,rcar-gen3-can"; 1136 reg = <0 0xe6c38000 0 0x1000>; 1137 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 1138 clocks = <&cpg CPG_MOD 915>, 1139 <&cpg CPG_CORE R8A7795_CLK_CANFD>, 1140 <&can_clk>; 1141 clock-names = "clkp1", "clkp2", "can_clk"; 1142 assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>; 1143 assigned-clock-rates = <40000000>; 1144 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1145 resets = <&cpg 915>; 1146 status = "disabled"; 1147 }; 1148 1149 canfd: can@e66c0000 { 1150 compatible = "renesas,r8a7795-canfd", 1151 "renesas,rcar-gen3-canfd"; 1152 reg = <0 0xe66c0000 0 0x8000>; 1153 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, 1154 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 1155 clocks = <&cpg CPG_MOD 914>, 1156 <&cpg CPG_CORE R8A7795_CLK_CANFD>, 1157 <&can_clk>; 1158 clock-names = "fck", "canfd", "can_clk"; 1159 assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>; 1160 assigned-clock-rates = <40000000>; 1161 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1162 resets = <&cpg 914>; 1163 status = "disabled"; 1164 1165 channel0 { 1166 status = "disabled"; 1167 }; 1168 1169 channel1 { 1170 status = "disabled"; 1171 }; 1172 }; 1173 1174 pwm0: pwm@e6e30000 { 1175 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar"; 1176 reg = <0 0xe6e30000 0 0x8>; 1177 clocks = <&cpg CPG_MOD 523>; 1178 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1179 resets = <&cpg 523>; 1180 #pwm-cells = <2>; 1181 status = "disabled"; 1182 }; 1183 1184 pwm1: pwm@e6e31000 { 1185 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar"; 1186 reg = <0 0xe6e31000 0 0x8>; 1187 clocks = <&cpg CPG_MOD 523>; 1188 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1189 resets = <&cpg 523>; 1190 #pwm-cells = <2>; 1191 status = "disabled"; 1192 }; 1193 1194 pwm2: pwm@e6e32000 { 1195 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar"; 1196 reg = <0 0xe6e32000 0 0x8>; 1197 clocks = <&cpg CPG_MOD 523>; 1198 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1199 resets = <&cpg 523>; 1200 #pwm-cells = <2>; 1201 status = "disabled"; 1202 }; 1203 1204 pwm3: pwm@e6e33000 { 1205 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar"; 1206 reg = <0 0xe6e33000 0 0x8>; 1207 clocks = <&cpg CPG_MOD 523>; 1208 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1209 resets = <&cpg 523>; 1210 #pwm-cells = <2>; 1211 status = "disabled"; 1212 }; 1213 1214 pwm4: pwm@e6e34000 { 1215 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar"; 1216 reg = <0 0xe6e34000 0 0x8>; 1217 clocks = <&cpg CPG_MOD 523>; 1218 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1219 resets = <&cpg 523>; 1220 #pwm-cells = <2>; 1221 status = "disabled"; 1222 }; 1223 1224 pwm5: pwm@e6e35000 { 1225 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar"; 1226 reg = <0 0xe6e35000 0 0x8>; 1227 clocks = <&cpg CPG_MOD 523>; 1228 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1229 resets = <&cpg 523>; 1230 #pwm-cells = <2>; 1231 status = "disabled"; 1232 }; 1233 1234 pwm6: pwm@e6e36000 { 1235 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar"; 1236 reg = <0 0xe6e36000 0 0x8>; 1237 clocks = <&cpg CPG_MOD 523>; 1238 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1239 resets = <&cpg 523>; 1240 #pwm-cells = <2>; 1241 status = "disabled"; 1242 }; 1243 1244 scif0: serial@e6e60000 { 1245 compatible = "renesas,scif-r8a7795", 1246 "renesas,rcar-gen3-scif", "renesas,scif"; 1247 reg = <0 0xe6e60000 0 64>; 1248 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 1249 clocks = <&cpg CPG_MOD 207>, 1250 <&cpg CPG_CORE R8A7795_CLK_S3D1>, 1251 <&scif_clk>; 1252 clock-names = "fck", "brg_int", "scif_clk"; 1253 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 1254 <&dmac2 0x51>, <&dmac2 0x50>; 1255 dma-names = "tx", "rx", "tx", "rx"; 1256 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1257 resets = <&cpg 207>; 1258 status = "disabled"; 1259 }; 1260 1261 scif1: serial@e6e68000 { 1262 compatible = "renesas,scif-r8a7795", 1263 "renesas,rcar-gen3-scif", "renesas,scif"; 1264 reg = <0 0xe6e68000 0 64>; 1265 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 1266 clocks = <&cpg CPG_MOD 206>, 1267 <&cpg CPG_CORE R8A7795_CLK_S3D1>, 1268 <&scif_clk>; 1269 clock-names = "fck", "brg_int", "scif_clk"; 1270 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 1271 <&dmac2 0x53>, <&dmac2 0x52>; 1272 dma-names = "tx", "rx", "tx", "rx"; 1273 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1274 resets = <&cpg 206>; 1275 status = "disabled"; 1276 }; 1277 1278 scif2: serial@e6e88000 { 1279 compatible = "renesas,scif-r8a7795", 1280 "renesas,rcar-gen3-scif", "renesas,scif"; 1281 reg = <0 0xe6e88000 0 64>; 1282 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 1283 clocks = <&cpg CPG_MOD 310>, 1284 <&cpg CPG_CORE R8A7795_CLK_S3D1>, 1285 <&scif_clk>; 1286 clock-names = "fck", "brg_int", "scif_clk"; 1287 dmas = <&dmac1 0x13>, <&dmac1 0x12>, 1288 <&dmac2 0x13>, <&dmac2 0x12>; 1289 dma-names = "tx", "rx", "tx", "rx"; 1290 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1291 resets = <&cpg 310>; 1292 status = "disabled"; 1293 }; 1294 1295 scif3: serial@e6c50000 { 1296 compatible = "renesas,scif-r8a7795", 1297 "renesas,rcar-gen3-scif", "renesas,scif"; 1298 reg = <0 0xe6c50000 0 64>; 1299 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 1300 clocks = <&cpg CPG_MOD 204>, 1301 <&cpg CPG_CORE R8A7795_CLK_S3D1>, 1302 <&scif_clk>; 1303 clock-names = "fck", "brg_int", "scif_clk"; 1304 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 1305 dma-names = "tx", "rx"; 1306 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1307 resets = <&cpg 204>; 1308 status = "disabled"; 1309 }; 1310 1311 scif4: serial@e6c40000 { 1312 compatible = "renesas,scif-r8a7795", 1313 "renesas,rcar-gen3-scif", "renesas,scif"; 1314 reg = <0 0xe6c40000 0 64>; 1315 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 1316 clocks = <&cpg CPG_MOD 203>, 1317 <&cpg CPG_CORE R8A7795_CLK_S3D1>, 1318 <&scif_clk>; 1319 clock-names = "fck", "brg_int", "scif_clk"; 1320 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 1321 dma-names = "tx", "rx"; 1322 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1323 resets = <&cpg 203>; 1324 status = "disabled"; 1325 }; 1326 1327 scif5: serial@e6f30000 { 1328 compatible = "renesas,scif-r8a7795", 1329 "renesas,rcar-gen3-scif", "renesas,scif"; 1330 reg = <0 0xe6f30000 0 64>; 1331 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 1332 clocks = <&cpg CPG_MOD 202>, 1333 <&cpg CPG_CORE R8A7795_CLK_S3D1>, 1334 <&scif_clk>; 1335 clock-names = "fck", "brg_int", "scif_clk"; 1336 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, 1337 <&dmac2 0x5b>, <&dmac2 0x5a>; 1338 dma-names = "tx", "rx", "tx", "rx"; 1339 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1340 resets = <&cpg 202>; 1341 status = "disabled"; 1342 }; 1343 1344 msiof0: spi@e6e90000 { 1345 compatible = "renesas,msiof-r8a7795", 1346 "renesas,rcar-gen3-msiof"; 1347 reg = <0 0xe6e90000 0 0x0064>; 1348 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1349 clocks = <&cpg CPG_MOD 211>; 1350 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 1351 <&dmac2 0x41>, <&dmac2 0x40>; 1352 dma-names = "tx", "rx", "tx", "rx"; 1353 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1354 resets = <&cpg 211>; 1355 #address-cells = <1>; 1356 #size-cells = <0>; 1357 status = "disabled"; 1358 }; 1359 1360 msiof1: spi@e6ea0000 { 1361 compatible = "renesas,msiof-r8a7795", 1362 "renesas,rcar-gen3-msiof"; 1363 reg = <0 0xe6ea0000 0 0x0064>; 1364 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1365 clocks = <&cpg CPG_MOD 210>; 1366 dmas = <&dmac1 0x43>, <&dmac1 0x42>, 1367 <&dmac2 0x43>, <&dmac2 0x42>; 1368 dma-names = "tx", "rx", "tx", "rx"; 1369 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1370 resets = <&cpg 210>; 1371 #address-cells = <1>; 1372 #size-cells = <0>; 1373 status = "disabled"; 1374 }; 1375 1376 msiof2: spi@e6c00000 { 1377 compatible = "renesas,msiof-r8a7795", 1378 "renesas,rcar-gen3-msiof"; 1379 reg = <0 0xe6c00000 0 0x0064>; 1380 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1381 clocks = <&cpg CPG_MOD 209>; 1382 dmas = <&dmac0 0x45>, <&dmac0 0x44>; 1383 dma-names = "tx", "rx"; 1384 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1385 resets = <&cpg 209>; 1386 #address-cells = <1>; 1387 #size-cells = <0>; 1388 status = "disabled"; 1389 }; 1390 1391 msiof3: spi@e6c10000 { 1392 compatible = "renesas,msiof-r8a7795", 1393 "renesas,rcar-gen3-msiof"; 1394 reg = <0 0xe6c10000 0 0x0064>; 1395 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 1396 clocks = <&cpg CPG_MOD 208>; 1397 dmas = <&dmac0 0x47>, <&dmac0 0x46>; 1398 dma-names = "tx", "rx"; 1399 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1400 resets = <&cpg 208>; 1401 #address-cells = <1>; 1402 #size-cells = <0>; 1403 status = "disabled"; 1404 }; 1405 1406 vin0: video@e6ef0000 { 1407 compatible = "renesas,vin-r8a7795"; 1408 reg = <0 0xe6ef0000 0 0x1000>; 1409 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 1410 clocks = <&cpg CPG_MOD 811>; 1411 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1412 resets = <&cpg 811>; 1413 renesas,id = <0>; 1414 status = "disabled"; 1415 1416 ports { 1417 #address-cells = <1>; 1418 #size-cells = <0>; 1419 1420 port@1 { 1421 #address-cells = <1>; 1422 #size-cells = <0>; 1423 1424 reg = <1>; 1425 1426 vin0csi20: endpoint@0 { 1427 reg = <0>; 1428 remote-endpoint= <&csi20vin0>; 1429 }; 1430 vin0csi40: endpoint@2 { 1431 reg = <2>; 1432 remote-endpoint= <&csi40vin0>; 1433 }; 1434 }; 1435 }; 1436 }; 1437 1438 vin1: video@e6ef1000 { 1439 compatible = "renesas,vin-r8a7795"; 1440 reg = <0 0xe6ef1000 0 0x1000>; 1441 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 1442 clocks = <&cpg CPG_MOD 810>; 1443 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1444 resets = <&cpg 810>; 1445 renesas,id = <1>; 1446 status = "disabled"; 1447 1448 ports { 1449 #address-cells = <1>; 1450 #size-cells = <0>; 1451 1452 port@1 { 1453 #address-cells = <1>; 1454 #size-cells = <0>; 1455 1456 reg = <1>; 1457 1458 vin1csi20: endpoint@0 { 1459 reg = <0>; 1460 remote-endpoint= <&csi20vin1>; 1461 }; 1462 vin1csi40: endpoint@2 { 1463 reg = <2>; 1464 remote-endpoint= <&csi40vin1>; 1465 }; 1466 }; 1467 }; 1468 }; 1469 1470 vin2: video@e6ef2000 { 1471 compatible = "renesas,vin-r8a7795"; 1472 reg = <0 0xe6ef2000 0 0x1000>; 1473 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; 1474 clocks = <&cpg CPG_MOD 809>; 1475 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1476 resets = <&cpg 809>; 1477 renesas,id = <2>; 1478 status = "disabled"; 1479 1480 ports { 1481 #address-cells = <1>; 1482 #size-cells = <0>; 1483 1484 port@1 { 1485 #address-cells = <1>; 1486 #size-cells = <0>; 1487 1488 reg = <1>; 1489 1490 vin2csi20: endpoint@0 { 1491 reg = <0>; 1492 remote-endpoint= <&csi20vin2>; 1493 }; 1494 vin2csi40: endpoint@2 { 1495 reg = <2>; 1496 remote-endpoint= <&csi40vin2>; 1497 }; 1498 }; 1499 }; 1500 }; 1501 1502 vin3: video@e6ef3000 { 1503 compatible = "renesas,vin-r8a7795"; 1504 reg = <0 0xe6ef3000 0 0x1000>; 1505 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; 1506 clocks = <&cpg CPG_MOD 808>; 1507 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1508 resets = <&cpg 808>; 1509 renesas,id = <3>; 1510 status = "disabled"; 1511 1512 ports { 1513 #address-cells = <1>; 1514 #size-cells = <0>; 1515 1516 port@1 { 1517 #address-cells = <1>; 1518 #size-cells = <0>; 1519 1520 reg = <1>; 1521 1522 vin3csi20: endpoint@0 { 1523 reg = <0>; 1524 remote-endpoint= <&csi20vin3>; 1525 }; 1526 vin3csi40: endpoint@2 { 1527 reg = <2>; 1528 remote-endpoint= <&csi40vin3>; 1529 }; 1530 }; 1531 }; 1532 }; 1533 1534 vin4: video@e6ef4000 { 1535 compatible = "renesas,vin-r8a7795"; 1536 reg = <0 0xe6ef4000 0 0x1000>; 1537 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1538 clocks = <&cpg CPG_MOD 807>; 1539 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1540 resets = <&cpg 807>; 1541 renesas,id = <4>; 1542 status = "disabled"; 1543 1544 ports { 1545 #address-cells = <1>; 1546 #size-cells = <0>; 1547 1548 port@1 { 1549 #address-cells = <1>; 1550 #size-cells = <0>; 1551 1552 reg = <1>; 1553 1554 vin4csi20: endpoint@0 { 1555 reg = <0>; 1556 remote-endpoint= <&csi20vin4>; 1557 }; 1558 vin4csi41: endpoint@3 { 1559 reg = <3>; 1560 remote-endpoint= <&csi41vin4>; 1561 }; 1562 }; 1563 }; 1564 }; 1565 1566 vin5: video@e6ef5000 { 1567 compatible = "renesas,vin-r8a7795"; 1568 reg = <0 0xe6ef5000 0 0x1000>; 1569 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 1570 clocks = <&cpg CPG_MOD 806>; 1571 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1572 resets = <&cpg 806>; 1573 renesas,id = <5>; 1574 status = "disabled"; 1575 1576 ports { 1577 #address-cells = <1>; 1578 #size-cells = <0>; 1579 1580 port@1 { 1581 #address-cells = <1>; 1582 #size-cells = <0>; 1583 1584 reg = <1>; 1585 1586 vin5csi20: endpoint@0 { 1587 reg = <0>; 1588 remote-endpoint= <&csi20vin5>; 1589 }; 1590 vin5csi41: endpoint@3 { 1591 reg = <3>; 1592 remote-endpoint= <&csi41vin5>; 1593 }; 1594 }; 1595 }; 1596 }; 1597 1598 vin6: video@e6ef6000 { 1599 compatible = "renesas,vin-r8a7795"; 1600 reg = <0 0xe6ef6000 0 0x1000>; 1601 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; 1602 clocks = <&cpg CPG_MOD 805>; 1603 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1604 resets = <&cpg 805>; 1605 renesas,id = <6>; 1606 status = "disabled"; 1607 1608 ports { 1609 #address-cells = <1>; 1610 #size-cells = <0>; 1611 1612 port@1 { 1613 #address-cells = <1>; 1614 #size-cells = <0>; 1615 1616 reg = <1>; 1617 1618 vin6csi20: endpoint@0 { 1619 reg = <0>; 1620 remote-endpoint= <&csi20vin6>; 1621 }; 1622 vin6csi41: endpoint@3 { 1623 reg = <3>; 1624 remote-endpoint= <&csi41vin6>; 1625 }; 1626 }; 1627 }; 1628 }; 1629 1630 vin7: video@e6ef7000 { 1631 compatible = "renesas,vin-r8a7795"; 1632 reg = <0 0xe6ef7000 0 0x1000>; 1633 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; 1634 clocks = <&cpg CPG_MOD 804>; 1635 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1636 resets = <&cpg 804>; 1637 renesas,id = <7>; 1638 status = "disabled"; 1639 1640 ports { 1641 #address-cells = <1>; 1642 #size-cells = <0>; 1643 1644 port@1 { 1645 #address-cells = <1>; 1646 #size-cells = <0>; 1647 1648 reg = <1>; 1649 1650 vin7csi20: endpoint@0 { 1651 reg = <0>; 1652 remote-endpoint= <&csi20vin7>; 1653 }; 1654 vin7csi41: endpoint@3 { 1655 reg = <3>; 1656 remote-endpoint= <&csi41vin7>; 1657 }; 1658 }; 1659 }; 1660 }; 1661 1662 drif00: rif@e6f40000 { 1663 compatible = "renesas,r8a7795-drif", 1664 "renesas,rcar-gen3-drif"; 1665 reg = <0 0xe6f40000 0 0x64>; 1666 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 1667 clocks = <&cpg CPG_MOD 515>; 1668 clock-names = "fck"; 1669 dmas = <&dmac1 0x20>, <&dmac2 0x20>; 1670 dma-names = "rx", "rx"; 1671 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1672 resets = <&cpg 515>; 1673 renesas,bonding = <&drif01>; 1674 status = "disabled"; 1675 }; 1676 1677 drif01: rif@e6f50000 { 1678 compatible = "renesas,r8a7795-drif", 1679 "renesas,rcar-gen3-drif"; 1680 reg = <0 0xe6f50000 0 0x64>; 1681 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; 1682 clocks = <&cpg CPG_MOD 514>; 1683 clock-names = "fck"; 1684 dmas = <&dmac1 0x22>, <&dmac2 0x22>; 1685 dma-names = "rx", "rx"; 1686 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1687 resets = <&cpg 514>; 1688 renesas,bonding = <&drif00>; 1689 status = "disabled"; 1690 }; 1691 1692 drif10: rif@e6f60000 { 1693 compatible = "renesas,r8a7795-drif", 1694 "renesas,rcar-gen3-drif"; 1695 reg = <0 0xe6f60000 0 0x64>; 1696 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 1697 clocks = <&cpg CPG_MOD 513>; 1698 clock-names = "fck"; 1699 dmas = <&dmac1 0x24>, <&dmac2 0x24>; 1700 dma-names = "rx", "rx"; 1701 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1702 resets = <&cpg 513>; 1703 renesas,bonding = <&drif11>; 1704 status = "disabled"; 1705 }; 1706 1707 drif11: rif@e6f70000 { 1708 compatible = "renesas,r8a7795-drif", 1709 "renesas,rcar-gen3-drif"; 1710 reg = <0 0xe6f70000 0 0x64>; 1711 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 1712 clocks = <&cpg CPG_MOD 512>; 1713 clock-names = "fck"; 1714 dmas = <&dmac1 0x26>, <&dmac2 0x26>; 1715 dma-names = "rx", "rx"; 1716 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1717 resets = <&cpg 512>; 1718 renesas,bonding = <&drif10>; 1719 status = "disabled"; 1720 }; 1721 1722 drif20: rif@e6f80000 { 1723 compatible = "renesas,r8a7795-drif", 1724 "renesas,rcar-gen3-drif"; 1725 reg = <0 0xe6f80000 0 0x64>; 1726 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; 1727 clocks = <&cpg CPG_MOD 511>; 1728 clock-names = "fck"; 1729 dmas = <&dmac1 0x28>, <&dmac2 0x28>; 1730 dma-names = "rx", "rx"; 1731 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1732 resets = <&cpg 511>; 1733 renesas,bonding = <&drif21>; 1734 status = "disabled"; 1735 }; 1736 1737 drif21: rif@e6f90000 { 1738 compatible = "renesas,r8a7795-drif", 1739 "renesas,rcar-gen3-drif"; 1740 reg = <0 0xe6f90000 0 0x64>; 1741 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 1742 clocks = <&cpg CPG_MOD 510>; 1743 clock-names = "fck"; 1744 dmas = <&dmac1 0x2a>, <&dmac2 0x2a>; 1745 dma-names = "rx", "rx"; 1746 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1747 resets = <&cpg 510>; 1748 renesas,bonding = <&drif20>; 1749 status = "disabled"; 1750 }; 1751 1752 drif30: rif@e6fa0000 { 1753 compatible = "renesas,r8a7795-drif", 1754 "renesas,rcar-gen3-drif"; 1755 reg = <0 0xe6fa0000 0 0x64>; 1756 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; 1757 clocks = <&cpg CPG_MOD 509>; 1758 clock-names = "fck"; 1759 dmas = <&dmac1 0x2c>, <&dmac2 0x2c>; 1760 dma-names = "rx", "rx"; 1761 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1762 resets = <&cpg 509>; 1763 renesas,bonding = <&drif31>; 1764 status = "disabled"; 1765 }; 1766 1767 drif31: rif@e6fb0000 { 1768 compatible = "renesas,r8a7795-drif", 1769 "renesas,rcar-gen3-drif"; 1770 reg = <0 0xe6fb0000 0 0x64>; 1771 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; 1772 clocks = <&cpg CPG_MOD 508>; 1773 clock-names = "fck"; 1774 dmas = <&dmac1 0x2e>, <&dmac2 0x2e>; 1775 dma-names = "rx", "rx"; 1776 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1777 resets = <&cpg 508>; 1778 renesas,bonding = <&drif30>; 1779 status = "disabled"; 1780 }; 1781 1782 rcar_sound: sound@ec500000 { 1783 /* 1784 * #sound-dai-cells is required 1785 * 1786 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1787 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1788 */ 1789 /* 1790 * #clock-cells is required for audio_clkout0/1/2/3 1791 * 1792 * clkout : #clock-cells = <0>; <&rcar_sound>; 1793 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; 1794 */ 1795 compatible = "renesas,rcar_sound-r8a7795", "renesas,rcar_sound-gen3"; 1796 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1797 <0 0xec5a0000 0 0x100>, /* ADG */ 1798 <0 0xec540000 0 0x1000>, /* SSIU */ 1799 <0 0xec541000 0 0x280>, /* SSI */ 1800 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/ 1801 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1802 1803 clocks = <&cpg CPG_MOD 1005>, 1804 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1805 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1806 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1807 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1808 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1809 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 1810 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 1811 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 1812 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 1813 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 1814 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1815 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1816 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1817 <&audio_clk_a>, <&audio_clk_b>, 1818 <&audio_clk_c>, 1819 <&cpg CPG_CORE R8A7795_CLK_S0D4>; 1820 clock-names = "ssi-all", 1821 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1822 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1823 "ssi.1", "ssi.0", 1824 "src.9", "src.8", "src.7", "src.6", 1825 "src.5", "src.4", "src.3", "src.2", 1826 "src.1", "src.0", 1827 "mix.1", "mix.0", 1828 "ctu.1", "ctu.0", 1829 "dvc.0", "dvc.1", 1830 "clk_a", "clk_b", "clk_c", "clk_i"; 1831 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1832 resets = <&cpg 1005>, 1833 <&cpg 1006>, <&cpg 1007>, 1834 <&cpg 1008>, <&cpg 1009>, 1835 <&cpg 1010>, <&cpg 1011>, 1836 <&cpg 1012>, <&cpg 1013>, 1837 <&cpg 1014>, <&cpg 1015>; 1838 reset-names = "ssi-all", 1839 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1840 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1841 "ssi.1", "ssi.0"; 1842 status = "disabled"; 1843 1844 rcar_sound,dvc { 1845 dvc0: dvc-0 { 1846 dmas = <&audma1 0xbc>; 1847 dma-names = "tx"; 1848 }; 1849 dvc1: dvc-1 { 1850 dmas = <&audma1 0xbe>; 1851 dma-names = "tx"; 1852 }; 1853 }; 1854 1855 rcar_sound,mix { 1856 mix0: mix-0 { }; 1857 mix1: mix-1 { }; 1858 }; 1859 1860 rcar_sound,ctu { 1861 ctu00: ctu-0 { }; 1862 ctu01: ctu-1 { }; 1863 ctu02: ctu-2 { }; 1864 ctu03: ctu-3 { }; 1865 ctu10: ctu-4 { }; 1866 ctu11: ctu-5 { }; 1867 ctu12: ctu-6 { }; 1868 ctu13: ctu-7 { }; 1869 }; 1870 1871 rcar_sound,src { 1872 src0: src-0 { 1873 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 1874 dmas = <&audma0 0x85>, <&audma1 0x9a>; 1875 dma-names = "rx", "tx"; 1876 }; 1877 src1: src-1 { 1878 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1879 dmas = <&audma0 0x87>, <&audma1 0x9c>; 1880 dma-names = "rx", "tx"; 1881 }; 1882 src2: src-2 { 1883 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1884 dmas = <&audma0 0x89>, <&audma1 0x9e>; 1885 dma-names = "rx", "tx"; 1886 }; 1887 src3: src-3 { 1888 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1889 dmas = <&audma0 0x8b>, <&audma1 0xa0>; 1890 dma-names = "rx", "tx"; 1891 }; 1892 src4: src-4 { 1893 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1894 dmas = <&audma0 0x8d>, <&audma1 0xb0>; 1895 dma-names = "rx", "tx"; 1896 }; 1897 src5: src-5 { 1898 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1899 dmas = <&audma0 0x8f>, <&audma1 0xb2>; 1900 dma-names = "rx", "tx"; 1901 }; 1902 src6: src-6 { 1903 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1904 dmas = <&audma0 0x91>, <&audma1 0xb4>; 1905 dma-names = "rx", "tx"; 1906 }; 1907 src7: src-7 { 1908 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 1909 dmas = <&audma0 0x93>, <&audma1 0xb6>; 1910 dma-names = "rx", "tx"; 1911 }; 1912 src8: src-8 { 1913 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 1914 dmas = <&audma0 0x95>, <&audma1 0xb8>; 1915 dma-names = "rx", "tx"; 1916 }; 1917 src9: src-9 { 1918 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 1919 dmas = <&audma0 0x97>, <&audma1 0xba>; 1920 dma-names = "rx", "tx"; 1921 }; 1922 }; 1923 1924 rcar_sound,ssi { 1925 ssi0: ssi-0 { 1926 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 1927 dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>; 1928 dma-names = "rx", "tx", "rxu", "txu"; 1929 }; 1930 ssi1: ssi-1 { 1931 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 1932 dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>; 1933 dma-names = "rx", "tx", "rxu", "txu"; 1934 }; 1935 ssi2: ssi-2 { 1936 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 1937 dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>; 1938 dma-names = "rx", "tx", "rxu", "txu"; 1939 }; 1940 ssi3: ssi-3 { 1941 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 1942 dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>; 1943 dma-names = "rx", "tx", "rxu", "txu"; 1944 }; 1945 ssi4: ssi-4 { 1946 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 1947 dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>; 1948 dma-names = "rx", "tx", "rxu", "txu"; 1949 }; 1950 ssi5: ssi-5 { 1951 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 1952 dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>; 1953 dma-names = "rx", "tx", "rxu", "txu"; 1954 }; 1955 ssi6: ssi-6 { 1956 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 1957 dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>; 1958 dma-names = "rx", "tx", "rxu", "txu"; 1959 }; 1960 ssi7: ssi-7 { 1961 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 1962 dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>; 1963 dma-names = "rx", "tx", "rxu", "txu"; 1964 }; 1965 ssi8: ssi-8 { 1966 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 1967 dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>; 1968 dma-names = "rx", "tx", "rxu", "txu"; 1969 }; 1970 ssi9: ssi-9 { 1971 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 1972 dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>; 1973 dma-names = "rx", "tx", "rxu", "txu"; 1974 }; 1975 }; 1976 1977 ports { 1978 #address-cells = <1>; 1979 #size-cells = <0>; 1980 port@0 { 1981 reg = <0>; 1982 }; 1983 port@1 { 1984 reg = <1>; 1985 }; 1986 port@2 { 1987 reg = <2>; 1988 }; 1989 }; 1990 }; 1991 1992 audma0: dma-controller@ec700000 { 1993 compatible = "renesas,dmac-r8a7795", 1994 "renesas,rcar-dmac"; 1995 reg = <0 0xec700000 0 0x10000>; 1996 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH 1997 GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH 1998 GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH 1999 GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH 2000 GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH 2001 GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH 2002 GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH 2003 GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH 2004 GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH 2005 GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH 2006 GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH 2007 GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH 2008 GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH 2009 GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH 2010 GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH 2011 GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH 2012 GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; 2013 interrupt-names = "error", 2014 "ch0", "ch1", "ch2", "ch3", 2015 "ch4", "ch5", "ch6", "ch7", 2016 "ch8", "ch9", "ch10", "ch11", 2017 "ch12", "ch13", "ch14", "ch15"; 2018 clocks = <&cpg CPG_MOD 502>; 2019 clock-names = "fck"; 2020 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2021 resets = <&cpg 502>; 2022 #dma-cells = <1>; 2023 dma-channels = <16>; 2024 iommus = <&ipmmu_mp0 0>, <&ipmmu_mp0 1>, 2025 <&ipmmu_mp0 2>, <&ipmmu_mp0 3>, 2026 <&ipmmu_mp0 4>, <&ipmmu_mp0 5>, 2027 <&ipmmu_mp0 6>, <&ipmmu_mp0 7>, 2028 <&ipmmu_mp0 8>, <&ipmmu_mp0 9>, 2029 <&ipmmu_mp0 10>, <&ipmmu_mp0 11>, 2030 <&ipmmu_mp0 12>, <&ipmmu_mp0 13>, 2031 <&ipmmu_mp0 14>, <&ipmmu_mp0 15>; 2032 }; 2033 2034 audma1: dma-controller@ec720000 { 2035 compatible = "renesas,dmac-r8a7795", 2036 "renesas,rcar-dmac"; 2037 reg = <0 0xec720000 0 0x10000>; 2038 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH 2039 GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH 2040 GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH 2041 GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH 2042 GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH 2043 GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH 2044 GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH 2045 GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH 2046 GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH 2047 GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH 2048 GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH 2049 GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH 2050 GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH 2051 GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH 2052 GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH 2053 GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH 2054 GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>; 2055 interrupt-names = "error", 2056 "ch0", "ch1", "ch2", "ch3", 2057 "ch4", "ch5", "ch6", "ch7", 2058 "ch8", "ch9", "ch10", "ch11", 2059 "ch12", "ch13", "ch14", "ch15"; 2060 clocks = <&cpg CPG_MOD 501>; 2061 clock-names = "fck"; 2062 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2063 resets = <&cpg 501>; 2064 #dma-cells = <1>; 2065 dma-channels = <16>; 2066 iommus = <&ipmmu_mp0 16>, <&ipmmu_mp0 17>, 2067 <&ipmmu_mp0 18>, <&ipmmu_mp0 19>, 2068 <&ipmmu_mp0 20>, <&ipmmu_mp0 21>, 2069 <&ipmmu_mp0 22>, <&ipmmu_mp0 23>, 2070 <&ipmmu_mp0 24>, <&ipmmu_mp0 25>, 2071 <&ipmmu_mp0 26>, <&ipmmu_mp0 27>, 2072 <&ipmmu_mp0 28>, <&ipmmu_mp0 29>, 2073 <&ipmmu_mp0 30>, <&ipmmu_mp0 31>; 2074 }; 2075 2076 xhci0: usb@ee000000 { 2077 compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci"; 2078 reg = <0 0xee000000 0 0xc00>; 2079 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 2080 clocks = <&cpg CPG_MOD 328>; 2081 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2082 resets = <&cpg 328>; 2083 status = "disabled"; 2084 }; 2085 2086 usb3_peri0: usb@ee020000 { 2087 compatible = "renesas,r8a7795-usb3-peri", 2088 "renesas,rcar-gen3-usb3-peri"; 2089 reg = <0 0xee020000 0 0x400>; 2090 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 2091 clocks = <&cpg CPG_MOD 328>; 2092 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2093 resets = <&cpg 328>; 2094 status = "disabled"; 2095 }; 2096 2097 ohci0: usb@ee080000 { 2098 compatible = "generic-ohci"; 2099 reg = <0 0xee080000 0 0x100>; 2100 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2101 clocks = <&cpg CPG_MOD 703>; 2102 phys = <&usb2_phy0>; 2103 phy-names = "usb"; 2104 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2105 resets = <&cpg 703>; 2106 status = "disabled"; 2107 }; 2108 2109 ohci1: usb@ee0a0000 { 2110 compatible = "generic-ohci"; 2111 reg = <0 0xee0a0000 0 0x100>; 2112 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 2113 clocks = <&cpg CPG_MOD 702>; 2114 phys = <&usb2_phy1>; 2115 phy-names = "usb"; 2116 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2117 resets = <&cpg 702>; 2118 status = "disabled"; 2119 }; 2120 2121 ohci2: usb@ee0c0000 { 2122 compatible = "generic-ohci"; 2123 reg = <0 0xee0c0000 0 0x100>; 2124 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 2125 clocks = <&cpg CPG_MOD 701>; 2126 phys = <&usb2_phy2>; 2127 phy-names = "usb"; 2128 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2129 resets = <&cpg 701>; 2130 status = "disabled"; 2131 }; 2132 2133 ohci3: usb@ee0e0000 { 2134 compatible = "generic-ohci"; 2135 reg = <0 0xee0e0000 0 0x100>; 2136 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 2137 clocks = <&cpg CPG_MOD 700>; 2138 phys = <&usb2_phy3>; 2139 phy-names = "usb"; 2140 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2141 resets = <&cpg 700>; 2142 status = "disabled"; 2143 }; 2144 2145 ehci0: usb@ee080100 { 2146 compatible = "generic-ehci"; 2147 reg = <0 0xee080100 0 0x100>; 2148 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2149 clocks = <&cpg CPG_MOD 703>; 2150 phys = <&usb2_phy0>; 2151 phy-names = "usb"; 2152 companion = <&ohci0>; 2153 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2154 resets = <&cpg 703>; 2155 status = "disabled"; 2156 }; 2157 2158 ehci1: usb@ee0a0100 { 2159 compatible = "generic-ehci"; 2160 reg = <0 0xee0a0100 0 0x100>; 2161 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 2162 clocks = <&cpg CPG_MOD 702>; 2163 phys = <&usb2_phy1>; 2164 phy-names = "usb"; 2165 companion = <&ohci1>; 2166 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2167 resets = <&cpg 702>; 2168 status = "disabled"; 2169 }; 2170 2171 ehci2: usb@ee0c0100 { 2172 compatible = "generic-ehci"; 2173 reg = <0 0xee0c0100 0 0x100>; 2174 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 2175 clocks = <&cpg CPG_MOD 701>; 2176 phys = <&usb2_phy2>; 2177 phy-names = "usb"; 2178 companion = <&ohci2>; 2179 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2180 resets = <&cpg 701>; 2181 status = "disabled"; 2182 }; 2183 2184 ehci3: usb@ee0e0100 { 2185 compatible = "generic-ehci"; 2186 reg = <0 0xee0e0100 0 0x100>; 2187 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 2188 clocks = <&cpg CPG_MOD 700>; 2189 phys = <&usb2_phy3>; 2190 phy-names = "usb"; 2191 companion = <&ohci3>; 2192 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2193 resets = <&cpg 700>; 2194 status = "disabled"; 2195 }; 2196 2197 usb2_phy0: usb-phy@ee080200 { 2198 compatible = "renesas,usb2-phy-r8a7795", 2199 "renesas,rcar-gen3-usb2-phy"; 2200 reg = <0 0xee080200 0 0x700>; 2201 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2202 clocks = <&cpg CPG_MOD 703>; 2203 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2204 resets = <&cpg 703>; 2205 #phy-cells = <0>; 2206 status = "disabled"; 2207 }; 2208 2209 usb2_phy1: usb-phy@ee0a0200 { 2210 compatible = "renesas,usb2-phy-r8a7795", 2211 "renesas,rcar-gen3-usb2-phy"; 2212 reg = <0 0xee0a0200 0 0x700>; 2213 clocks = <&cpg CPG_MOD 702>; 2214 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2215 resets = <&cpg 702>; 2216 #phy-cells = <0>; 2217 status = "disabled"; 2218 }; 2219 2220 usb2_phy2: usb-phy@ee0c0200 { 2221 compatible = "renesas,usb2-phy-r8a7795", 2222 "renesas,rcar-gen3-usb2-phy"; 2223 reg = <0 0xee0c0200 0 0x700>; 2224 clocks = <&cpg CPG_MOD 701>; 2225 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2226 resets = <&cpg 701>; 2227 #phy-cells = <0>; 2228 status = "disabled"; 2229 }; 2230 2231 usb2_phy3: usb-phy@ee0e0200 { 2232 compatible = "renesas,usb2-phy-r8a7795", 2233 "renesas,rcar-gen3-usb2-phy"; 2234 reg = <0 0xee0e0200 0 0x700>; 2235 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 2236 clocks = <&cpg CPG_MOD 700>; 2237 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2238 resets = <&cpg 700>; 2239 #phy-cells = <0>; 2240 status = "disabled"; 2241 }; 2242 2243 sdhi0: sd@ee100000 { 2244 compatible = "renesas,sdhi-r8a7795", 2245 "renesas,rcar-gen3-sdhi"; 2246 reg = <0 0xee100000 0 0x2000>; 2247 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 2248 clocks = <&cpg CPG_MOD 314>; 2249 max-frequency = <200000000>; 2250 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2251 resets = <&cpg 314>; 2252 status = "disabled"; 2253 }; 2254 2255 sdhi1: sd@ee120000 { 2256 compatible = "renesas,sdhi-r8a7795", 2257 "renesas,rcar-gen3-sdhi"; 2258 reg = <0 0xee120000 0 0x2000>; 2259 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 2260 clocks = <&cpg CPG_MOD 313>; 2261 max-frequency = <200000000>; 2262 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2263 resets = <&cpg 313>; 2264 status = "disabled"; 2265 }; 2266 2267 sdhi2: sd@ee140000 { 2268 compatible = "renesas,sdhi-r8a7795", 2269 "renesas,rcar-gen3-sdhi"; 2270 reg = <0 0xee140000 0 0x2000>; 2271 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 2272 clocks = <&cpg CPG_MOD 312>; 2273 max-frequency = <200000000>; 2274 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2275 resets = <&cpg 312>; 2276 status = "disabled"; 2277 }; 2278 2279 sdhi3: sd@ee160000 { 2280 compatible = "renesas,sdhi-r8a7795", 2281 "renesas,rcar-gen3-sdhi"; 2282 reg = <0 0xee160000 0 0x2000>; 2283 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 2284 clocks = <&cpg CPG_MOD 311>; 2285 max-frequency = <200000000>; 2286 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2287 resets = <&cpg 311>; 2288 status = "disabled"; 2289 }; 2290 2291 sata: sata@ee300000 { 2292 compatible = "renesas,sata-r8a7795", 2293 "renesas,rcar-gen3-sata"; 2294 reg = <0 0xee300000 0 0x200000>; 2295 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; 2296 clocks = <&cpg CPG_MOD 815>; 2297 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2298 resets = <&cpg 815>; 2299 status = "disabled"; 2300 iommus = <&ipmmu_hc 2>; 2301 }; 2302 2303 gic: interrupt-controller@f1010000 { 2304 compatible = "arm,gic-400"; 2305 #interrupt-cells = <3>; 2306 #address-cells = <0>; 2307 interrupt-controller; 2308 reg = <0x0 0xf1010000 0 0x1000>, 2309 <0x0 0xf1020000 0 0x20000>, 2310 <0x0 0xf1040000 0 0x20000>, 2311 <0x0 0xf1060000 0 0x20000>; 2312 interrupts = <GIC_PPI 9 2313 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>; 2314 clocks = <&cpg CPG_MOD 408>; 2315 clock-names = "clk"; 2316 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2317 resets = <&cpg 408>; 2318 }; 2319 2320 pciec0: pcie@fe000000 { 2321 compatible = "renesas,pcie-r8a7795", 2322 "renesas,pcie-rcar-gen3"; 2323 reg = <0 0xfe000000 0 0x80000>; 2324 #address-cells = <3>; 2325 #size-cells = <2>; 2326 bus-range = <0x00 0xff>; 2327 device_type = "pci"; 2328 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000 2329 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000 2330 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000 2331 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 2332 /* Map all possible DDR as inbound ranges */ 2333 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>; 2334 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 2335 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 2336 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 2337 #interrupt-cells = <1>; 2338 interrupt-map-mask = <0 0 0 0>; 2339 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 2340 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 2341 clock-names = "pcie", "pcie_bus"; 2342 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2343 resets = <&cpg 319>; 2344 status = "disabled"; 2345 }; 2346 2347 pciec1: pcie@ee800000 { 2348 compatible = "renesas,pcie-r8a7795", 2349 "renesas,pcie-rcar-gen3"; 2350 reg = <0 0xee800000 0 0x80000>; 2351 #address-cells = <3>; 2352 #size-cells = <2>; 2353 bus-range = <0x00 0xff>; 2354 device_type = "pci"; 2355 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000 2356 0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000 2357 0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000 2358 0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>; 2359 /* Map all possible DDR as inbound ranges */ 2360 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>; 2361 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, 2362 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, 2363 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 2364 #interrupt-cells = <1>; 2365 interrupt-map-mask = <0 0 0 0>; 2366 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 2367 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>; 2368 clock-names = "pcie", "pcie_bus"; 2369 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2370 resets = <&cpg 318>; 2371 status = "disabled"; 2372 }; 2373 2374 imr-lx4@fe860000 { 2375 compatible = "renesas,r8a7795-imr-lx4", 2376 "renesas,imr-lx4"; 2377 reg = <0 0xfe860000 0 0x2000>; 2378 interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>; 2379 clocks = <&cpg CPG_MOD 823>; 2380 power-domains = <&sysc R8A7795_PD_A3VC>; 2381 resets = <&cpg 823>; 2382 }; 2383 2384 imr-lx4@fe870000 { 2385 compatible = "renesas,r8a7795-imr-lx4", 2386 "renesas,imr-lx4"; 2387 reg = <0 0xfe870000 0 0x2000>; 2388 interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>; 2389 clocks = <&cpg CPG_MOD 822>; 2390 power-domains = <&sysc R8A7795_PD_A3VC>; 2391 resets = <&cpg 822>; 2392 }; 2393 2394 imr-lx4@fe880000 { 2395 compatible = "renesas,r8a7795-imr-lx4", 2396 "renesas,imr-lx4"; 2397 reg = <0 0xfe880000 0 0x2000>; 2398 interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>; 2399 clocks = <&cpg CPG_MOD 821>; 2400 power-domains = <&sysc R8A7795_PD_A3VC>; 2401 resets = <&cpg 821>; 2402 }; 2403 2404 imr-lx4@fe890000 { 2405 compatible = "renesas,r8a7795-imr-lx4", 2406 "renesas,imr-lx4"; 2407 reg = <0 0xfe890000 0 0x2000>; 2408 interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>; 2409 clocks = <&cpg CPG_MOD 820>; 2410 power-domains = <&sysc R8A7795_PD_A3VC>; 2411 resets = <&cpg 820>; 2412 }; 2413 2414 fdp1@fe940000 { 2415 compatible = "renesas,fdp1"; 2416 reg = <0 0xfe940000 0 0x2400>; 2417 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>; 2418 clocks = <&cpg CPG_MOD 119>; 2419 power-domains = <&sysc R8A7795_PD_A3VP>; 2420 resets = <&cpg 119>; 2421 renesas,fcp = <&fcpf0>; 2422 }; 2423 2424 fdp1@fe944000 { 2425 compatible = "renesas,fdp1"; 2426 reg = <0 0xfe944000 0 0x2400>; 2427 interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>; 2428 clocks = <&cpg CPG_MOD 118>; 2429 power-domains = <&sysc R8A7795_PD_A3VP>; 2430 resets = <&cpg 118>; 2431 renesas,fcp = <&fcpf1>; 2432 }; 2433 2434 fcpf0: fcp@fe950000 { 2435 compatible = "renesas,fcpf"; 2436 reg = <0 0xfe950000 0 0x200>; 2437 clocks = <&cpg CPG_MOD 615>; 2438 power-domains = <&sysc R8A7795_PD_A3VP>; 2439 resets = <&cpg 615>; 2440 iommus = <&ipmmu_vp0 0>; 2441 }; 2442 2443 fcpf1: fcp@fe951000 { 2444 compatible = "renesas,fcpf"; 2445 reg = <0 0xfe951000 0 0x200>; 2446 clocks = <&cpg CPG_MOD 614>; 2447 power-domains = <&sysc R8A7795_PD_A3VP>; 2448 resets = <&cpg 614>; 2449 iommus = <&ipmmu_vp1 1>; 2450 }; 2451 2452 fcpvb0: fcp@fe96f000 { 2453 compatible = "renesas,fcpv"; 2454 reg = <0 0xfe96f000 0 0x200>; 2455 clocks = <&cpg CPG_MOD 607>; 2456 power-domains = <&sysc R8A7795_PD_A3VP>; 2457 resets = <&cpg 607>; 2458 iommus = <&ipmmu_vp0 5>; 2459 }; 2460 2461 fcpvb1: fcp@fe92f000 { 2462 compatible = "renesas,fcpv"; 2463 reg = <0 0xfe92f000 0 0x200>; 2464 clocks = <&cpg CPG_MOD 606>; 2465 power-domains = <&sysc R8A7795_PD_A3VP>; 2466 resets = <&cpg 606>; 2467 iommus = <&ipmmu_vp1 7>; 2468 }; 2469 2470 fcpvi0: fcp@fe9af000 { 2471 compatible = "renesas,fcpv"; 2472 reg = <0 0xfe9af000 0 0x200>; 2473 clocks = <&cpg CPG_MOD 611>; 2474 power-domains = <&sysc R8A7795_PD_A3VP>; 2475 resets = <&cpg 611>; 2476 iommus = <&ipmmu_vp0 8>; 2477 }; 2478 2479 fcpvi1: fcp@fe9bf000 { 2480 compatible = "renesas,fcpv"; 2481 reg = <0 0xfe9bf000 0 0x200>; 2482 clocks = <&cpg CPG_MOD 610>; 2483 power-domains = <&sysc R8A7795_PD_A3VP>; 2484 resets = <&cpg 610>; 2485 iommus = <&ipmmu_vp1 9>; 2486 }; 2487 2488 fcpvd0: fcp@fea27000 { 2489 compatible = "renesas,fcpv"; 2490 reg = <0 0xfea27000 0 0x200>; 2491 clocks = <&cpg CPG_MOD 603>; 2492 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2493 resets = <&cpg 603>; 2494 iommus = <&ipmmu_vi0 8>; 2495 }; 2496 2497 fcpvd1: fcp@fea2f000 { 2498 compatible = "renesas,fcpv"; 2499 reg = <0 0xfea2f000 0 0x200>; 2500 clocks = <&cpg CPG_MOD 602>; 2501 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2502 resets = <&cpg 602>; 2503 iommus = <&ipmmu_vi0 9>; 2504 }; 2505 2506 fcpvd2: fcp@fea37000 { 2507 compatible = "renesas,fcpv"; 2508 reg = <0 0xfea37000 0 0x200>; 2509 clocks = <&cpg CPG_MOD 601>; 2510 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2511 resets = <&cpg 601>; 2512 iommus = <&ipmmu_vi1 10>; 2513 }; 2514 2515 vspbd: vsp@fe960000 { 2516 compatible = "renesas,vsp2"; 2517 reg = <0 0xfe960000 0 0x8000>; 2518 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 2519 clocks = <&cpg CPG_MOD 626>; 2520 power-domains = <&sysc R8A7795_PD_A3VP>; 2521 resets = <&cpg 626>; 2522 2523 renesas,fcp = <&fcpvb0>; 2524 }; 2525 2526 vspbc: vsp@fe920000 { 2527 compatible = "renesas,vsp2"; 2528 reg = <0 0xfe920000 0 0x8000>; 2529 interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>; 2530 clocks = <&cpg CPG_MOD 624>; 2531 power-domains = <&sysc R8A7795_PD_A3VP>; 2532 resets = <&cpg 624>; 2533 2534 renesas,fcp = <&fcpvb1>; 2535 }; 2536 2537 vspd0: vsp@fea20000 { 2538 compatible = "renesas,vsp2"; 2539 reg = <0 0xfea20000 0 0x5000>; 2540 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 2541 clocks = <&cpg CPG_MOD 623>; 2542 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2543 resets = <&cpg 623>; 2544 2545 renesas,fcp = <&fcpvd0>; 2546 }; 2547 2548 vspd1: vsp@fea28000 { 2549 compatible = "renesas,vsp2"; 2550 reg = <0 0xfea28000 0 0x5000>; 2551 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; 2552 clocks = <&cpg CPG_MOD 622>; 2553 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2554 resets = <&cpg 622>; 2555 2556 renesas,fcp = <&fcpvd1>; 2557 }; 2558 2559 vspd2: vsp@fea30000 { 2560 compatible = "renesas,vsp2"; 2561 reg = <0 0xfea30000 0 0x5000>; 2562 interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>; 2563 clocks = <&cpg CPG_MOD 621>; 2564 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2565 resets = <&cpg 621>; 2566 2567 renesas,fcp = <&fcpvd2>; 2568 }; 2569 2570 vspi0: vsp@fe9a0000 { 2571 compatible = "renesas,vsp2"; 2572 reg = <0 0xfe9a0000 0 0x8000>; 2573 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; 2574 clocks = <&cpg CPG_MOD 631>; 2575 power-domains = <&sysc R8A7795_PD_A3VP>; 2576 resets = <&cpg 631>; 2577 2578 renesas,fcp = <&fcpvi0>; 2579 }; 2580 2581 vspi1: vsp@fe9b0000 { 2582 compatible = "renesas,vsp2"; 2583 reg = <0 0xfe9b0000 0 0x8000>; 2584 interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>; 2585 clocks = <&cpg CPG_MOD 630>; 2586 power-domains = <&sysc R8A7795_PD_A3VP>; 2587 resets = <&cpg 630>; 2588 2589 renesas,fcp = <&fcpvi1>; 2590 }; 2591 2592 csi20: csi2@fea80000 { 2593 compatible = "renesas,r8a7795-csi2"; 2594 reg = <0 0xfea80000 0 0x10000>; 2595 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 2596 clocks = <&cpg CPG_MOD 714>; 2597 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2598 resets = <&cpg 714>; 2599 status = "disabled"; 2600 2601 ports { 2602 #address-cells = <1>; 2603 #size-cells = <0>; 2604 2605 port@1 { 2606 #address-cells = <1>; 2607 #size-cells = <0>; 2608 2609 reg = <1>; 2610 2611 csi20vin0: endpoint@0 { 2612 reg = <0>; 2613 remote-endpoint = <&vin0csi20>; 2614 }; 2615 csi20vin1: endpoint@1 { 2616 reg = <1>; 2617 remote-endpoint = <&vin1csi20>; 2618 }; 2619 csi20vin2: endpoint@2 { 2620 reg = <2>; 2621 remote-endpoint = <&vin2csi20>; 2622 }; 2623 csi20vin3: endpoint@3 { 2624 reg = <3>; 2625 remote-endpoint = <&vin3csi20>; 2626 }; 2627 csi20vin4: endpoint@4 { 2628 reg = <4>; 2629 remote-endpoint = <&vin4csi20>; 2630 }; 2631 csi20vin5: endpoint@5 { 2632 reg = <5>; 2633 remote-endpoint = <&vin5csi20>; 2634 }; 2635 csi20vin6: endpoint@6 { 2636 reg = <6>; 2637 remote-endpoint = <&vin6csi20>; 2638 }; 2639 csi20vin7: endpoint@7 { 2640 reg = <7>; 2641 remote-endpoint = <&vin7csi20>; 2642 }; 2643 }; 2644 }; 2645 }; 2646 2647 csi40: csi2@feaa0000 { 2648 compatible = "renesas,r8a7795-csi2"; 2649 reg = <0 0xfeaa0000 0 0x10000>; 2650 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 2651 clocks = <&cpg CPG_MOD 716>; 2652 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2653 resets = <&cpg 716>; 2654 status = "disabled"; 2655 2656 ports { 2657 #address-cells = <1>; 2658 #size-cells = <0>; 2659 2660 port@1 { 2661 #address-cells = <1>; 2662 #size-cells = <0>; 2663 2664 reg = <1>; 2665 2666 csi40vin0: endpoint@0 { 2667 reg = <0>; 2668 remote-endpoint = <&vin0csi40>; 2669 }; 2670 csi40vin1: endpoint@1 { 2671 reg = <1>; 2672 remote-endpoint = <&vin1csi40>; 2673 }; 2674 csi40vin2: endpoint@2 { 2675 reg = <2>; 2676 remote-endpoint = <&vin2csi40>; 2677 }; 2678 csi40vin3: endpoint@3 { 2679 reg = <3>; 2680 remote-endpoint = <&vin3csi40>; 2681 }; 2682 }; 2683 }; 2684 }; 2685 2686 csi41: csi2@feab0000 { 2687 compatible = "renesas,r8a7795-csi2"; 2688 reg = <0 0xfeab0000 0 0x10000>; 2689 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>; 2690 clocks = <&cpg CPG_MOD 715>; 2691 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2692 resets = <&cpg 715>; 2693 status = "disabled"; 2694 2695 ports { 2696 #address-cells = <1>; 2697 #size-cells = <0>; 2698 2699 port@1 { 2700 #address-cells = <1>; 2701 #size-cells = <0>; 2702 2703 reg = <1>; 2704 2705 csi41vin4: endpoint@0 { 2706 reg = <0>; 2707 remote-endpoint = <&vin4csi41>; 2708 }; 2709 csi41vin5: endpoint@1 { 2710 reg = <1>; 2711 remote-endpoint = <&vin5csi41>; 2712 }; 2713 csi41vin6: endpoint@2 { 2714 reg = <2>; 2715 remote-endpoint = <&vin6csi41>; 2716 }; 2717 csi41vin7: endpoint@3 { 2718 reg = <3>; 2719 remote-endpoint = <&vin7csi41>; 2720 }; 2721 }; 2722 }; 2723 }; 2724 2725 hdmi0: hdmi@fead0000 { 2726 compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi"; 2727 reg = <0 0xfead0000 0 0x10000>; 2728 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>; 2729 clocks = <&cpg CPG_MOD 729>, <&cpg CPG_CORE R8A7795_CLK_HDMI>; 2730 clock-names = "iahb", "isfr"; 2731 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2732 resets = <&cpg 729>; 2733 status = "disabled"; 2734 2735 ports { 2736 #address-cells = <1>; 2737 #size-cells = <0>; 2738 port@0 { 2739 reg = <0>; 2740 dw_hdmi0_in: endpoint { 2741 remote-endpoint = <&du_out_hdmi0>; 2742 }; 2743 }; 2744 port@1 { 2745 reg = <1>; 2746 }; 2747 port@2 { 2748 /* HDMI sound */ 2749 reg = <2>; 2750 }; 2751 }; 2752 }; 2753 2754 hdmi1: hdmi@feae0000 { 2755 compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi"; 2756 reg = <0 0xfeae0000 0 0x10000>; 2757 interrupts = <GIC_SPI 436 IRQ_TYPE_LEVEL_HIGH>; 2758 clocks = <&cpg CPG_MOD 728>, <&cpg CPG_CORE R8A7795_CLK_HDMI>; 2759 clock-names = "iahb", "isfr"; 2760 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2761 resets = <&cpg 728>; 2762 status = "disabled"; 2763 2764 ports { 2765 #address-cells = <1>; 2766 #size-cells = <0>; 2767 port@0 { 2768 reg = <0>; 2769 dw_hdmi1_in: endpoint { 2770 remote-endpoint = <&du_out_hdmi1>; 2771 }; 2772 }; 2773 port@1 { 2774 reg = <1>; 2775 }; 2776 port@2 { 2777 /* HDMI sound */ 2778 reg = <2>; 2779 }; 2780 }; 2781 }; 2782 2783 du: display@feb00000 { 2784 compatible = "renesas,du-r8a7795"; 2785 reg = <0 0xfeb00000 0 0x80000>, 2786 <0 0xfeb90000 0 0x14>; 2787 reg-names = "du", "lvds.0"; 2788 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 2789 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, 2790 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>, 2791 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>; 2792 clocks = <&cpg CPG_MOD 724>, 2793 <&cpg CPG_MOD 723>, 2794 <&cpg CPG_MOD 722>, 2795 <&cpg CPG_MOD 721>, 2796 <&cpg CPG_MOD 727>; 2797 clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0"; 2798 vsps = <&vspd0 0 &vspd1 0 &vspd2 0 &vspd0 1>; 2799 status = "disabled"; 2800 2801 ports { 2802 #address-cells = <1>; 2803 #size-cells = <0>; 2804 2805 port@0 { 2806 reg = <0>; 2807 du_out_rgb: endpoint { 2808 }; 2809 }; 2810 port@1 { 2811 reg = <1>; 2812 du_out_hdmi0: endpoint { 2813 remote-endpoint = <&dw_hdmi0_in>; 2814 }; 2815 }; 2816 port@2 { 2817 reg = <2>; 2818 du_out_hdmi1: endpoint { 2819 remote-endpoint = <&dw_hdmi1_in>; 2820 }; 2821 }; 2822 port@3 { 2823 reg = <3>; 2824 du_out_lvds0: endpoint { 2825 }; 2826 }; 2827 }; 2828 }; 2829 2830 prr: chipid@fff00044 { 2831 compatible = "renesas,prr"; 2832 reg = <0 0xfff00044 0 4>; 2833 }; 2834 }; 2835 2836 thermal-zones { 2837 sensor_thermal1: sensor-thermal1 { 2838 polling-delay-passive = <250>; 2839 polling-delay = <1000>; 2840 thermal-sensors = <&tsc 0>; 2841 2842 trips { 2843 sensor1_passive: sensor1-passive { 2844 temperature = <95000>; 2845 hysteresis = <1000>; 2846 type = "passive"; 2847 }; 2848 sensor1_crit: sensor1-crit { 2849 temperature = <120000>; 2850 hysteresis = <1000>; 2851 type = "critical"; 2852 }; 2853 }; 2854 2855 cooling-maps { 2856 map0 { 2857 trip = <&sensor1_passive>; 2858 cooling-device = <&a57_0 4 4>; 2859 }; 2860 }; 2861 }; 2862 2863 sensor_thermal2: sensor-thermal2 { 2864 polling-delay-passive = <250>; 2865 polling-delay = <1000>; 2866 thermal-sensors = <&tsc 1>; 2867 2868 trips { 2869 sensor2_passive: sensor2-passive { 2870 temperature = <95000>; 2871 hysteresis = <1000>; 2872 type = "passive"; 2873 }; 2874 sensor2_crit: sensor2-crit { 2875 temperature = <120000>; 2876 hysteresis = <1000>; 2877 type = "critical"; 2878 }; 2879 }; 2880 2881 cooling-maps { 2882 map0 { 2883 trip = <&sensor2_passive>; 2884 cooling-device = <&a57_0 4 4>; 2885 }; 2886 }; 2887 }; 2888 2889 sensor_thermal3: sensor-thermal3 { 2890 polling-delay-passive = <250>; 2891 polling-delay = <1000>; 2892 thermal-sensors = <&tsc 2>; 2893 2894 trips { 2895 sensor3_passive: sensor3-passive { 2896 temperature = <95000>; 2897 hysteresis = <1000>; 2898 type = "passive"; 2899 }; 2900 sensor3_crit: sensor3-crit { 2901 temperature = <120000>; 2902 hysteresis = <1000>; 2903 type = "critical"; 2904 }; 2905 }; 2906 2907 cooling-maps { 2908 map0 { 2909 trip = <&sensor3_passive>; 2910 cooling-device = <&a57_0 4 4>; 2911 }; 2912 }; 2913 }; 2914 }; 2915 2916 timer { 2917 compatible = "arm,armv8-timer"; 2918 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 2919 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 2920 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 2921 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>; 2922 }; 2923 2924 /* External USB clocks - can be overridden by the board */ 2925 usb3s0_clk: usb3s0 { 2926 compatible = "fixed-clock"; 2927 #clock-cells = <0>; 2928 clock-frequency = <0>; 2929 }; 2930 2931 usb_extal_clk: usb_extal { 2932 compatible = "fixed-clock"; 2933 #clock-cells = <0>; 2934 clock-frequency = <0>; 2935 }; 2936}; 2937