xref: /openbmc/u-boot/arch/arm/dts/r8a7795-h3ulcb.dts (revision f77d4410)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the H3ULCB (R-Car Starter Kit Premier) board
4 *
5 * Copyright (C) 2016 Renesas Electronics Corp.
6 * Copyright (C) 2016 Cogent Embedded, Inc.
7 */
8
9/dts-v1/;
10#include "r8a7795.dtsi"
11#include "ulcb.dtsi"
12
13/ {
14	model = "Renesas H3ULCB board based on r8a7795 ES2.0+";
15	compatible = "renesas,h3ulcb", "renesas,r8a7795";
16
17	memory@48000000 {
18		device_type = "memory";
19		/* first 128MB is reserved for secure area. */
20		reg = <0x0 0x48000000 0x0 0x38000000>;
21	};
22
23	memory@500000000 {
24		device_type = "memory";
25		reg = <0x5 0x00000000 0x0 0x40000000>;
26	};
27
28	memory@600000000 {
29		device_type = "memory";
30		reg = <0x6 0x00000000 0x0 0x40000000>;
31	};
32
33	memory@700000000 {
34		device_type = "memory";
35		reg = <0x7 0x00000000 0x0 0x40000000>;
36	};
37};
38
39&du {
40	clocks = <&cpg CPG_MOD 724>,
41		 <&cpg CPG_MOD 723>,
42		 <&cpg CPG_MOD 722>,
43		 <&cpg CPG_MOD 721>,
44		 <&cpg CPG_MOD 727>,
45		 <&versaclock5 1>,
46		 <&versaclock5 3>,
47		 <&versaclock5 4>,
48		 <&versaclock5 2>;
49	clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0",
50		      "dclkin.0", "dclkin.1", "dclkin.2", "dclkin.3";
51};
52