1*83d290c5STom Rini// SPDX-License-Identifier: GPL-2.0 29a26fc5aSMarek Vasut/* 39a26fc5aSMarek Vasut * Device Tree Source for the Alt board 49a26fc5aSMarek Vasut * 59a26fc5aSMarek Vasut * Copyright (C) 2014 Renesas Electronics Corporation 69a26fc5aSMarek Vasut */ 79a26fc5aSMarek Vasut 89a26fc5aSMarek Vasut/dts-v1/; 99a26fc5aSMarek Vasut#include "r8a7794.dtsi" 109a26fc5aSMarek Vasut#include <dt-bindings/gpio/gpio.h> 119a26fc5aSMarek Vasut 129a26fc5aSMarek Vasut/ { 139a26fc5aSMarek Vasut model = "Alt"; 149a26fc5aSMarek Vasut compatible = "renesas,alt", "renesas,r8a7794"; 159a26fc5aSMarek Vasut 169a26fc5aSMarek Vasut aliases { 179a26fc5aSMarek Vasut serial0 = &scif2; 189a26fc5aSMarek Vasut i2c10 = &gpioi2c4; 199a26fc5aSMarek Vasut i2c12 = &i2cexio4; 209a26fc5aSMarek Vasut }; 219a26fc5aSMarek Vasut 229a26fc5aSMarek Vasut chosen { 239a26fc5aSMarek Vasut bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp"; 249a26fc5aSMarek Vasut stdout-path = "serial0:115200n8"; 259a26fc5aSMarek Vasut }; 269a26fc5aSMarek Vasut 279a26fc5aSMarek Vasut memory@40000000 { 289a26fc5aSMarek Vasut device_type = "memory"; 299a26fc5aSMarek Vasut reg = <0 0x40000000 0 0x40000000>; 309a26fc5aSMarek Vasut }; 319a26fc5aSMarek Vasut 329a26fc5aSMarek Vasut d3_3v: regulator-d3-3v { 339a26fc5aSMarek Vasut compatible = "regulator-fixed"; 349a26fc5aSMarek Vasut regulator-name = "D3.3V"; 359a26fc5aSMarek Vasut regulator-min-microvolt = <3300000>; 369a26fc5aSMarek Vasut regulator-max-microvolt = <3300000>; 379a26fc5aSMarek Vasut regulator-boot-on; 389a26fc5aSMarek Vasut regulator-always-on; 399a26fc5aSMarek Vasut }; 409a26fc5aSMarek Vasut 419a26fc5aSMarek Vasut vcc_sdhi0: regulator-vcc-sdhi0 { 429a26fc5aSMarek Vasut compatible = "regulator-fixed"; 439a26fc5aSMarek Vasut 449a26fc5aSMarek Vasut regulator-name = "SDHI0 Vcc"; 459a26fc5aSMarek Vasut regulator-min-microvolt = <3300000>; 469a26fc5aSMarek Vasut regulator-max-microvolt = <3300000>; 479a26fc5aSMarek Vasut 489a26fc5aSMarek Vasut gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>; 499a26fc5aSMarek Vasut enable-active-high; 509a26fc5aSMarek Vasut }; 519a26fc5aSMarek Vasut 529a26fc5aSMarek Vasut vccq_sdhi0: regulator-vccq-sdhi0 { 539a26fc5aSMarek Vasut compatible = "regulator-gpio"; 549a26fc5aSMarek Vasut 559a26fc5aSMarek Vasut regulator-name = "SDHI0 VccQ"; 569a26fc5aSMarek Vasut regulator-min-microvolt = <1800000>; 579a26fc5aSMarek Vasut regulator-max-microvolt = <3300000>; 589a26fc5aSMarek Vasut 599a26fc5aSMarek Vasut gpios = <&gpio2 29 GPIO_ACTIVE_HIGH>; 609a26fc5aSMarek Vasut gpios-states = <1>; 619a26fc5aSMarek Vasut states = <3300000 1 629a26fc5aSMarek Vasut 1800000 0>; 639a26fc5aSMarek Vasut }; 649a26fc5aSMarek Vasut 659a26fc5aSMarek Vasut vcc_sdhi1: regulator-vcc-sdhi1 { 669a26fc5aSMarek Vasut compatible = "regulator-fixed"; 679a26fc5aSMarek Vasut 689a26fc5aSMarek Vasut regulator-name = "SDHI1 Vcc"; 699a26fc5aSMarek Vasut regulator-min-microvolt = <3300000>; 709a26fc5aSMarek Vasut regulator-max-microvolt = <3300000>; 719a26fc5aSMarek Vasut 729a26fc5aSMarek Vasut gpio = <&gpio4 26 GPIO_ACTIVE_HIGH>; 739a26fc5aSMarek Vasut enable-active-high; 749a26fc5aSMarek Vasut }; 759a26fc5aSMarek Vasut 769a26fc5aSMarek Vasut vccq_sdhi1: regulator-vccq-sdhi1 { 779a26fc5aSMarek Vasut compatible = "regulator-gpio"; 789a26fc5aSMarek Vasut 799a26fc5aSMarek Vasut regulator-name = "SDHI1 VccQ"; 809a26fc5aSMarek Vasut regulator-min-microvolt = <1800000>; 819a26fc5aSMarek Vasut regulator-max-microvolt = <3300000>; 829a26fc5aSMarek Vasut 839a26fc5aSMarek Vasut gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>; 849a26fc5aSMarek Vasut gpios-states = <1>; 859a26fc5aSMarek Vasut states = <3300000 1 869a26fc5aSMarek Vasut 1800000 0>; 879a26fc5aSMarek Vasut }; 889a26fc5aSMarek Vasut 899a26fc5aSMarek Vasut lbsc { 909a26fc5aSMarek Vasut #address-cells = <1>; 919a26fc5aSMarek Vasut #size-cells = <1>; 929a26fc5aSMarek Vasut }; 939a26fc5aSMarek Vasut 949a26fc5aSMarek Vasut vga-encoder { 959a26fc5aSMarek Vasut compatible = "adi,adv7123"; 969a26fc5aSMarek Vasut 979a26fc5aSMarek Vasut ports { 989a26fc5aSMarek Vasut #address-cells = <1>; 999a26fc5aSMarek Vasut #size-cells = <0>; 1009a26fc5aSMarek Vasut 1019a26fc5aSMarek Vasut port@0 { 1029a26fc5aSMarek Vasut reg = <0>; 1039a26fc5aSMarek Vasut adv7123_in: endpoint { 1049a26fc5aSMarek Vasut remote-endpoint = <&du_out_rgb1>; 1059a26fc5aSMarek Vasut }; 1069a26fc5aSMarek Vasut }; 1079a26fc5aSMarek Vasut port@1 { 1089a26fc5aSMarek Vasut reg = <1>; 1099a26fc5aSMarek Vasut adv7123_out: endpoint { 1109a26fc5aSMarek Vasut remote-endpoint = <&vga_in>; 1119a26fc5aSMarek Vasut }; 1129a26fc5aSMarek Vasut }; 1139a26fc5aSMarek Vasut }; 1149a26fc5aSMarek Vasut }; 1159a26fc5aSMarek Vasut 1169a26fc5aSMarek Vasut vga { 1179a26fc5aSMarek Vasut compatible = "vga-connector"; 1189a26fc5aSMarek Vasut 1199a26fc5aSMarek Vasut port { 1209a26fc5aSMarek Vasut vga_in: endpoint { 1219a26fc5aSMarek Vasut remote-endpoint = <&adv7123_out>; 1229a26fc5aSMarek Vasut }; 1239a26fc5aSMarek Vasut }; 1249a26fc5aSMarek Vasut }; 1259a26fc5aSMarek Vasut 1269a26fc5aSMarek Vasut x2_clk: x2-clock { 1279a26fc5aSMarek Vasut compatible = "fixed-clock"; 1289a26fc5aSMarek Vasut #clock-cells = <0>; 1299a26fc5aSMarek Vasut clock-frequency = <74250000>; 1309a26fc5aSMarek Vasut }; 1319a26fc5aSMarek Vasut 1329a26fc5aSMarek Vasut x13_clk: x13-clock { 1339a26fc5aSMarek Vasut compatible = "fixed-clock"; 1349a26fc5aSMarek Vasut #clock-cells = <0>; 1359a26fc5aSMarek Vasut clock-frequency = <148500000>; 1369a26fc5aSMarek Vasut }; 1379a26fc5aSMarek Vasut 1389a26fc5aSMarek Vasut gpioi2c4: i2c-10 { 1399a26fc5aSMarek Vasut #address-cells = <1>; 1409a26fc5aSMarek Vasut #size-cells = <0>; 1419a26fc5aSMarek Vasut compatible = "i2c-gpio"; 1429a26fc5aSMarek Vasut status = "disabled"; 1439a26fc5aSMarek Vasut gpios = <&gpio4 9 GPIO_ACTIVE_HIGH /* sda */ 1449a26fc5aSMarek Vasut &gpio4 8 GPIO_ACTIVE_HIGH /* scl */ 1459a26fc5aSMarek Vasut >; 1469a26fc5aSMarek Vasut i2c-gpio,delay-us = <5>; 1479a26fc5aSMarek Vasut }; 1489a26fc5aSMarek Vasut 1499a26fc5aSMarek Vasut /* 1509a26fc5aSMarek Vasut * I2C4 is routed to EXIO connector B, pins 73 (SCL) + 74 (SDA). 1519a26fc5aSMarek Vasut * A fallback to GPIO is provided. 1529a26fc5aSMarek Vasut */ 1539a26fc5aSMarek Vasut i2cexio4: i2c-14 { 1549a26fc5aSMarek Vasut compatible = "i2c-demux-pinctrl"; 1559a26fc5aSMarek Vasut i2c-parent = <&i2c4>, <&gpioi2c4>; 1569a26fc5aSMarek Vasut i2c-bus-name = "i2c-exio4"; 1579a26fc5aSMarek Vasut #address-cells = <1>; 1589a26fc5aSMarek Vasut #size-cells = <0>; 1599a26fc5aSMarek Vasut }; 1609a26fc5aSMarek Vasut}; 1619a26fc5aSMarek Vasut 1629a26fc5aSMarek Vasut&du { 1639a26fc5aSMarek Vasut pinctrl-0 = <&du_pins>; 1649a26fc5aSMarek Vasut pinctrl-names = "default"; 1659a26fc5aSMarek Vasut status = "okay"; 1669a26fc5aSMarek Vasut 1679a26fc5aSMarek Vasut clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, 1689a26fc5aSMarek Vasut <&x13_clk>, <&x2_clk>; 1699a26fc5aSMarek Vasut clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1"; 1709a26fc5aSMarek Vasut 1719a26fc5aSMarek Vasut ports { 1729a26fc5aSMarek Vasut port@1 { 1739a26fc5aSMarek Vasut endpoint { 1749a26fc5aSMarek Vasut remote-endpoint = <&adv7123_in>; 1759a26fc5aSMarek Vasut }; 1769a26fc5aSMarek Vasut }; 1779a26fc5aSMarek Vasut }; 1789a26fc5aSMarek Vasut}; 1799a26fc5aSMarek Vasut 1809a26fc5aSMarek Vasut&extal_clk { 1819a26fc5aSMarek Vasut clock-frequency = <20000000>; 1829a26fc5aSMarek Vasut}; 1839a26fc5aSMarek Vasut 1849a26fc5aSMarek Vasut&pfc { 1859a26fc5aSMarek Vasut pinctrl-0 = <&scif_clk_pins>; 1869a26fc5aSMarek Vasut pinctrl-names = "default"; 1879a26fc5aSMarek Vasut 1889a26fc5aSMarek Vasut du_pins: du { 1899a26fc5aSMarek Vasut groups = "du1_rgb666", "du1_sync", "du1_disp", "du1_clk0_out"; 1909a26fc5aSMarek Vasut function = "du1"; 1919a26fc5aSMarek Vasut }; 1929a26fc5aSMarek Vasut 1939a26fc5aSMarek Vasut scif2_pins: scif2 { 1949a26fc5aSMarek Vasut groups = "scif2_data"; 1959a26fc5aSMarek Vasut function = "scif2"; 1969a26fc5aSMarek Vasut }; 1979a26fc5aSMarek Vasut 1989a26fc5aSMarek Vasut scif_clk_pins: scif_clk { 1999a26fc5aSMarek Vasut groups = "scif_clk"; 2009a26fc5aSMarek Vasut function = "scif_clk"; 2019a26fc5aSMarek Vasut }; 2029a26fc5aSMarek Vasut 2039a26fc5aSMarek Vasut ether_pins: ether { 2049a26fc5aSMarek Vasut groups = "eth_link", "eth_mdio", "eth_rmii"; 2059a26fc5aSMarek Vasut function = "eth"; 2069a26fc5aSMarek Vasut }; 2079a26fc5aSMarek Vasut 2089a26fc5aSMarek Vasut phy1_pins: phy1 { 2099a26fc5aSMarek Vasut groups = "intc_irq8"; 2109a26fc5aSMarek Vasut function = "intc"; 2119a26fc5aSMarek Vasut }; 2129a26fc5aSMarek Vasut 2139a26fc5aSMarek Vasut i2c1_pins: i2c1 { 2149a26fc5aSMarek Vasut groups = "i2c1"; 2159a26fc5aSMarek Vasut function = "i2c1"; 2169a26fc5aSMarek Vasut }; 2179a26fc5aSMarek Vasut 2189a26fc5aSMarek Vasut i2c4_pins: i2c4 { 2199a26fc5aSMarek Vasut groups = "i2c4"; 2209a26fc5aSMarek Vasut function = "i2c4"; 2219a26fc5aSMarek Vasut }; 2229a26fc5aSMarek Vasut 2239a26fc5aSMarek Vasut vin0_pins: vin0 { 2249a26fc5aSMarek Vasut groups = "vin0_data8", "vin0_clk"; 2259a26fc5aSMarek Vasut function = "vin0"; 2269a26fc5aSMarek Vasut }; 2279a26fc5aSMarek Vasut 2289a26fc5aSMarek Vasut mmcif0_pins: mmcif0 { 2299a26fc5aSMarek Vasut groups = "mmc_data8", "mmc_ctrl"; 2309a26fc5aSMarek Vasut function = "mmc"; 2319a26fc5aSMarek Vasut }; 2329a26fc5aSMarek Vasut 2339a26fc5aSMarek Vasut sdhi0_pins: sd0 { 2349a26fc5aSMarek Vasut groups = "sdhi0_data4", "sdhi0_ctrl"; 2359a26fc5aSMarek Vasut function = "sdhi0"; 2369a26fc5aSMarek Vasut power-source = <3300>; 2379a26fc5aSMarek Vasut }; 2389a26fc5aSMarek Vasut 2399a26fc5aSMarek Vasut sdhi0_pins_uhs: sd0_uhs { 2409a26fc5aSMarek Vasut groups = "sdhi0_data4", "sdhi0_ctrl"; 2419a26fc5aSMarek Vasut function = "sdhi0"; 2429a26fc5aSMarek Vasut power-source = <1800>; 2439a26fc5aSMarek Vasut }; 2449a26fc5aSMarek Vasut 2459a26fc5aSMarek Vasut sdhi1_pins: sd1 { 2469a26fc5aSMarek Vasut groups = "sdhi1_data4", "sdhi1_ctrl"; 2479a26fc5aSMarek Vasut function = "sdhi1"; 2489a26fc5aSMarek Vasut power-source = <3300>; 2499a26fc5aSMarek Vasut }; 2509a26fc5aSMarek Vasut 2519a26fc5aSMarek Vasut sdhi1_pins_uhs: sd1_uhs { 2529a26fc5aSMarek Vasut groups = "sdhi1_data4", "sdhi1_ctrl"; 2539a26fc5aSMarek Vasut function = "sdhi1"; 2549a26fc5aSMarek Vasut power-source = <1800>; 2559a26fc5aSMarek Vasut }; 2569a26fc5aSMarek Vasut}; 2579a26fc5aSMarek Vasut 2589a26fc5aSMarek Vasut&cmt0 { 2599a26fc5aSMarek Vasut status = "okay"; 2609a26fc5aSMarek Vasut}; 2619a26fc5aSMarek Vasut 2629a26fc5aSMarek Vasut&pfc { 2639a26fc5aSMarek Vasut qspi_pins: qspi { 2649a26fc5aSMarek Vasut groups = "qspi_ctrl", "qspi_data4"; 2659a26fc5aSMarek Vasut function = "qspi"; 2669a26fc5aSMarek Vasut }; 2679a26fc5aSMarek Vasut}; 2689a26fc5aSMarek Vasut 2699a26fc5aSMarek Vasutðer { 2709a26fc5aSMarek Vasut pinctrl-0 = <ðer_pins &phy1_pins>; 2719a26fc5aSMarek Vasut pinctrl-names = "default"; 2729a26fc5aSMarek Vasut 2739a26fc5aSMarek Vasut phy-handle = <&phy1>; 2749a26fc5aSMarek Vasut renesas,ether-link-active-low; 2759a26fc5aSMarek Vasut status = "okay"; 2769a26fc5aSMarek Vasut 2779a26fc5aSMarek Vasut phy1: ethernet-phy@1 { 2789a26fc5aSMarek Vasut reg = <1>; 2799a26fc5aSMarek Vasut interrupt-parent = <&irqc0>; 2809a26fc5aSMarek Vasut interrupts = <8 IRQ_TYPE_LEVEL_LOW>; 2819a26fc5aSMarek Vasut micrel,led-mode = <1>; 2829a26fc5aSMarek Vasut }; 2839a26fc5aSMarek Vasut}; 2849a26fc5aSMarek Vasut 2859a26fc5aSMarek Vasut&mmcif0 { 2869a26fc5aSMarek Vasut pinctrl-0 = <&mmcif0_pins>; 2879a26fc5aSMarek Vasut pinctrl-names = "default"; 2889a26fc5aSMarek Vasut 2899a26fc5aSMarek Vasut vmmc-supply = <&d3_3v>; 2909a26fc5aSMarek Vasut vqmmc-supply = <&d3_3v>; 2919a26fc5aSMarek Vasut bus-width = <8>; 2929a26fc5aSMarek Vasut non-removable; 2939a26fc5aSMarek Vasut status = "okay"; 2949a26fc5aSMarek Vasut}; 2959a26fc5aSMarek Vasut 2969a26fc5aSMarek Vasut&sdhi0 { 2979a26fc5aSMarek Vasut pinctrl-0 = <&sdhi0_pins>; 2989a26fc5aSMarek Vasut pinctrl-1 = <&sdhi0_pins_uhs>; 2999a26fc5aSMarek Vasut pinctrl-names = "default", "state_uhs"; 3009a26fc5aSMarek Vasut 3019a26fc5aSMarek Vasut vmmc-supply = <&vcc_sdhi0>; 3029a26fc5aSMarek Vasut vqmmc-supply = <&vccq_sdhi0>; 3039a26fc5aSMarek Vasut cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>; 3049a26fc5aSMarek Vasut wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>; 3059a26fc5aSMarek Vasut sd-uhs-sdr50; 3069a26fc5aSMarek Vasut sd-uhs-sdr104; 3079a26fc5aSMarek Vasut status = "okay"; 3089a26fc5aSMarek Vasut}; 3099a26fc5aSMarek Vasut 3109a26fc5aSMarek Vasut&sdhi1 { 3119a26fc5aSMarek Vasut pinctrl-0 = <&sdhi1_pins>; 3129a26fc5aSMarek Vasut pinctrl-1 = <&sdhi1_pins_uhs>; 3139a26fc5aSMarek Vasut pinctrl-names = "default", "state_uhs"; 3149a26fc5aSMarek Vasut 3159a26fc5aSMarek Vasut vmmc-supply = <&vcc_sdhi1>; 3169a26fc5aSMarek Vasut vqmmc-supply = <&vccq_sdhi1>; 3179a26fc5aSMarek Vasut cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>; 3189a26fc5aSMarek Vasut wp-gpios = <&gpio6 15 GPIO_ACTIVE_HIGH>; 3199a26fc5aSMarek Vasut sd-uhs-sdr50; 3209a26fc5aSMarek Vasut status = "okay"; 3219a26fc5aSMarek Vasut}; 3229a26fc5aSMarek Vasut 3239a26fc5aSMarek Vasut&i2c1 { 3249a26fc5aSMarek Vasut pinctrl-0 = <&i2c1_pins>; 3259a26fc5aSMarek Vasut pinctrl-names = "default"; 3269a26fc5aSMarek Vasut 3279a26fc5aSMarek Vasut status = "okay"; 3289a26fc5aSMarek Vasut clock-frequency = <400000>; 3299a26fc5aSMarek Vasut 3309a26fc5aSMarek Vasut composite-in@20 { 3319a26fc5aSMarek Vasut compatible = "adi,adv7180"; 3329a26fc5aSMarek Vasut reg = <0x20>; 3339a26fc5aSMarek Vasut remote = <&vin0>; 3349a26fc5aSMarek Vasut 3359a26fc5aSMarek Vasut port { 3369a26fc5aSMarek Vasut adv7180: endpoint { 3379a26fc5aSMarek Vasut bus-width = <8>; 3389a26fc5aSMarek Vasut remote-endpoint = <&vin0ep>; 3399a26fc5aSMarek Vasut }; 3409a26fc5aSMarek Vasut }; 3419a26fc5aSMarek Vasut }; 3429a26fc5aSMarek Vasut}; 3439a26fc5aSMarek Vasut 3449a26fc5aSMarek Vasut&i2c4 { 3459a26fc5aSMarek Vasut pinctrl-0 = <&i2c4_pins>; 3469a26fc5aSMarek Vasut pinctrl-names = "i2c-exio4"; 3479a26fc5aSMarek Vasut}; 3489a26fc5aSMarek Vasut 3499a26fc5aSMarek Vasut&vin0 { 3509a26fc5aSMarek Vasut status = "okay"; 3519a26fc5aSMarek Vasut pinctrl-0 = <&vin0_pins>; 3529a26fc5aSMarek Vasut pinctrl-names = "default"; 3539a26fc5aSMarek Vasut 3549a26fc5aSMarek Vasut port { 3559a26fc5aSMarek Vasut #address-cells = <1>; 3569a26fc5aSMarek Vasut #size-cells = <0>; 3579a26fc5aSMarek Vasut 3589a26fc5aSMarek Vasut vin0ep: endpoint { 3599a26fc5aSMarek Vasut remote-endpoint = <&adv7180>; 3609a26fc5aSMarek Vasut bus-width = <8>; 3619a26fc5aSMarek Vasut }; 3629a26fc5aSMarek Vasut }; 3639a26fc5aSMarek Vasut}; 3649a26fc5aSMarek Vasut 3659a26fc5aSMarek Vasut&scif2 { 3669a26fc5aSMarek Vasut pinctrl-0 = <&scif2_pins>; 3679a26fc5aSMarek Vasut pinctrl-names = "default"; 3689a26fc5aSMarek Vasut 3699a26fc5aSMarek Vasut status = "okay"; 3709a26fc5aSMarek Vasut}; 3719a26fc5aSMarek Vasut 3729a26fc5aSMarek Vasut&scif_clk { 3739a26fc5aSMarek Vasut clock-frequency = <14745600>; 3749a26fc5aSMarek Vasut}; 3759a26fc5aSMarek Vasut 3769a26fc5aSMarek Vasut&qspi { 3779a26fc5aSMarek Vasut pinctrl-0 = <&qspi_pins>; 3789a26fc5aSMarek Vasut pinctrl-names = "default"; 3799a26fc5aSMarek Vasut 3809a26fc5aSMarek Vasut status = "okay"; 3819a26fc5aSMarek Vasut 3829a26fc5aSMarek Vasut flash@0 { 3839a26fc5aSMarek Vasut compatible = "spansion,s25fl512s", "jedec,spi-nor"; 3849a26fc5aSMarek Vasut reg = <0>; 3859a26fc5aSMarek Vasut spi-max-frequency = <30000000>; 3869a26fc5aSMarek Vasut spi-tx-bus-width = <4>; 3879a26fc5aSMarek Vasut spi-rx-bus-width = <4>; 3889a26fc5aSMarek Vasut spi-cpol; 3899a26fc5aSMarek Vasut spi-cpha; 3909a26fc5aSMarek Vasut m25p,fast-read; 3919a26fc5aSMarek Vasut 3929a26fc5aSMarek Vasut partitions { 3939a26fc5aSMarek Vasut compatible = "fixed-partitions"; 3949a26fc5aSMarek Vasut #address-cells = <1>; 3959a26fc5aSMarek Vasut #size-cells = <1>; 3969a26fc5aSMarek Vasut 3979a26fc5aSMarek Vasut partition@0 { 3989a26fc5aSMarek Vasut label = "loader"; 3999a26fc5aSMarek Vasut reg = <0x00000000 0x00040000>; 4009a26fc5aSMarek Vasut read-only; 4019a26fc5aSMarek Vasut }; 4029a26fc5aSMarek Vasut partition@40000 { 4039a26fc5aSMarek Vasut label = "system"; 4049a26fc5aSMarek Vasut reg = <0x00040000 0x00040000>; 4059a26fc5aSMarek Vasut read-only; 4069a26fc5aSMarek Vasut }; 4079a26fc5aSMarek Vasut partition@80000 { 4089a26fc5aSMarek Vasut label = "user"; 4099a26fc5aSMarek Vasut reg = <0x00080000 0x03f80000>; 4109a26fc5aSMarek Vasut }; 4119a26fc5aSMarek Vasut }; 4129a26fc5aSMarek Vasut }; 4139a26fc5aSMarek Vasut}; 414