xref: /openbmc/u-boot/arch/arm/dts/r8a7793.dtsi (revision f77d4410)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the r8a7793 SoC
4 *
5 * Copyright (C) 2014-2015 Renesas Electronics Corporation
6 */
7
8#include <dt-bindings/clock/r8a7793-cpg-mssr.h>
9#include <dt-bindings/interrupt-controller/arm-gic.h>
10#include <dt-bindings/interrupt-controller/irq.h>
11#include <dt-bindings/power/r8a7793-sysc.h>
12
13/ {
14	compatible = "renesas,r8a7793";
15	#address-cells = <2>;
16	#size-cells = <2>;
17
18	aliases {
19		i2c0 = &i2c0;
20		i2c1 = &i2c1;
21		i2c2 = &i2c2;
22		i2c3 = &i2c3;
23		i2c4 = &i2c4;
24		i2c5 = &i2c5;
25		i2c6 = &i2c6;
26		i2c7 = &i2c7;
27		i2c8 = &i2c8;
28		spi0 = &qspi;
29	};
30
31	/*
32	 * The external audio clocks are configured as 0 Hz fixed frequency
33	 * clocks by default.
34	 * Boards that provide audio clocks should override them.
35	 */
36	audio_clk_a: audio_clk_a {
37		compatible = "fixed-clock";
38		#clock-cells = <0>;
39		clock-frequency = <0>;
40	};
41	audio_clk_b: audio_clk_b {
42		compatible = "fixed-clock";
43		#clock-cells = <0>;
44		clock-frequency = <0>;
45	};
46	audio_clk_c: audio_clk_c {
47		compatible = "fixed-clock";
48		#clock-cells = <0>;
49		clock-frequency = <0>;
50	};
51
52	/* External CAN clock */
53	can_clk: can {
54		compatible = "fixed-clock";
55		#clock-cells = <0>;
56		/* This value must be overridden by the board. */
57		clock-frequency = <0>;
58	};
59
60	cpus {
61		#address-cells = <1>;
62		#size-cells = <0>;
63		enable-method = "renesas,apmu";
64
65		cpu0: cpu@0 {
66			device_type = "cpu";
67			compatible = "arm,cortex-a15";
68			reg = <0>;
69			clock-frequency = <1500000000>;
70			voltage-tolerance = <1>; /* 1% */
71			clocks = <&cpg CPG_CORE R8A7793_CLK_Z>;
72			clock-latency = <300000>; /* 300 us */
73			power-domains = <&sysc R8A7793_PD_CA15_CPU0>;
74
75			/* kHz - uV - OPPs unknown yet */
76			operating-points = <1500000 1000000>,
77					   <1312500 1000000>,
78					   <1125000 1000000>,
79					   < 937500 1000000>,
80					   < 750000 1000000>,
81					   < 375000 1000000>;
82			next-level-cache = <&L2_CA15>;
83		};
84
85		cpu1: cpu@1 {
86			device_type = "cpu";
87			compatible = "arm,cortex-a15";
88			reg = <1>;
89			clock-frequency = <1500000000>;
90			clocks = <&cpg CPG_CORE R8A7793_CLK_Z>;
91			power-domains = <&sysc R8A7793_PD_CA15_CPU1>;
92		};
93
94		L2_CA15: cache-controller-0 {
95			compatible = "cache";
96			power-domains = <&sysc R8A7793_PD_CA15_SCU>;
97			cache-unified;
98			cache-level = <2>;
99		};
100	};
101
102	/* External root clock */
103	extal_clk: extal {
104		compatible = "fixed-clock";
105		#clock-cells = <0>;
106		/* This value must be overridden by the board. */
107		clock-frequency = <0>;
108	};
109
110	/* External SCIF clock */
111	scif_clk: scif {
112		compatible = "fixed-clock";
113		#clock-cells = <0>;
114		/* This value must be overridden by the board. */
115		clock-frequency = <0>;
116	};
117
118	soc {
119		compatible = "simple-bus";
120		interrupt-parent = <&gic>;
121
122		#address-cells = <2>;
123		#size-cells = <2>;
124		ranges;
125
126		gpio0: gpio@e6050000 {
127			compatible = "renesas,gpio-r8a7793",
128				     "renesas,rcar-gen2-gpio";
129			reg = <0 0xe6050000 0 0x50>;
130			interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
131			#gpio-cells = <2>;
132			gpio-controller;
133			gpio-ranges = <&pfc 0 0 32>;
134			#interrupt-cells = <2>;
135			interrupt-controller;
136			clocks = <&cpg CPG_MOD 912>;
137			power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
138			resets = <&cpg 912>;
139		};
140
141		gpio1: gpio@e6051000 {
142			compatible = "renesas,gpio-r8a7793",
143				     "renesas,rcar-gen2-gpio";
144			reg = <0 0xe6051000 0 0x50>;
145			interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
146			#gpio-cells = <2>;
147			gpio-controller;
148			gpio-ranges = <&pfc 0 32 26>;
149			#interrupt-cells = <2>;
150			interrupt-controller;
151			clocks = <&cpg CPG_MOD 911>;
152			power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
153			resets = <&cpg 911>;
154		};
155
156		gpio2: gpio@e6052000 {
157			compatible = "renesas,gpio-r8a7793",
158				     "renesas,rcar-gen2-gpio";
159			reg = <0 0xe6052000 0 0x50>;
160			interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
161			#gpio-cells = <2>;
162			gpio-controller;
163			gpio-ranges = <&pfc 0 64 32>;
164			#interrupt-cells = <2>;
165			interrupt-controller;
166			clocks = <&cpg CPG_MOD 910>;
167			power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
168			resets = <&cpg 910>;
169		};
170
171		gpio3: gpio@e6053000 {
172			compatible = "renesas,gpio-r8a7793",
173				     "renesas,rcar-gen2-gpio";
174			reg = <0 0xe6053000 0 0x50>;
175			interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
176			#gpio-cells = <2>;
177			gpio-controller;
178			gpio-ranges = <&pfc 0 96 32>;
179			#interrupt-cells = <2>;
180			interrupt-controller;
181			clocks = <&cpg CPG_MOD 909>;
182			power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
183			resets = <&cpg 909>;
184		};
185
186		gpio4: gpio@e6054000 {
187			compatible = "renesas,gpio-r8a7793",
188				     "renesas,rcar-gen2-gpio";
189			reg = <0 0xe6054000 0 0x50>;
190			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
191			#gpio-cells = <2>;
192			gpio-controller;
193			gpio-ranges = <&pfc 0 128 32>;
194			#interrupt-cells = <2>;
195			interrupt-controller;
196			clocks = <&cpg CPG_MOD 908>;
197			power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
198			resets = <&cpg 908>;
199		};
200
201		gpio5: gpio@e6055000 {
202			compatible = "renesas,gpio-r8a7793",
203				     "renesas,rcar-gen2-gpio";
204			reg = <0 0xe6055000 0 0x50>;
205			interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
206			#gpio-cells = <2>;
207			gpio-controller;
208			gpio-ranges = <&pfc 0 160 32>;
209			#interrupt-cells = <2>;
210			interrupt-controller;
211			clocks = <&cpg CPG_MOD 907>;
212			power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
213			resets = <&cpg 907>;
214		};
215
216		gpio6: gpio@e6055400 {
217			compatible = "renesas,gpio-r8a7793",
218				     "renesas,rcar-gen2-gpio";
219			reg = <0 0xe6055400 0 0x50>;
220			interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
221			#gpio-cells = <2>;
222			gpio-controller;
223			gpio-ranges = <&pfc 0 192 32>;
224			#interrupt-cells = <2>;
225			interrupt-controller;
226			clocks = <&cpg CPG_MOD 905>;
227			power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
228			resets = <&cpg 905>;
229		};
230
231		gpio7: gpio@e6055800 {
232			compatible = "renesas,gpio-r8a7793",
233				     "renesas,rcar-gen2-gpio";
234			reg = <0 0xe6055800 0 0x50>;
235			interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
236			#gpio-cells = <2>;
237			gpio-controller;
238			gpio-ranges = <&pfc 0 224 26>;
239			#interrupt-cells = <2>;
240			interrupt-controller;
241			clocks = <&cpg CPG_MOD 904>;
242			power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
243			resets = <&cpg 904>;
244		};
245
246		pfc: pin-controller@e6060000 {
247			compatible = "renesas,pfc-r8a7793";
248			reg = <0 0xe6060000 0 0x250>;
249		};
250
251		/* Special CPG clocks */
252		cpg: clock-controller@e6150000 {
253			compatible = "renesas,r8a7793-cpg-mssr";
254			reg = <0 0xe6150000 0 0x1000>;
255			clocks = <&extal_clk>, <&usb_extal_clk>;
256			clock-names = "extal", "usb_extal";
257			#clock-cells = <2>;
258			#power-domain-cells = <0>;
259			#reset-cells = <1>;
260		};
261
262		apmu@e6152000 {
263			compatible = "renesas,r8a7793-apmu", "renesas,apmu";
264			reg = <0 0xe6152000 0 0x188>;
265			cpus = <&cpu0 &cpu1>;
266		};
267
268		rst: reset-controller@e6160000 {
269			compatible = "renesas,r8a7793-rst";
270			reg = <0 0xe6160000 0 0x0100>;
271		};
272
273		sysc: system-controller@e6180000 {
274			compatible = "renesas,r8a7793-sysc";
275			reg = <0 0xe6180000 0 0x0200>;
276			#power-domain-cells = <1>;
277		};
278
279		irqc0: interrupt-controller@e61c0000 {
280			compatible = "renesas,irqc-r8a7793", "renesas,irqc";
281			#interrupt-cells = <2>;
282			interrupt-controller;
283			reg = <0 0xe61c0000 0 0x200>;
284			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
285				     <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
286				     <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
287				     <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
288				     <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
289				     <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
290				     <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
291				     <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
292				     <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
293				     <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
294			clocks = <&cpg CPG_MOD 407>;
295			power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
296			resets = <&cpg 407>;
297		};
298
299		thermal: thermal@e61f0000 {
300			compatible = "renesas,thermal-r8a7793",
301				     "renesas,rcar-gen2-thermal",
302				     "renesas,rcar-thermal";
303			reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
304			interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
305			clocks = <&cpg CPG_MOD 522>;
306			power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
307			resets = <&cpg 522>;
308			#thermal-sensor-cells = <0>;
309		};
310
311		ipmmu_sy0: mmu@e6280000 {
312			compatible = "renesas,ipmmu-r8a7793",
313				     "renesas,ipmmu-vmsa";
314			reg = <0 0xe6280000 0 0x1000>;
315			interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
316				     <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
317			#iommu-cells = <1>;
318			status = "disabled";
319		};
320
321		ipmmu_sy1: mmu@e6290000 {
322			compatible = "renesas,ipmmu-r8a7793",
323				     "renesas,ipmmu-vmsa";
324			reg = <0 0xe6290000 0 0x1000>;
325			interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
326			#iommu-cells = <1>;
327			status = "disabled";
328		};
329
330		ipmmu_ds: mmu@e6740000 {
331			compatible = "renesas,ipmmu-r8a7793",
332				     "renesas,ipmmu-vmsa";
333			reg = <0 0xe6740000 0 0x1000>;
334			interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
335				     <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
336			#iommu-cells = <1>;
337			status = "disabled";
338		};
339
340		ipmmu_mp: mmu@ec680000 {
341			compatible = "renesas,ipmmu-r8a7793",
342				     "renesas,ipmmu-vmsa";
343			reg = <0 0xec680000 0 0x1000>;
344			interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
345			#iommu-cells = <1>;
346			status = "disabled";
347		};
348
349		ipmmu_mx: mmu@fe951000 {
350			compatible = "renesas,ipmmu-r8a7793",
351				     "renesas,ipmmu-vmsa";
352			reg = <0 0xfe951000 0 0x1000>;
353			interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
354				     <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
355			#iommu-cells = <1>;
356			status = "disabled";
357		};
358
359		ipmmu_rt: mmu@ffc80000 {
360			compatible = "renesas,ipmmu-r8a7793",
361				     "renesas,ipmmu-vmsa";
362			reg = <0 0xffc80000 0 0x1000>;
363			interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
364			#iommu-cells = <1>;
365			status = "disabled";
366		};
367
368		ipmmu_gp: mmu@e62a0000 {
369			compatible = "renesas,ipmmu-r8a7793",
370				     "renesas,ipmmu-vmsa";
371			reg = <0 0xe62a0000 0 0x1000>;
372			interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
373				     <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
374			#iommu-cells = <1>;
375			status = "disabled";
376		};
377
378		icram0:	sram@e63a0000 {
379			compatible = "mmio-sram";
380			reg = <0 0xe63a0000 0 0x12000>;
381		};
382
383		icram1:	sram@e63c0000 {
384			compatible = "mmio-sram";
385			reg = <0 0xe63c0000 0 0x1000>;
386			#address-cells = <1>;
387			#size-cells = <1>;
388			ranges = <0 0 0xe63c0000 0x1000>;
389
390			smp-sram@0 {
391				compatible = "renesas,smp-sram";
392				reg = <0 0x10>;
393			};
394		};
395
396		/* The memory map in the User's Manual maps the cores to
397		 * bus numbers
398		 */
399		i2c0: i2c@e6508000 {
400			#address-cells = <1>;
401			#size-cells = <0>;
402			compatible = "renesas,i2c-r8a7793",
403				     "renesas,rcar-gen2-i2c";
404			reg = <0 0xe6508000 0 0x40>;
405			interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
406			clocks = <&cpg CPG_MOD 931>;
407			power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
408			resets = <&cpg 931>;
409			i2c-scl-internal-delay-ns = <6>;
410			status = "disabled";
411		};
412
413		i2c1: i2c@e6518000 {
414			#address-cells = <1>;
415			#size-cells = <0>;
416			compatible = "renesas,i2c-r8a7793",
417				     "renesas,rcar-gen2-i2c";
418			reg = <0 0xe6518000 0 0x40>;
419			interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
420			clocks = <&cpg CPG_MOD 930>;
421			power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
422			resets = <&cpg 930>;
423			i2c-scl-internal-delay-ns = <6>;
424			status = "disabled";
425		};
426
427		i2c2: i2c@e6530000 {
428			#address-cells = <1>;
429			#size-cells = <0>;
430			compatible = "renesas,i2c-r8a7793",
431				     "renesas,rcar-gen2-i2c";
432			reg = <0 0xe6530000 0 0x40>;
433			interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
434			clocks = <&cpg CPG_MOD 929>;
435			power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
436			resets = <&cpg 929>;
437			i2c-scl-internal-delay-ns = <6>;
438			status = "disabled";
439		};
440
441		i2c3: i2c@e6540000 {
442			#address-cells = <1>;
443			#size-cells = <0>;
444			compatible = "renesas,i2c-r8a7793",
445				     "renesas,rcar-gen2-i2c";
446			reg = <0 0xe6540000 0 0x40>;
447			interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
448			clocks = <&cpg CPG_MOD 928>;
449			power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
450			resets = <&cpg 928>;
451			i2c-scl-internal-delay-ns = <6>;
452			status = "disabled";
453		};
454
455		i2c4: i2c@e6520000 {
456			#address-cells = <1>;
457			#size-cells = <0>;
458			compatible = "renesas,i2c-r8a7793",
459				     "renesas,rcar-gen2-i2c";
460			reg = <0 0xe6520000 0 0x40>;
461			interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
462			clocks = <&cpg CPG_MOD 927>;
463			power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
464			resets = <&cpg 927>;
465			i2c-scl-internal-delay-ns = <6>;
466			status = "disabled";
467		};
468
469		i2c5: i2c@e6528000 {
470			/* doesn't need pinmux */
471			#address-cells = <1>;
472			#size-cells = <0>;
473			compatible = "renesas,i2c-r8a7793",
474				     "renesas,rcar-gen2-i2c";
475			reg = <0 0xe6528000 0 0x40>;
476			interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
477			clocks = <&cpg CPG_MOD 925>;
478			power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
479			resets = <&cpg 925>;
480			i2c-scl-internal-delay-ns = <110>;
481			status = "disabled";
482		};
483
484		i2c6: i2c@e60b0000 {
485			/* doesn't need pinmux */
486			#address-cells = <1>;
487			#size-cells = <0>;
488			compatible = "renesas,iic-r8a7793",
489				     "renesas,rcar-gen2-iic",
490				     "renesas,rmobile-iic";
491			reg = <0 0xe60b0000 0 0x425>;
492			interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
493			clocks = <&cpg CPG_MOD 926>;
494			dmas = <&dmac0 0x77>, <&dmac0 0x78>,
495			       <&dmac1 0x77>, <&dmac1 0x78>;
496			dma-names = "tx", "rx", "tx", "rx";
497			power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
498			resets = <&cpg 926>;
499			status = "disabled";
500		};
501
502		i2c7: i2c@e6500000 {
503			#address-cells = <1>;
504			#size-cells = <0>;
505			compatible = "renesas,iic-r8a7793",
506				     "renesas,rcar-gen2-iic",
507				     "renesas,rmobile-iic";
508			reg = <0 0xe6500000 0 0x425>;
509			interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
510			clocks = <&cpg CPG_MOD 318>;
511			dmas = <&dmac0 0x61>, <&dmac0 0x62>,
512			       <&dmac1 0x61>, <&dmac1 0x62>;
513			dma-names = "tx", "rx", "tx", "rx";
514			power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
515			resets = <&cpg 318>;
516			status = "disabled";
517		};
518
519		i2c8: i2c@e6510000 {
520			#address-cells = <1>;
521			#size-cells = <0>;
522			compatible = "renesas,iic-r8a7793",
523				     "renesas,rcar-gen2-iic",
524				     "renesas,rmobile-iic";
525			reg = <0 0xe6510000 0 0x425>;
526			interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
527			clocks = <&cpg CPG_MOD 323>;
528			dmas = <&dmac0 0x65>, <&dmac0 0x66>,
529			       <&dmac1 0x65>, <&dmac1 0x66>;
530			dma-names = "tx", "rx", "tx", "rx";
531			power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
532			resets = <&cpg 323>;
533			status = "disabled";
534		};
535
536		dmac0: dma-controller@e6700000 {
537			compatible = "renesas,dmac-r8a7793",
538				     "renesas,rcar-dmac";
539			reg = <0 0xe6700000 0 0x20000>;
540			interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
541				      GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
542				      GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
543				      GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
544				      GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
545				      GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
546				      GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
547				      GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
548				      GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
549				      GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
550				      GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
551				      GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
552				      GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
553				      GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
554				      GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
555				      GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
556			interrupt-names = "error",
557					  "ch0", "ch1", "ch2", "ch3",
558					  "ch4", "ch5", "ch6", "ch7",
559					  "ch8", "ch9", "ch10", "ch11",
560					  "ch12", "ch13", "ch14";
561			clocks = <&cpg CPG_MOD 219>;
562			clock-names = "fck";
563			power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
564			resets = <&cpg 219>;
565			#dma-cells = <1>;
566			dma-channels = <15>;
567		};
568
569		dmac1: dma-controller@e6720000 {
570			compatible = "renesas,dmac-r8a7793",
571				     "renesas,rcar-dmac";
572			reg = <0 0xe6720000 0 0x20000>;
573			interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
574				      GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
575				      GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
576				      GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
577				      GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
578				      GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
579				      GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
580				      GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
581				      GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
582				      GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
583				      GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
584				      GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
585				      GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
586				      GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
587				      GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
588				      GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
589			interrupt-names = "error",
590					  "ch0", "ch1", "ch2", "ch3",
591					  "ch4", "ch5", "ch6", "ch7",
592					  "ch8", "ch9", "ch10", "ch11",
593					  "ch12", "ch13", "ch14";
594			clocks = <&cpg CPG_MOD 218>;
595			clock-names = "fck";
596			power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
597			resets = <&cpg 218>;
598			#dma-cells = <1>;
599			dma-channels = <15>;
600		};
601
602		qspi: spi@e6b10000 {
603			compatible = "renesas,qspi-r8a7793", "renesas,qspi";
604			reg = <0 0xe6b10000 0 0x2c>;
605			interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
606			clocks = <&cpg CPG_MOD 917>;
607			dmas = <&dmac0 0x17>, <&dmac0 0x18>,
608			       <&dmac1 0x17>, <&dmac1 0x18>;
609			dma-names = "tx", "rx", "tx", "rx";
610			power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
611			resets = <&cpg 917>;
612			num-cs = <1>;
613			#address-cells = <1>;
614			#size-cells = <0>;
615			status = "disabled";
616		};
617
618		scifa0: serial@e6c40000 {
619			compatible = "renesas,scifa-r8a7793",
620				     "renesas,rcar-gen2-scifa", "renesas,scifa";
621			reg = <0 0xe6c40000 0 64>;
622			interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
623			clocks = <&cpg CPG_MOD 204>;
624			clock-names = "fck";
625			dmas = <&dmac0 0x21>, <&dmac0 0x22>,
626			       <&dmac1 0x21>, <&dmac1 0x22>;
627			dma-names = "tx", "rx", "tx", "rx";
628			power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
629			resets = <&cpg 204>;
630			status = "disabled";
631		};
632
633		scifa1: serial@e6c50000 {
634			compatible = "renesas,scifa-r8a7793",
635				     "renesas,rcar-gen2-scifa", "renesas,scifa";
636			reg = <0 0xe6c50000 0 64>;
637			interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
638			clocks = <&cpg CPG_MOD 203>;
639			clock-names = "fck";
640			dmas = <&dmac0 0x25>, <&dmac0 0x26>,
641			       <&dmac1 0x25>, <&dmac1 0x26>;
642			dma-names = "tx", "rx", "tx", "rx";
643			power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
644			resets = <&cpg 203>;
645			status = "disabled";
646		};
647
648		scifa2: serial@e6c60000 {
649			compatible = "renesas,scifa-r8a7793",
650				     "renesas,rcar-gen2-scifa", "renesas,scifa";
651			reg = <0 0xe6c60000 0 64>;
652			interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
653			clocks = <&cpg CPG_MOD 202>;
654			clock-names = "fck";
655			dmas = <&dmac0 0x27>, <&dmac0 0x28>,
656			       <&dmac1 0x27>, <&dmac1 0x28>;
657			dma-names = "tx", "rx", "tx", "rx";
658			power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
659			resets = <&cpg 202>;
660			status = "disabled";
661		};
662
663		scifa3: serial@e6c70000 {
664			compatible = "renesas,scifa-r8a7793",
665				     "renesas,rcar-gen2-scifa", "renesas,scifa";
666			reg = <0 0xe6c70000 0 64>;
667			interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
668			clocks = <&cpg CPG_MOD 1106>;
669			clock-names = "fck";
670			dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
671			       <&dmac1 0x1b>, <&dmac1 0x1c>;
672			dma-names = "tx", "rx", "tx", "rx";
673			power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
674			resets = <&cpg 1106>;
675			status = "disabled";
676		};
677
678		scifa4: serial@e6c78000 {
679			compatible = "renesas,scifa-r8a7793",
680				     "renesas,rcar-gen2-scifa", "renesas,scifa";
681			reg = <0 0xe6c78000 0 64>;
682			interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
683			clocks = <&cpg CPG_MOD 1107>;
684			clock-names = "fck";
685			dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
686			       <&dmac1 0x1f>, <&dmac1 0x20>;
687			dma-names = "tx", "rx", "tx", "rx";
688			power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
689			resets = <&cpg 1107>;
690			status = "disabled";
691		};
692
693		scifa5: serial@e6c80000 {
694			compatible = "renesas,scifa-r8a7793",
695				     "renesas,rcar-gen2-scifa", "renesas,scifa";
696			reg = <0 0xe6c80000 0 64>;
697			interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
698			clocks = <&cpg CPG_MOD 1108>;
699			clock-names = "fck";
700			dmas = <&dmac0 0x23>, <&dmac0 0x24>,
701			       <&dmac1 0x23>, <&dmac1 0x24>;
702			dma-names = "tx", "rx", "tx", "rx";
703			power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
704			resets = <&cpg 1108>;
705			status = "disabled";
706		};
707
708		scifb0: serial@e6c20000 {
709			compatible = "renesas,scifb-r8a7793",
710				     "renesas,rcar-gen2-scifb", "renesas,scifb";
711			reg = <0 0xe6c20000 0 0x100>;
712			interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
713			clocks = <&cpg CPG_MOD 206>;
714			clock-names = "fck";
715			dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
716			       <&dmac1 0x3d>, <&dmac1 0x3e>;
717			dma-names = "tx", "rx", "tx", "rx";
718			power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
719			resets = <&cpg 206>;
720			status = "disabled";
721		};
722
723		scifb1: serial@e6c30000 {
724			compatible = "renesas,scifb-r8a7793",
725				     "renesas,rcar-gen2-scifb", "renesas,scifb";
726			reg = <0 0xe6c30000 0 0x100>;
727			interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
728			clocks = <&cpg CPG_MOD 207>;
729			clock-names = "fck";
730			dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
731			       <&dmac1 0x19>, <&dmac1 0x1a>;
732			dma-names = "tx", "rx", "tx", "rx";
733			power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
734			resets = <&cpg 207>;
735			status = "disabled";
736		};
737
738		scifb2: serial@e6ce0000 {
739			compatible = "renesas,scifb-r8a7793",
740				     "renesas,rcar-gen2-scifb", "renesas,scifb";
741			reg = <0 0xe6ce0000 0 0x100>;
742			interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
743			clocks = <&cpg CPG_MOD 216>;
744			clock-names = "fck";
745			dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
746			       <&dmac1 0x1d>, <&dmac1 0x1e>;
747			dma-names = "tx", "rx", "tx", "rx";
748			power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
749			resets = <&cpg 216>;
750			status = "disabled";
751		};
752
753		scif0: serial@e6e60000 {
754			compatible = "renesas,scif-r8a7793",
755				     "renesas,rcar-gen2-scif", "renesas,scif";
756			reg = <0 0xe6e60000 0 64>;
757			interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
758			clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
759				 <&scif_clk>;
760			clock-names = "fck", "brg_int", "scif_clk";
761			dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
762			       <&dmac1 0x29>, <&dmac1 0x2a>;
763			dma-names = "tx", "rx", "tx", "rx";
764			power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
765			resets = <&cpg 721>;
766			status = "disabled";
767		};
768
769		scif1: serial@e6e68000 {
770			compatible = "renesas,scif-r8a7793",
771				     "renesas,rcar-gen2-scif", "renesas,scif";
772			reg = <0 0xe6e68000 0 64>;
773			interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
774			clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
775				 <&scif_clk>;
776			clock-names = "fck", "brg_int", "scif_clk";
777			dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
778			       <&dmac1 0x2d>, <&dmac1 0x2e>;
779			dma-names = "tx", "rx", "tx", "rx";
780			power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
781			resets = <&cpg 720>;
782			status = "disabled";
783		};
784
785		scif2: serial@e6e58000 {
786			compatible = "renesas,scif-r8a7793",
787				     "renesas,rcar-gen2-scif", "renesas,scif";
788			reg = <0 0xe6e58000 0 64>;
789			interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
790			clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
791				 <&scif_clk>;
792			clock-names = "fck", "brg_int", "scif_clk";
793			dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
794			       <&dmac1 0x2b>, <&dmac1 0x2c>;
795			dma-names = "tx", "rx", "tx", "rx";
796			power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
797			resets = <&cpg 719>;
798			status = "disabled";
799		};
800
801		scif3: serial@e6ea8000 {
802			compatible = "renesas,scif-r8a7793",
803				     "renesas,rcar-gen2-scif", "renesas,scif";
804			reg = <0 0xe6ea8000 0 64>;
805			interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
806			clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
807				 <&scif_clk>;
808			clock-names = "fck", "brg_int", "scif_clk";
809			dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
810			       <&dmac1 0x2f>, <&dmac1 0x30>;
811			dma-names = "tx", "rx", "tx", "rx";
812			power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
813			resets = <&cpg 718>;
814			status = "disabled";
815		};
816
817		scif4: serial@e6ee0000 {
818			compatible = "renesas,scif-r8a7793",
819				     "renesas,rcar-gen2-scif", "renesas,scif";
820			reg = <0 0xe6ee0000 0 64>;
821			interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
822			clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
823				 <&scif_clk>;
824			clock-names = "fck", "brg_int", "scif_clk";
825			dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
826			       <&dmac1 0xfb>, <&dmac1 0xfc>;
827			dma-names = "tx", "rx", "tx", "rx";
828			power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
829			resets = <&cpg 715>;
830			status = "disabled";
831		};
832
833		scif5: serial@e6ee8000 {
834			compatible = "renesas,scif-r8a7793",
835				     "renesas,rcar-gen2-scif", "renesas,scif";
836			reg = <0 0xe6ee8000 0 64>;
837			interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
838			clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
839				 <&scif_clk>;
840			clock-names = "fck", "brg_int", "scif_clk";
841			dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
842			       <&dmac1 0xfd>, <&dmac1 0xfe>;
843			dma-names = "tx", "rx", "tx", "rx";
844			power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
845			resets = <&cpg 714>;
846			status = "disabled";
847		};
848
849		hscif0: serial@e62c0000 {
850			compatible = "renesas,hscif-r8a7793",
851				     "renesas,rcar-gen2-hscif", "renesas,hscif";
852			reg = <0 0xe62c0000 0 96>;
853			interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
854			clocks = <&cpg CPG_MOD 717>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
855				 <&scif_clk>;
856			clock-names = "fck", "brg_int", "scif_clk";
857			dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
858			       <&dmac1 0x39>, <&dmac1 0x3a>;
859			dma-names = "tx", "rx", "tx", "rx";
860			power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
861			resets = <&cpg 717>;
862			status = "disabled";
863		};
864
865		hscif1: serial@e62c8000 {
866			compatible = "renesas,hscif-r8a7793",
867				     "renesas,rcar-gen2-hscif", "renesas,hscif";
868			reg = <0 0xe62c8000 0 96>;
869			interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
870			clocks = <&cpg CPG_MOD 716>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
871				 <&scif_clk>;
872			clock-names = "fck", "brg_int", "scif_clk";
873			dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
874			       <&dmac1 0x4d>, <&dmac1 0x4e>;
875			dma-names = "tx", "rx", "tx", "rx";
876			power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
877			resets = <&cpg 716>;
878			status = "disabled";
879		};
880
881		hscif2: serial@e62d0000 {
882			compatible = "renesas,hscif-r8a7793",
883				     "renesas,rcar-gen2-hscif", "renesas,hscif";
884			reg = <0 0xe62d0000 0 96>;
885			interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
886			clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
887				 <&scif_clk>;
888			clock-names = "fck", "brg_int", "scif_clk";
889			dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
890			       <&dmac1 0x3b>, <&dmac1 0x3c>;
891			dma-names = "tx", "rx", "tx", "rx";
892			power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
893			resets = <&cpg 713>;
894			status = "disabled";
895		};
896
897		can0: can@e6e80000 {
898			compatible = "renesas,can-r8a7793",
899				     "renesas,rcar-gen2-can";
900			reg = <0 0xe6e80000 0 0x1000>;
901			interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
902			clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7793_CLK_RCAN>,
903				 <&can_clk>;
904			clock-names = "clkp1", "clkp2", "can_clk";
905			power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
906			resets = <&cpg 916>;
907			status = "disabled";
908		};
909
910		can1: can@e6e88000 {
911			compatible = "renesas,can-r8a7793",
912				     "renesas,rcar-gen2-can";
913			reg = <0 0xe6e88000 0 0x1000>;
914			interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
915			clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7793_CLK_RCAN>,
916				 <&can_clk>;
917			clock-names = "clkp1", "clkp2", "can_clk";
918			power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
919			resets = <&cpg 915>;
920			status = "disabled";
921		};
922
923		vin0: video@e6ef0000 {
924			compatible = "renesas,vin-r8a7793",
925				     "renesas,rcar-gen2-vin";
926			reg = <0 0xe6ef0000 0 0x1000>;
927			interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
928			clocks = <&cpg CPG_MOD 811>;
929			power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
930			resets = <&cpg 811>;
931			status = "disabled";
932		};
933
934		vin1: video@e6ef1000 {
935			compatible = "renesas,vin-r8a7793",
936				     "renesas,rcar-gen2-vin";
937			reg = <0 0xe6ef1000 0 0x1000>;
938			interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
939			clocks = <&cpg CPG_MOD 810>;
940			power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
941			resets = <&cpg 810>;
942			status = "disabled";
943		};
944
945		vin2: video@e6ef2000 {
946			compatible = "renesas,vin-r8a7793",
947				     "renesas,rcar-gen2-vin";
948			reg = <0 0xe6ef2000 0 0x1000>;
949			interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
950			clocks = <&cpg CPG_MOD 809>;
951			power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
952			resets = <&cpg 809>;
953			status = "disabled";
954		};
955
956		rcar_sound: sound@ec500000 {
957			/*
958			 * #sound-dai-cells is required
959			 *
960			 * Single DAI : #sound-dai-cells = <0>;         <&rcar_sound>;
961			 * Multi  DAI : #sound-dai-cells = <1>;         <&rcar_sound N>;
962			 */
963			compatible = "renesas,rcar_sound-r8a7793",
964				     "renesas,rcar_sound-gen2";
965			reg = <0 0xec500000 0 0x1000>, /* SCU */
966			      <0 0xec5a0000 0 0x100>,  /* ADG */
967			      <0 0xec540000 0 0x1000>, /* SSIU */
968			      <0 0xec541000 0 0x280>,  /* SSI */
969			      <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri*/
970			reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
971
972			clocks = <&cpg CPG_MOD 1005>,
973				 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
974				 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
975				 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
976				 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
977				 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
978				 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
979				 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
980				 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
981				 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
982				 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
983				 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
984				 <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
985				 <&cpg CPG_CORE R8A7793_CLK_M2>;
986			clock-names = "ssi-all",
987				      "ssi.9", "ssi.8", "ssi.7", "ssi.6",
988				      "ssi.5", "ssi.4", "ssi.3", "ssi.2",
989				      "ssi.1", "ssi.0",
990				      "src.9", "src.8", "src.7", "src.6",
991				      "src.5", "src.4", "src.3", "src.2",
992				      "src.1", "src.0",
993				      "dvc.0", "dvc.1",
994				      "clk_a", "clk_b", "clk_c", "clk_i";
995			power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
996			resets = <&cpg 1005>,
997				 <&cpg 1006>, <&cpg 1007>,
998				 <&cpg 1008>, <&cpg 1009>,
999				 <&cpg 1010>, <&cpg 1011>,
1000				 <&cpg 1012>, <&cpg 1013>,
1001				 <&cpg 1014>, <&cpg 1015>;
1002			reset-names = "ssi-all",
1003				      "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1004				      "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1005				      "ssi.1", "ssi.0";
1006
1007			status = "disabled";
1008
1009			rcar_sound,dvc {
1010				dvc0: dvc-0 {
1011					dmas = <&audma1 0xbc>;
1012					dma-names = "tx";
1013				};
1014				dvc1: dvc-1 {
1015					dmas = <&audma1 0xbe>;
1016					dma-names = "tx";
1017				};
1018			};
1019
1020			rcar_sound,src {
1021				src0: src-0 {
1022					interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1023					dmas = <&audma0 0x85>, <&audma1 0x9a>;
1024					dma-names = "rx", "tx";
1025				};
1026				src1: src-1 {
1027					interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1028					dmas = <&audma0 0x87>, <&audma1 0x9c>;
1029					dma-names = "rx", "tx";
1030				};
1031				src2: src-2 {
1032					interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1033					dmas = <&audma0 0x89>, <&audma1 0x9e>;
1034					dma-names = "rx", "tx";
1035				};
1036				src3: src-3 {
1037					interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1038					dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1039					dma-names = "rx", "tx";
1040				};
1041				src4: src-4 {
1042					interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1043					dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1044					dma-names = "rx", "tx";
1045				};
1046				src5: src-5 {
1047					interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1048					dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1049					dma-names = "rx", "tx";
1050				};
1051				src6: src-6 {
1052					interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1053					dmas = <&audma0 0x91>, <&audma1 0xb4>;
1054					dma-names = "rx", "tx";
1055				};
1056				src7: src-7 {
1057					interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1058					dmas = <&audma0 0x93>, <&audma1 0xb6>;
1059					dma-names = "rx", "tx";
1060				};
1061				src8: src-8 {
1062					interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1063					dmas = <&audma0 0x95>, <&audma1 0xb8>;
1064					dma-names = "rx", "tx";
1065				};
1066				src9: src-9 {
1067					interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1068					dmas = <&audma0 0x97>, <&audma1 0xba>;
1069					dma-names = "rx", "tx";
1070				};
1071			};
1072
1073			rcar_sound,ssi {
1074				ssi0: ssi-0 {
1075					interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1076					dmas = <&audma0 0x01>, <&audma1 0x02>,
1077					       <&audma0 0x15>, <&audma1 0x16>;
1078					dma-names = "rx", "tx", "rxu", "txu";
1079				};
1080				ssi1: ssi-1 {
1081					 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1082					dmas = <&audma0 0x03>, <&audma1 0x04>,
1083					       <&audma0 0x49>, <&audma1 0x4a>;
1084					dma-names = "rx", "tx", "rxu", "txu";
1085				};
1086				ssi2: ssi-2 {
1087					interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1088					dmas = <&audma0 0x05>, <&audma1 0x06>,
1089					       <&audma0 0x63>, <&audma1 0x64>;
1090					dma-names = "rx", "tx", "rxu", "txu";
1091				};
1092				ssi3: ssi-3 {
1093					interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1094					dmas = <&audma0 0x07>, <&audma1 0x08>,
1095					       <&audma0 0x6f>, <&audma1 0x70>;
1096					dma-names = "rx", "tx", "rxu", "txu";
1097				};
1098				ssi4: ssi-4 {
1099					interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1100					dmas = <&audma0 0x09>, <&audma1 0x0a>,
1101					       <&audma0 0x71>, <&audma1 0x72>;
1102					dma-names = "rx", "tx", "rxu", "txu";
1103				};
1104				ssi5: ssi-5 {
1105					interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1106					dmas = <&audma0 0x0b>, <&audma1 0x0c>,
1107					       <&audma0 0x73>, <&audma1 0x74>;
1108					dma-names = "rx", "tx", "rxu", "txu";
1109				};
1110				ssi6: ssi-6 {
1111					interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1112					dmas = <&audma0 0x0d>, <&audma1 0x0e>,
1113					       <&audma0 0x75>, <&audma1 0x76>;
1114					dma-names = "rx", "tx", "rxu", "txu";
1115				};
1116				ssi7: ssi-7 {
1117					interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1118					dmas = <&audma0 0x0f>, <&audma1 0x10>,
1119					       <&audma0 0x79>, <&audma1 0x7a>;
1120					dma-names = "rx", "tx", "rxu", "txu";
1121				};
1122				ssi8: ssi-8 {
1123					interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1124					dmas = <&audma0 0x11>, <&audma1 0x12>,
1125					       <&audma0 0x7b>, <&audma1 0x7c>;
1126					dma-names = "rx", "tx", "rxu", "txu";
1127				};
1128				ssi9: ssi-9 {
1129					interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1130					dmas = <&audma0 0x13>, <&audma1 0x14>,
1131					       <&audma0 0x7d>, <&audma1 0x7e>;
1132					dma-names = "rx", "tx", "rxu", "txu";
1133				};
1134			};
1135		};
1136
1137		audma0: dma-controller@ec700000 {
1138			compatible = "renesas,dmac-r8a7793",
1139				     "renesas,rcar-dmac";
1140			reg = <0 0xec700000 0 0x10000>;
1141			interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
1142				      GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
1143				      GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
1144				      GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
1145				      GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
1146				      GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
1147				      GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
1148				      GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
1149				      GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
1150				      GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
1151				      GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
1152				      GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
1153				      GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
1154				      GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
1155			interrupt-names = "error",
1156					  "ch0", "ch1", "ch2", "ch3",
1157					  "ch4", "ch5", "ch6", "ch7",
1158					  "ch8", "ch9", "ch10", "ch11",
1159					  "ch12";
1160			clocks = <&cpg CPG_MOD 502>;
1161			clock-names = "fck";
1162			power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1163			resets = <&cpg 502>;
1164			#dma-cells = <1>;
1165			dma-channels = <13>;
1166		};
1167
1168		audma1: dma-controller@ec720000 {
1169			compatible = "renesas,dmac-r8a7793",
1170				     "renesas,rcar-dmac";
1171			reg = <0 0xec720000 0 0x10000>;
1172			interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
1173				      GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
1174				      GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
1175				      GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
1176				      GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
1177				      GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
1178				      GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
1179				      GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
1180				      GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
1181				      GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
1182				      GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
1183				      GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
1184				      GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
1185				      GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
1186			interrupt-names = "error",
1187					  "ch0", "ch1", "ch2", "ch3",
1188					  "ch4", "ch5", "ch6", "ch7",
1189					  "ch8", "ch9", "ch10", "ch11",
1190					  "ch12";
1191			clocks = <&cpg CPG_MOD 501>;
1192			clock-names = "fck";
1193			power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1194			resets = <&cpg 501>;
1195			#dma-cells = <1>;
1196			dma-channels = <13>;
1197		};
1198
1199		sdhi0: sd@ee100000 {
1200			compatible = "renesas,sdhi-r8a7793",
1201				     "renesas,rcar-gen2-sdhi";
1202			reg = <0 0xee100000 0 0x328>;
1203			interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1204			clocks = <&cpg CPG_MOD 314>;
1205			dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
1206			       <&dmac1 0xcd>, <&dmac1 0xce>;
1207			dma-names = "tx", "rx", "tx", "rx";
1208			max-frequency = <195000000>;
1209			power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1210			resets = <&cpg 314>;
1211			status = "disabled";
1212		};
1213
1214		sdhi1: sd@ee140000 {
1215			compatible = "renesas,sdhi-r8a7793",
1216				     "renesas,rcar-gen2-sdhi";
1217			reg = <0 0xee140000 0 0x100>;
1218			interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1219			clocks = <&cpg CPG_MOD 312>;
1220			dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
1221			       <&dmac1 0xc1>, <&dmac1 0xc2>;
1222			dma-names = "tx", "rx", "tx", "rx";
1223			max-frequency = <97500000>;
1224			power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1225			resets = <&cpg 312>;
1226			status = "disabled";
1227		};
1228
1229		sdhi2: sd@ee160000 {
1230			compatible = "renesas,sdhi-r8a7793",
1231				     "renesas,rcar-gen2-sdhi";
1232			reg = <0 0xee160000 0 0x100>;
1233			interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1234			clocks = <&cpg CPG_MOD 311>;
1235			dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
1236			       <&dmac1 0xd3>, <&dmac1 0xd4>;
1237			dma-names = "tx", "rx", "tx", "rx";
1238			max-frequency = <97500000>;
1239			power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1240			resets = <&cpg 311>;
1241			status = "disabled";
1242		};
1243
1244		mmcif0: mmc@ee200000 {
1245			compatible = "renesas,mmcif-r8a7793",
1246				     "renesas,sh-mmcif";
1247			reg = <0 0xee200000 0 0x80>;
1248			interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
1249			clocks = <&cpg CPG_MOD 315>;
1250			dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
1251			       <&dmac1 0xd1>, <&dmac1 0xd2>;
1252			dma-names = "tx", "rx", "tx", "rx";
1253			power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1254			resets = <&cpg 315>;
1255			reg-io-width = <4>;
1256			status = "disabled";
1257			max-frequency = <97500000>;
1258		};
1259
1260		ether: ethernet@ee700000 {
1261			compatible = "renesas,ether-r8a7793",
1262				     "renesas,rcar-gen2-ether";
1263			reg = <0 0xee700000 0 0x400>;
1264			interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
1265			clocks = <&cpg CPG_MOD 813>;
1266			power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1267			resets = <&cpg 813>;
1268			phy-mode = "rmii";
1269			#address-cells = <1>;
1270			#size-cells = <0>;
1271			status = "disabled";
1272		};
1273
1274		gic: interrupt-controller@f1001000 {
1275			compatible = "arm,gic-400";
1276			#interrupt-cells = <3>;
1277			#address-cells = <0>;
1278			interrupt-controller;
1279			reg = <0 0xf1001000 0 0x1000>,
1280				<0 0xf1002000 0 0x2000>,
1281				<0 0xf1004000 0 0x2000>,
1282				<0 0xf1006000 0 0x2000>;
1283			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
1284			clocks = <&cpg CPG_MOD 408>;
1285			clock-names = "clk";
1286			power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1287			resets = <&cpg 408>;
1288		};
1289
1290		du: display@feb00000 {
1291			compatible = "renesas,du-r8a7793";
1292			reg = <0 0xfeb00000 0 0x40000>;
1293			interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1294				     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
1295			clocks = <&cpg CPG_MOD 724>,
1296				 <&cpg CPG_MOD 723>;
1297			clock-names = "du.0", "du.1";
1298			status = "disabled";
1299
1300			ports {
1301				#address-cells = <1>;
1302				#size-cells = <0>;
1303
1304				port@0 {
1305					reg = <0>;
1306					du_out_rgb: endpoint {
1307					};
1308				};
1309				port@1 {
1310					reg = <1>;
1311					du_out_lvds0: endpoint {
1312						remote-endpoint = <&lvds0_in>;
1313					};
1314				};
1315			};
1316		};
1317
1318		lvds0: lvds@feb90000 {
1319			compatible = "renesas,r8a7793-lvds";
1320			reg = <0 0xfeb90000 0 0x1c>;
1321			clocks = <&cpg CPG_MOD 726>;
1322			power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1323			resets = <&cpg 726>;
1324
1325			status = "disabled";
1326
1327			ports {
1328				#address-cells = <1>;
1329				#size-cells = <0>;
1330
1331				port@0 {
1332					reg = <0>;
1333					lvds0_in: endpoint {
1334						remote-endpoint = <&du_out_lvds0>;
1335					};
1336				};
1337				port@1 {
1338					reg = <1>;
1339					lvds0_out: endpoint {
1340					};
1341				};
1342			};
1343		};
1344
1345		prr: chipid@ff000044 {
1346			compatible = "renesas,prr";
1347			reg = <0 0xff000044 0 4>;
1348		};
1349
1350		cmt0: timer@ffca0000 {
1351			compatible = "renesas,r8a7793-cmt0",
1352				     "renesas,rcar-gen2-cmt0";
1353			reg = <0 0xffca0000 0 0x1004>;
1354			interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
1355				     <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
1356			clocks = <&cpg CPG_MOD 124>;
1357			clock-names = "fck";
1358			power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1359			resets = <&cpg 124>;
1360
1361			status = "disabled";
1362		};
1363
1364		cmt1: timer@e6130000 {
1365			compatible = "renesas,r8a7793-cmt1",
1366				     "renesas,rcar-gen2-cmt1";
1367			reg = <0 0xe6130000 0 0x1004>;
1368			interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
1369				     <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
1370				     <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
1371				     <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
1372				     <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
1373				     <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
1374				     <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
1375				     <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
1376			clocks = <&cpg CPG_MOD 329>;
1377			clock-names = "fck";
1378			power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
1379			resets = <&cpg 329>;
1380
1381			status = "disabled";
1382		};
1383	};
1384
1385	thermal-zones {
1386		cpu_thermal: cpu-thermal {
1387			polling-delay-passive = <0>;
1388			polling-delay = <0>;
1389
1390			thermal-sensors = <&thermal>;
1391
1392			trips {
1393				cpu-crit {
1394					temperature = <95000>;
1395					hysteresis = <0>;
1396					type = "critical";
1397				};
1398			};
1399			cooling-maps {
1400			};
1401		};
1402	};
1403
1404	timer {
1405		compatible = "arm,armv7-timer";
1406		interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1407				      <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1408				      <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1409				      <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
1410	};
1411
1412	/* External USB clock - can be overridden by the board */
1413	usb_extal_clk: usb_extal {
1414		compatible = "fixed-clock";
1415		#clock-cells = <0>;
1416		clock-frequency = <48000000>;
1417	};
1418};
1419