1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the Blanche board
4 *
5 * Copyright (C) 2014 Renesas Electronics Corporation
6 * Copyright (C) 2016 Cogent  Embedded, Inc.
7 */
8
9/dts-v1/;
10#include "r8a7792.dtsi"
11#include <dt-bindings/gpio/gpio.h>
12#include <dt-bindings/input/input.h>
13
14/ {
15	model = "Blanche";
16	compatible = "renesas,blanche", "renesas,r8a7792";
17
18	aliases {
19		serial0 = &scif0;
20		serial1 = &scif3;
21	};
22
23	chosen {
24		bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
25		stdout-path = "serial0:115200n8";
26	};
27
28	memory@40000000 {
29		device_type = "memory";
30		reg = <0 0x40000000 0 0x40000000>;
31	};
32
33	d3_3v: regulator-3v3 {
34		compatible = "regulator-fixed";
35		regulator-name = "D3.3V";
36		regulator-min-microvolt = <3300000>;
37		regulator-max-microvolt = <3300000>;
38		regulator-boot-on;
39		regulator-always-on;
40	};
41
42	ethernet@18000000 {
43		compatible = "smsc,lan89218", "smsc,lan9115";
44		reg = <0 0x18000000 0 0x100>;
45		phy-mode = "mii";
46		interrupt-parent = <&irqc>;
47		interrupts = <0 IRQ_TYPE_EDGE_FALLING>;
48		smsc,irq-push-pull;
49		reg-io-width = <4>;
50		vddvario-supply = <&d3_3v>;
51		vdd33a-supply = <&d3_3v>;
52
53		pinctrl-0 = <&lan89218_pins>;
54		pinctrl-names = "default";
55	};
56
57	vga-encoder {
58		compatible = "adi,adv7123";
59
60		ports {
61			#address-cells = <1>;
62			#size-cells = <0>;
63
64			port@0 {
65				reg = <0>;
66				adv7123_in: endpoint {
67					remote-endpoint = <&du_out_rgb1>;
68				};
69			};
70			port@1 {
71				reg = <1>;
72				adv7123_out: endpoint {
73					remote-endpoint = <&vga_in>;
74				};
75			};
76		};
77	};
78
79	hdmi-out {
80		compatible = "hdmi-connector";
81		type = "a";
82
83		port {
84			hdmi_con: endpoint {
85				remote-endpoint = <&adv7511_out>;
86			};
87		};
88	};
89
90	vga {
91		compatible = "vga-connector";
92
93		port {
94			vga_in: endpoint {
95				remote-endpoint = <&adv7123_out>;
96			};
97		};
98	};
99
100	x1_clk: x1 {
101		compatible = "fixed-clock";
102		#clock-cells = <0>;
103		clock-frequency = <74250000>;
104	};
105
106	x2_clk: x2 {
107		compatible = "fixed-clock";
108		#clock-cells = <0>;
109		clock-frequency = <65000000>;
110	};
111
112	keyboard {
113		compatible = "gpio-keys";
114
115		key-1 {
116			linux,code = <KEY_1>;
117			label = "SW2-1";
118			wakeup-source;
119			debounce-interval = <20>;
120			gpios = <&gpio3 10 GPIO_ACTIVE_LOW>;
121		};
122		key-2 {
123			linux,code = <KEY_2>;
124			label = "SW2-2";
125			wakeup-source;
126			debounce-interval = <20>;
127			gpios = <&gpio3 11 GPIO_ACTIVE_LOW>;
128		};
129		key-3 {
130			linux,code = <KEY_3>;
131			label = "SW2-3";
132			wakeup-source;
133			debounce-interval = <20>;
134			gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
135		};
136		key-4 {
137			linux,code = <KEY_4>;
138			label = "SW2-4";
139			wakeup-source;
140			debounce-interval = <20>;
141			gpios = <&gpio3 15 GPIO_ACTIVE_LOW>;
142		};
143		key-a {
144			linux,code = <KEY_A>;
145			label = "SW24";
146			wakeup-source;
147			debounce-interval = <20>;
148			gpios = <&gpio3 20 GPIO_ACTIVE_LOW>;
149		};
150		key-b {
151			linux,code = <KEY_B>;
152			label = "SW25";
153			wakeup-source;
154			debounce-interval = <20>;
155			gpios = <&gpio11 2 GPIO_ACTIVE_LOW>;
156		};
157	};
158
159	leds {
160		compatible = "gpio-leds";
161
162		led17 {
163			gpios = <&gpio10 10 GPIO_ACTIVE_HIGH>;
164		};
165		led18 {
166			gpios = <&gpio10 11 GPIO_ACTIVE_HIGH>;
167		};
168		led19 {
169			gpios = <&gpio10 12 GPIO_ACTIVE_HIGH>;
170		};
171		led20 {
172			gpios = <&gpio10 23 GPIO_ACTIVE_HIGH>;
173		};
174	};
175
176	vcc_sdhi0: regulator-vcc-sdhi0 {
177		compatible = "regulator-fixed";
178
179		regulator-name = "SDHI0 Vcc";
180		regulator-min-microvolt = <3300000>;
181		regulator-max-microvolt = <3300000>;
182
183		gpio = <&gpio11 12 GPIO_ACTIVE_HIGH>;
184		enable-active-high;
185	};
186};
187
188&extal_clk {
189	clock-frequency = <20000000>;
190};
191
192&can_clk {
193	clock-frequency = <48000000>;
194};
195
196&pfc {
197	scif0_pins: scif0 {
198		groups = "scif0_data";
199		function = "scif0";
200	};
201
202	scif3_pins: scif3 {
203		groups = "scif3_data";
204		function = "scif3";
205	};
206
207	lan89218_pins: lan89218 {
208		intc {
209			groups = "intc_irq0";
210			function = "intc";
211		};
212		lbsc {
213			groups = "lbsc_ex_cs0";
214			function = "lbsc";
215		};
216	};
217
218	can0_pins: can0 {
219		groups = "can0_data", "can_clk";
220		function = "can0";
221	};
222
223	sdhi0_pins: sdhi0 {
224		groups = "sdhi0_data4", "sdhi0_ctrl";
225		function = "sdhi0";
226	};
227
228	du0_pins: du0 {
229		groups = "du0_rgb888", "du0_sync", "du0_disp";
230		function = "du0";
231	};
232
233	du1_pins: du1 {
234		groups = "du1_rgb666", "du1_sync", "du1_disp";
235		function = "du1";
236	};
237};
238
239&scif0 {
240	pinctrl-0 = <&scif0_pins>;
241	pinctrl-names = "default";
242
243	status = "okay";
244};
245
246&scif3 {
247	pinctrl-0 = <&scif3_pins>;
248	pinctrl-names = "default";
249
250	status = "okay";
251};
252
253&can0 {
254	pinctrl-0 = <&can0_pins>;
255	pinctrl-names = "default";
256
257	status = "okay";
258};
259
260&sdhi0 {
261	pinctrl-0 = <&sdhi0_pins>;
262	pinctrl-names = "default";
263
264	vmmc-supply = <&vcc_sdhi0>;
265	cd-gpios = <&gpio11 11 GPIO_ACTIVE_LOW>;
266	status = "okay";
267};
268
269&i2c1 {
270	status = "okay";
271	clock-frequency = <400000>;
272
273	hdmi@39 {
274		compatible = "adi,adv7511w";
275		reg = <0x39>;
276		interrupt-parent = <&irqc>;
277		interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
278
279		adi,input-depth = <8>;
280		adi,input-colorspace = "rgb";
281		adi,input-clock = "1x";
282		adi,input-style = <1>;
283		adi,input-justification = "evenly";
284
285		ports {
286			#address-cells = <1>;
287			#size-cells = <0>;
288
289			port@0 {
290				reg = <0>;
291				adv7511_in: endpoint {
292					remote-endpoint = <&du_out_rgb0>;
293				};
294			};
295
296			port@1 {
297				reg = <1>;
298				adv7511_out: endpoint {
299					remote-endpoint = <&hdmi_con>;
300				};
301			};
302		};
303	};
304};
305
306&du {
307	pinctrl-0 = <&du0_pins &du1_pins>;
308	pinctrl-names = "default";
309
310	clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, <&x1_clk>, <&x2_clk>;
311	clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1";
312	status = "okay";
313
314	ports {
315		port@0 {
316			endpoint {
317				remote-endpoint = <&adv7511_in>;
318			};
319		};
320		port@1 {
321			endpoint {
322				remote-endpoint = <&adv7123_in>;
323			};
324		};
325	};
326};
327