1/*
2 * Device Tree Source for the Blanche board
3 *
4 * Copyright (C) 2014 Renesas Electronics Corporation
5 * Copyright (C) 2016 Cogent  Embedded, Inc.
6 *
7 * SPDX-License-Identifier:	GPL-2.0
8 */
9
10/dts-v1/;
11#include "r8a7792.dtsi"
12#include <dt-bindings/gpio/gpio.h>
13#include <dt-bindings/input/input.h>
14
15/ {
16	model = "Blanche";
17	compatible = "renesas,blanche", "renesas,r8a7792";
18
19	aliases {
20		serial0 = &scif0;
21		serial1 = &scif3;
22	};
23
24	chosen {
25		bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
26		stdout-path = "serial0:115200n8";
27	};
28
29	memory@40000000 {
30		device_type = "memory";
31		reg = <0 0x40000000 0 0x40000000>;
32	};
33
34	d3_3v: regulator-3v3 {
35		compatible = "regulator-fixed";
36		regulator-name = "D3.3V";
37		regulator-min-microvolt = <3300000>;
38		regulator-max-microvolt = <3300000>;
39		regulator-boot-on;
40		regulator-always-on;
41	};
42
43	ethernet@18000000 {
44		compatible = "smsc,lan89218", "smsc,lan9115";
45		reg = <0 0x18000000 0 0x100>;
46		phy-mode = "mii";
47		interrupt-parent = <&irqc>;
48		interrupts = <0 IRQ_TYPE_EDGE_FALLING>;
49		smsc,irq-push-pull;
50		reg-io-width = <4>;
51		vddvario-supply = <&d3_3v>;
52		vdd33a-supply = <&d3_3v>;
53
54		pinctrl-0 = <&lan89218_pins>;
55		pinctrl-names = "default";
56	};
57
58	vga-encoder {
59		compatible = "adi,adv7123";
60
61		ports {
62			#address-cells = <1>;
63			#size-cells = <0>;
64
65			port@0 {
66				reg = <0>;
67				adv7123_in: endpoint {
68					remote-endpoint = <&du_out_rgb1>;
69				};
70			};
71			port@1 {
72				reg = <1>;
73				adv7123_out: endpoint {
74					remote-endpoint = <&vga_in>;
75				};
76			};
77		};
78	};
79
80	hdmi-out {
81		compatible = "hdmi-connector";
82		type = "a";
83
84		port {
85			hdmi_con: endpoint {
86				remote-endpoint = <&adv7511_out>;
87			};
88		};
89	};
90
91	vga {
92		compatible = "vga-connector";
93
94		port {
95			vga_in: endpoint {
96				remote-endpoint = <&adv7123_out>;
97			};
98		};
99	};
100
101	x1_clk: x1 {
102		compatible = "fixed-clock";
103		#clock-cells = <0>;
104		clock-frequency = <74250000>;
105	};
106
107	x2_clk: x2 {
108		compatible = "fixed-clock";
109		#clock-cells = <0>;
110		clock-frequency = <65000000>;
111	};
112
113	keyboard {
114		compatible = "gpio-keys";
115
116		key-1 {
117			linux,code = <KEY_1>;
118			label = "SW2-1";
119			wakeup-source;
120			debounce-interval = <20>;
121			gpios = <&gpio3 10 GPIO_ACTIVE_LOW>;
122		};
123		key-2 {
124			linux,code = <KEY_2>;
125			label = "SW2-2";
126			wakeup-source;
127			debounce-interval = <20>;
128			gpios = <&gpio3 11 GPIO_ACTIVE_LOW>;
129		};
130		key-3 {
131			linux,code = <KEY_3>;
132			label = "SW2-3";
133			wakeup-source;
134			debounce-interval = <20>;
135			gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
136		};
137		key-4 {
138			linux,code = <KEY_4>;
139			label = "SW2-4";
140			wakeup-source;
141			debounce-interval = <20>;
142			gpios = <&gpio3 15 GPIO_ACTIVE_LOW>;
143		};
144		key-a {
145			linux,code = <KEY_A>;
146			label = "SW24";
147			wakeup-source;
148			debounce-interval = <20>;
149			gpios = <&gpio3 20 GPIO_ACTIVE_LOW>;
150		};
151		key-b {
152			linux,code = <KEY_B>;
153			label = "SW25";
154			wakeup-source;
155			debounce-interval = <20>;
156			gpios = <&gpio11 2 GPIO_ACTIVE_LOW>;
157		};
158	};
159
160	leds {
161		compatible = "gpio-leds";
162
163		led17 {
164			gpios = <&gpio10 10 GPIO_ACTIVE_HIGH>;
165		};
166		led18 {
167			gpios = <&gpio10 11 GPIO_ACTIVE_HIGH>;
168		};
169		led19 {
170			gpios = <&gpio10 12 GPIO_ACTIVE_HIGH>;
171		};
172		led20 {
173			gpios = <&gpio10 23 GPIO_ACTIVE_HIGH>;
174		};
175	};
176
177	vcc_sdhi0: regulator-vcc-sdhi0 {
178		compatible = "regulator-fixed";
179
180		regulator-name = "SDHI0 Vcc";
181		regulator-min-microvolt = <3300000>;
182		regulator-max-microvolt = <3300000>;
183
184		gpio = <&gpio11 12 GPIO_ACTIVE_HIGH>;
185		enable-active-high;
186	};
187};
188
189&extal_clk {
190	clock-frequency = <20000000>;
191};
192
193&can_clk {
194	clock-frequency = <48000000>;
195};
196
197&pfc {
198	scif0_pins: scif0 {
199		groups = "scif0_data";
200		function = "scif0";
201	};
202
203	scif3_pins: scif3 {
204		groups = "scif3_data";
205		function = "scif3";
206	};
207
208	lan89218_pins: lan89218 {
209		intc {
210			groups = "intc_irq0";
211			function = "intc";
212		};
213		lbsc {
214			groups = "lbsc_ex_cs0";
215			function = "lbsc";
216		};
217	};
218
219	can0_pins: can0 {
220		groups = "can0_data", "can_clk";
221		function = "can0";
222	};
223
224	sdhi0_pins: sdhi0 {
225		groups = "sdhi0_data4", "sdhi0_ctrl";
226		function = "sdhi0";
227	};
228
229	du0_pins: du0 {
230		groups = "du0_rgb888", "du0_sync", "du0_disp";
231		function = "du0";
232	};
233
234	du1_pins: du1 {
235		groups = "du1_rgb666", "du1_sync", "du1_disp";
236		function = "du1";
237	};
238};
239
240&scif0 {
241	pinctrl-0 = <&scif0_pins>;
242	pinctrl-names = "default";
243
244	status = "okay";
245};
246
247&scif3 {
248	pinctrl-0 = <&scif3_pins>;
249	pinctrl-names = "default";
250
251	status = "okay";
252};
253
254&can0 {
255	pinctrl-0 = <&can0_pins>;
256	pinctrl-names = "default";
257
258	status = "okay";
259};
260
261&sdhi0 {
262	pinctrl-0 = <&sdhi0_pins>;
263	pinctrl-names = "default";
264
265	vmmc-supply = <&vcc_sdhi0>;
266	cd-gpios = <&gpio11 11 GPIO_ACTIVE_LOW>;
267	status = "okay";
268};
269
270&i2c1 {
271	status = "okay";
272	clock-frequency = <400000>;
273
274	hdmi@39 {
275		compatible = "adi,adv7511w";
276		reg = <0x39>;
277		interrupt-parent = <&irqc>;
278		interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
279
280		adi,input-depth = <8>;
281		adi,input-colorspace = "rgb";
282		adi,input-clock = "1x";
283		adi,input-style = <1>;
284		adi,input-justification = "evenly";
285
286		ports {
287			#address-cells = <1>;
288			#size-cells = <0>;
289
290			port@0 {
291				reg = <0>;
292				adv7511_in: endpoint {
293					remote-endpoint = <&du_out_rgb0>;
294				};
295			};
296
297			port@1 {
298				reg = <1>;
299				adv7511_out: endpoint {
300					remote-endpoint = <&hdmi_con>;
301				};
302			};
303		};
304	};
305};
306
307&du {
308	pinctrl-0 = <&du0_pins &du1_pins>;
309	pinctrl-names = "default";
310
311	clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, <&x1_clk>, <&x2_clk>;
312	clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1";
313	status = "okay";
314
315	ports {
316		port@0 {
317			endpoint {
318				remote-endpoint = <&adv7511_in>;
319			};
320		};
321		port@1 {
322			endpoint {
323				remote-endpoint = <&adv7123_in>;
324			};
325		};
326	};
327};
328