xref: /openbmc/u-boot/arch/arm/dts/r8a7791.dtsi (revision ef64e782)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the r8a7791 SoC
4 *
5 * Copyright (C) 2013-2015 Renesas Electronics Corporation
6 * Copyright (C) 2013-2014 Renesas Solutions Corp.
7 * Copyright (C) 2014 Cogent Embedded Inc.
8 */
9
10#include <dt-bindings/clock/r8a7791-cpg-mssr.h>
11#include <dt-bindings/interrupt-controller/arm-gic.h>
12#include <dt-bindings/interrupt-controller/irq.h>
13#include <dt-bindings/power/r8a7791-sysc.h>
14
15/ {
16	compatible = "renesas,r8a7791";
17	#address-cells = <2>;
18	#size-cells = <2>;
19
20	aliases {
21		i2c0 = &i2c0;
22		i2c1 = &i2c1;
23		i2c2 = &i2c2;
24		i2c3 = &i2c3;
25		i2c4 = &i2c4;
26		i2c5 = &i2c5;
27		i2c6 = &i2c6;
28		i2c7 = &i2c7;
29		i2c8 = &i2c8;
30		spi0 = &qspi;
31		spi1 = &msiof0;
32		spi2 = &msiof1;
33		spi3 = &msiof2;
34		vin0 = &vin0;
35		vin1 = &vin1;
36		vin2 = &vin2;
37	};
38
39	/*
40	 * The external audio clocks are configured as 0 Hz fixed frequency
41	 * clocks by default.
42	 * Boards that provide audio clocks should override them.
43	 */
44	audio_clk_a: audio_clk_a {
45		compatible = "fixed-clock";
46		#clock-cells = <0>;
47		clock-frequency = <0>;
48	};
49	audio_clk_b: audio_clk_b {
50		compatible = "fixed-clock";
51		#clock-cells = <0>;
52		clock-frequency = <0>;
53	};
54	audio_clk_c: audio_clk_c {
55		compatible = "fixed-clock";
56		#clock-cells = <0>;
57		clock-frequency = <0>;
58	};
59
60	/* External CAN clock */
61	can_clk: can {
62		compatible = "fixed-clock";
63		#clock-cells = <0>;
64		/* This value must be overridden by the board. */
65		clock-frequency = <0>;
66	};
67
68	cpus {
69		#address-cells = <1>;
70		#size-cells = <0>;
71		enable-method = "renesas,apmu";
72
73		cpu0: cpu@0 {
74			device_type = "cpu";
75			compatible = "arm,cortex-a15";
76			reg = <0>;
77			clock-frequency = <1500000000>;
78			voltage-tolerance = <1>; /* 1% */
79			clocks = <&cpg CPG_CORE R8A7791_CLK_Z>;
80			clock-latency = <300000>; /* 300 us */
81			power-domains = <&sysc R8A7791_PD_CA15_CPU0>;
82			next-level-cache = <&L2_CA15>;
83
84			/* kHz - uV - OPPs unknown yet */
85			operating-points = <1500000 1000000>,
86					   <1312500 1000000>,
87					   <1125000 1000000>,
88					   < 937500 1000000>,
89					   < 750000 1000000>,
90					   < 375000 1000000>;
91		};
92
93		cpu1: cpu@1 {
94			device_type = "cpu";
95			compatible = "arm,cortex-a15";
96			reg = <1>;
97			clock-frequency = <1500000000>;
98			clocks = <&cpg CPG_CORE R8A7791_CLK_Z>;
99			power-domains = <&sysc R8A7791_PD_CA15_CPU1>;
100			next-level-cache = <&L2_CA15>;
101		};
102
103		L2_CA15: cache-controller-0 {
104			compatible = "cache";
105			power-domains = <&sysc R8A7791_PD_CA15_SCU>;
106			cache-unified;
107			cache-level = <2>;
108		};
109	};
110
111	/* External root clock */
112	extal_clk: extal {
113		compatible = "fixed-clock";
114		#clock-cells = <0>;
115		/* This value must be overridden by the board. */
116		clock-frequency = <0>;
117	};
118
119	/* External PCIe clock - can be overridden by the board */
120	pcie_bus_clk: pcie_bus {
121		compatible = "fixed-clock";
122		#clock-cells = <0>;
123		clock-frequency = <0>;
124	};
125
126	/* External SCIF clock */
127	scif_clk: scif {
128		compatible = "fixed-clock";
129		#clock-cells = <0>;
130		/* This value must be overridden by the board. */
131		clock-frequency = <0>;
132	};
133
134	soc {
135		compatible = "simple-bus";
136		interrupt-parent = <&gic>;
137
138		#address-cells = <2>;
139		#size-cells = <2>;
140		ranges;
141
142		gpio0: gpio@e6050000 {
143			compatible = "renesas,gpio-r8a7791",
144				     "renesas,rcar-gen2-gpio";
145			reg = <0 0xe6050000 0 0x50>;
146			interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
147			#gpio-cells = <2>;
148			gpio-controller;
149			gpio-ranges = <&pfc 0 0 32>;
150			#interrupt-cells = <2>;
151			interrupt-controller;
152			clocks = <&cpg CPG_MOD 912>;
153			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
154			resets = <&cpg 912>;
155		};
156
157		gpio1: gpio@e6051000 {
158			compatible = "renesas,gpio-r8a7791",
159				     "renesas,rcar-gen2-gpio";
160			reg = <0 0xe6051000 0 0x50>;
161			interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
162			#gpio-cells = <2>;
163			gpio-controller;
164			gpio-ranges = <&pfc 0 32 26>;
165			#interrupt-cells = <2>;
166			interrupt-controller;
167			clocks = <&cpg CPG_MOD 911>;
168			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
169			resets = <&cpg 911>;
170		};
171
172		gpio2: gpio@e6052000 {
173			compatible = "renesas,gpio-r8a7791",
174				     "renesas,rcar-gen2-gpio";
175			reg = <0 0xe6052000 0 0x50>;
176			interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
177			#gpio-cells = <2>;
178			gpio-controller;
179			gpio-ranges = <&pfc 0 64 32>;
180			#interrupt-cells = <2>;
181			interrupt-controller;
182			clocks = <&cpg CPG_MOD 910>;
183			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
184			resets = <&cpg 910>;
185		};
186
187		gpio3: gpio@e6053000 {
188			compatible = "renesas,gpio-r8a7791",
189				     "renesas,rcar-gen2-gpio";
190			reg = <0 0xe6053000 0 0x50>;
191			interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
192			#gpio-cells = <2>;
193			gpio-controller;
194			gpio-ranges = <&pfc 0 96 32>;
195			#interrupt-cells = <2>;
196			interrupt-controller;
197			clocks = <&cpg CPG_MOD 909>;
198			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
199			resets = <&cpg 909>;
200		};
201
202		gpio4: gpio@e6054000 {
203			compatible = "renesas,gpio-r8a7791",
204				     "renesas,rcar-gen2-gpio";
205			reg = <0 0xe6054000 0 0x50>;
206			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
207			#gpio-cells = <2>;
208			gpio-controller;
209			gpio-ranges = <&pfc 0 128 32>;
210			#interrupt-cells = <2>;
211			interrupt-controller;
212			clocks = <&cpg CPG_MOD 908>;
213			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
214			resets = <&cpg 908>;
215		};
216
217		gpio5: gpio@e6055000 {
218			compatible = "renesas,gpio-r8a7791",
219				     "renesas,rcar-gen2-gpio";
220			reg = <0 0xe6055000 0 0x50>;
221			interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
222			#gpio-cells = <2>;
223			gpio-controller;
224			gpio-ranges = <&pfc 0 160 32>;
225			#interrupt-cells = <2>;
226			interrupt-controller;
227			clocks = <&cpg CPG_MOD 907>;
228			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
229			resets = <&cpg 907>;
230		};
231
232		gpio6: gpio@e6055400 {
233			compatible = "renesas,gpio-r8a7791",
234				     "renesas,rcar-gen2-gpio";
235			reg = <0 0xe6055400 0 0x50>;
236			interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
237			#gpio-cells = <2>;
238			gpio-controller;
239			gpio-ranges = <&pfc 0 192 32>;
240			#interrupt-cells = <2>;
241			interrupt-controller;
242			clocks = <&cpg CPG_MOD 905>;
243			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
244			resets = <&cpg 905>;
245		};
246
247		gpio7: gpio@e6055800 {
248			compatible = "renesas,gpio-r8a7791",
249				     "renesas,rcar-gen2-gpio";
250			reg = <0 0xe6055800 0 0x50>;
251			interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
252			#gpio-cells = <2>;
253			gpio-controller;
254			gpio-ranges = <&pfc 0 224 26>;
255			#interrupt-cells = <2>;
256			interrupt-controller;
257			clocks = <&cpg CPG_MOD 904>;
258			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
259			resets = <&cpg 904>;
260		};
261
262		pfc: pin-controller@e6060000 {
263			compatible = "renesas,pfc-r8a7791";
264			reg = <0 0xe6060000 0 0x250>;
265		};
266
267		cpg: clock-controller@e6150000 {
268			compatible = "renesas,r8a7791-cpg-mssr";
269			reg = <0 0xe6150000 0 0x1000>;
270			clocks = <&extal_clk>, <&usb_extal_clk>;
271			clock-names = "extal", "usb_extal";
272			#clock-cells = <2>;
273			#power-domain-cells = <0>;
274			#reset-cells = <1>;
275		};
276
277		apmu@e6152000 {
278			compatible = "renesas,r8a7791-apmu", "renesas,apmu";
279			reg = <0 0xe6152000 0 0x188>;
280			cpus = <&cpu0 &cpu1>;
281		};
282
283		rst: reset-controller@e6160000 {
284			compatible = "renesas,r8a7791-rst";
285			reg = <0 0xe6160000 0 0x0100>;
286		};
287
288		sysc: system-controller@e6180000 {
289			compatible = "renesas,r8a7791-sysc";
290			reg = <0 0xe6180000 0 0x0200>;
291			#power-domain-cells = <1>;
292		};
293
294		irqc0: interrupt-controller@e61c0000 {
295			compatible = "renesas,irqc-r8a7791", "renesas,irqc";
296			#interrupt-cells = <2>;
297			interrupt-controller;
298			reg = <0 0xe61c0000 0 0x200>;
299			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
300				     <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
301				     <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
302				     <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
303				     <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
304				     <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
305				     <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
306				     <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
307				     <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
308				     <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
309			clocks = <&cpg CPG_MOD 407>;
310			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
311			resets = <&cpg 407>;
312		};
313
314		thermal: thermal@e61f0000 {
315			compatible = "renesas,thermal-r8a7791",
316				     "renesas,rcar-gen2-thermal",
317				     "renesas,rcar-thermal";
318			reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
319			interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
320			clocks = <&cpg CPG_MOD 522>;
321			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
322			resets = <&cpg 522>;
323			#thermal-sensor-cells = <0>;
324		};
325
326		ipmmu_sy0: mmu@e6280000 {
327			compatible = "renesas,ipmmu-r8a7791",
328				     "renesas,ipmmu-vmsa";
329			reg = <0 0xe6280000 0 0x1000>;
330			interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
331				     <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
332			#iommu-cells = <1>;
333			status = "disabled";
334		};
335
336		ipmmu_sy1: mmu@e6290000 {
337			compatible = "renesas,ipmmu-r8a7791",
338				     "renesas,ipmmu-vmsa";
339			reg = <0 0xe6290000 0 0x1000>;
340			interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
341			#iommu-cells = <1>;
342			status = "disabled";
343		};
344
345		ipmmu_ds: mmu@e6740000 {
346			compatible = "renesas,ipmmu-r8a7791",
347				     "renesas,ipmmu-vmsa";
348			reg = <0 0xe6740000 0 0x1000>;
349			interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
350				     <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
351			#iommu-cells = <1>;
352			status = "disabled";
353		};
354
355		ipmmu_mp: mmu@ec680000 {
356			compatible = "renesas,ipmmu-r8a7791",
357				     "renesas,ipmmu-vmsa";
358			reg = <0 0xec680000 0 0x1000>;
359			interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
360			#iommu-cells = <1>;
361			status = "disabled";
362		};
363
364		ipmmu_mx: mmu@fe951000 {
365			compatible = "renesas,ipmmu-r8a7791",
366				     "renesas,ipmmu-vmsa";
367			reg = <0 0xfe951000 0 0x1000>;
368			interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
369				     <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
370			#iommu-cells = <1>;
371			status = "disabled";
372		};
373
374		ipmmu_rt: mmu@ffc80000 {
375			compatible = "renesas,ipmmu-r8a7791",
376				     "renesas,ipmmu-vmsa";
377			reg = <0 0xffc80000 0 0x1000>;
378			interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
379			#iommu-cells = <1>;
380			status = "disabled";
381		};
382
383		ipmmu_gp: mmu@e62a0000 {
384			compatible = "renesas,ipmmu-r8a7791",
385				     "renesas,ipmmu-vmsa";
386			reg = <0 0xe62a0000 0 0x1000>;
387			interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
388				     <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
389			#iommu-cells = <1>;
390			status = "disabled";
391		};
392
393		icram0:	sram@e63a0000 {
394			compatible = "mmio-sram";
395			reg = <0 0xe63a0000 0 0x12000>;
396		};
397
398		icram1:	sram@e63c0000 {
399			compatible = "mmio-sram";
400			reg = <0 0xe63c0000 0 0x1000>;
401			#address-cells = <1>;
402			#size-cells = <1>;
403			ranges = <0 0 0xe63c0000 0x1000>;
404
405			smp-sram@0 {
406				compatible = "renesas,smp-sram";
407				reg = <0 0x10>;
408			};
409		};
410
411		/* The memory map in the User's Manual maps the cores to
412		 * bus numbers
413		 */
414		i2c0: i2c@e6508000 {
415			#address-cells = <1>;
416			#size-cells = <0>;
417			compatible = "renesas,i2c-r8a7791",
418				     "renesas,rcar-gen2-i2c";
419			reg = <0 0xe6508000 0 0x40>;
420			interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
421			clocks = <&cpg CPG_MOD 931>;
422			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
423			resets = <&cpg 931>;
424			i2c-scl-internal-delay-ns = <6>;
425			status = "disabled";
426		};
427
428		i2c1: i2c@e6518000 {
429			#address-cells = <1>;
430			#size-cells = <0>;
431			compatible = "renesas,i2c-r8a7791",
432				     "renesas,rcar-gen2-i2c";
433			reg = <0 0xe6518000 0 0x40>;
434			interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
435			clocks = <&cpg CPG_MOD 930>;
436			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
437			resets = <&cpg 930>;
438			i2c-scl-internal-delay-ns = <6>;
439			status = "disabled";
440		};
441
442		i2c2: i2c@e6530000 {
443			#address-cells = <1>;
444			#size-cells = <0>;
445			compatible = "renesas,i2c-r8a7791",
446				     "renesas,rcar-gen2-i2c";
447			reg = <0 0xe6530000 0 0x40>;
448			interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
449			clocks = <&cpg CPG_MOD 929>;
450			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
451			resets = <&cpg 929>;
452			i2c-scl-internal-delay-ns = <6>;
453			status = "disabled";
454		};
455
456		i2c3: i2c@e6540000 {
457			#address-cells = <1>;
458			#size-cells = <0>;
459			compatible = "renesas,i2c-r8a7791",
460				     "renesas,rcar-gen2-i2c";
461			reg = <0 0xe6540000 0 0x40>;
462			interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
463			clocks = <&cpg CPG_MOD 928>;
464			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
465			resets = <&cpg 928>;
466			i2c-scl-internal-delay-ns = <6>;
467			status = "disabled";
468		};
469
470		i2c4: i2c@e6520000 {
471			#address-cells = <1>;
472			#size-cells = <0>;
473			compatible = "renesas,i2c-r8a7791",
474				     "renesas,rcar-gen2-i2c";
475			reg = <0 0xe6520000 0 0x40>;
476			interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
477			clocks = <&cpg CPG_MOD 927>;
478			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
479			resets = <&cpg 927>;
480			i2c-scl-internal-delay-ns = <6>;
481			status = "disabled";
482		};
483
484		i2c5: i2c@e6528000 {
485			/* doesn't need pinmux */
486			#address-cells = <1>;
487			#size-cells = <0>;
488			compatible = "renesas,i2c-r8a7791",
489				     "renesas,rcar-gen2-i2c";
490			reg = <0 0xe6528000 0 0x40>;
491			interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
492			clocks = <&cpg CPG_MOD 925>;
493			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
494			resets = <&cpg 925>;
495			i2c-scl-internal-delay-ns = <110>;
496			status = "disabled";
497		};
498
499		i2c6: i2c@e60b0000 {
500			/* doesn't need pinmux */
501			#address-cells = <1>;
502			#size-cells = <0>;
503			compatible = "renesas,iic-r8a7791",
504				     "renesas,rcar-gen2-iic",
505				     "renesas,rmobile-iic";
506			reg = <0 0xe60b0000 0 0x425>;
507			interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
508			clocks = <&cpg CPG_MOD 926>;
509			dmas = <&dmac0 0x77>, <&dmac0 0x78>,
510			       <&dmac1 0x77>, <&dmac1 0x78>;
511			dma-names = "tx", "rx", "tx", "rx";
512			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
513			resets = <&cpg 926>;
514			status = "disabled";
515		};
516
517		i2c7: i2c@e6500000 {
518			#address-cells = <1>;
519			#size-cells = <0>;
520			compatible = "renesas,iic-r8a7791",
521				     "renesas,rcar-gen2-iic",
522				     "renesas,rmobile-iic";
523			reg = <0 0xe6500000 0 0x425>;
524			interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
525			clocks = <&cpg CPG_MOD 318>;
526			dmas = <&dmac0 0x61>, <&dmac0 0x62>,
527			       <&dmac1 0x61>, <&dmac1 0x62>;
528			dma-names = "tx", "rx", "tx", "rx";
529			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
530			resets = <&cpg 318>;
531			status = "disabled";
532		};
533
534		i2c8: i2c@e6510000 {
535			#address-cells = <1>;
536			#size-cells = <0>;
537			compatible = "renesas,iic-r8a7791",
538				     "renesas,rcar-gen2-iic",
539				     "renesas,rmobile-iic";
540			reg = <0 0xe6510000 0 0x425>;
541			interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
542			clocks = <&cpg CPG_MOD 323>;
543			dmas = <&dmac0 0x65>, <&dmac0 0x66>,
544			       <&dmac1 0x65>, <&dmac1 0x66>;
545			dma-names = "tx", "rx", "tx", "rx";
546			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
547			resets = <&cpg 323>;
548			status = "disabled";
549		};
550
551		hsusb: usb@e6590000 {
552			compatible = "renesas,usbhs-r8a7791",
553				     "renesas,rcar-gen2-usbhs";
554			reg = <0 0xe6590000 0 0x100>;
555			interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
556			clocks = <&cpg CPG_MOD 704>;
557			dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
558			       <&usb_dmac1 0>, <&usb_dmac1 1>;
559			dma-names = "ch0", "ch1", "ch2", "ch3";
560			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
561			resets = <&cpg 704>;
562			renesas,buswait = <4>;
563			phys = <&usb0 1>;
564			phy-names = "usb";
565			status = "disabled";
566		};
567
568		usbphy: usb-phy@e6590100 {
569			compatible = "renesas,usb-phy-r8a7791",
570				     "renesas,rcar-gen2-usb-phy";
571			reg = <0 0xe6590100 0 0x100>;
572			#address-cells = <1>;
573			#size-cells = <0>;
574			clocks = <&cpg CPG_MOD 704>;
575			clock-names = "usbhs";
576			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
577			resets = <&cpg 704>;
578			status = "disabled";
579
580			usb0: usb-channel@0 {
581				reg = <0>;
582				#phy-cells = <1>;
583			};
584			usb2: usb-channel@2 {
585				reg = <2>;
586				#phy-cells = <1>;
587			};
588		};
589
590		usb_dmac0: dma-controller@e65a0000 {
591			compatible = "renesas,r8a7791-usb-dmac",
592				     "renesas,usb-dmac";
593			reg = <0 0xe65a0000 0 0x100>;
594			interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
595				      GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
596			interrupt-names = "ch0", "ch1";
597			clocks = <&cpg CPG_MOD 330>;
598			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
599			resets = <&cpg 330>;
600			#dma-cells = <1>;
601			dma-channels = <2>;
602		};
603
604		usb_dmac1: dma-controller@e65b0000 {
605			compatible = "renesas,r8a7791-usb-dmac",
606				     "renesas,usb-dmac";
607			reg = <0 0xe65b0000 0 0x100>;
608			interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
609				      GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
610			interrupt-names = "ch0", "ch1";
611			clocks = <&cpg CPG_MOD 331>;
612			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
613			resets = <&cpg 331>;
614			#dma-cells = <1>;
615			dma-channels = <2>;
616		};
617
618		dmac0: dma-controller@e6700000 {
619			compatible = "renesas,dmac-r8a7791",
620				     "renesas,rcar-dmac";
621			reg = <0 0xe6700000 0 0x20000>;
622			interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
623				      GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
624				      GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
625				      GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
626				      GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
627				      GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
628				      GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
629				      GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
630				      GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
631				      GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
632				      GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
633				      GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
634				      GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
635				      GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
636				      GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
637				      GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
638			interrupt-names = "error",
639					  "ch0", "ch1", "ch2", "ch3",
640					  "ch4", "ch5", "ch6", "ch7",
641					  "ch8", "ch9", "ch10", "ch11",
642					  "ch12", "ch13", "ch14";
643			clocks = <&cpg CPG_MOD 219>;
644			clock-names = "fck";
645			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
646			resets = <&cpg 219>;
647			#dma-cells = <1>;
648			dma-channels = <15>;
649		};
650
651		dmac1: dma-controller@e6720000 {
652			compatible = "renesas,dmac-r8a7791",
653				     "renesas,rcar-dmac";
654			reg = <0 0xe6720000 0 0x20000>;
655			interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
656				      GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
657				      GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
658				      GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
659				      GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
660				      GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
661				      GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
662				      GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
663				      GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
664				      GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
665				      GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
666				      GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
667				      GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
668				      GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
669				      GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
670				      GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
671			interrupt-names = "error",
672					  "ch0", "ch1", "ch2", "ch3",
673					  "ch4", "ch5", "ch6", "ch7",
674					  "ch8", "ch9", "ch10", "ch11",
675					  "ch12", "ch13", "ch14";
676			clocks = <&cpg CPG_MOD 218>;
677			clock-names = "fck";
678			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
679			resets = <&cpg 218>;
680			#dma-cells = <1>;
681			dma-channels = <15>;
682		};
683
684		avb: ethernet@e6800000 {
685			compatible = "renesas,etheravb-r8a7791",
686				     "renesas,etheravb-rcar-gen2";
687			reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
688			interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
689			clocks = <&cpg CPG_MOD 812>;
690			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
691			resets = <&cpg 812>;
692			#address-cells = <1>;
693			#size-cells = <0>;
694			status = "disabled";
695		};
696
697		qspi: spi@e6b10000 {
698			compatible = "renesas,qspi-r8a7791", "renesas,qspi";
699			reg = <0 0xe6b10000 0 0x2c>;
700			interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
701			clocks = <&cpg CPG_MOD 917>;
702			dmas = <&dmac0 0x17>, <&dmac0 0x18>,
703			       <&dmac1 0x17>, <&dmac1 0x18>;
704			dma-names = "tx", "rx", "tx", "rx";
705			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
706			resets = <&cpg 917>;
707			num-cs = <1>;
708			#address-cells = <1>;
709			#size-cells = <0>;
710			status = "disabled";
711		};
712
713		scifa0: serial@e6c40000 {
714			compatible = "renesas,scifa-r8a7791",
715				     "renesas,rcar-gen2-scifa", "renesas,scifa";
716			reg = <0 0xe6c40000 0 64>;
717			interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
718			clocks = <&cpg CPG_MOD 204>;
719			clock-names = "fck";
720			dmas = <&dmac0 0x21>, <&dmac0 0x22>,
721			       <&dmac1 0x21>, <&dmac1 0x22>;
722			dma-names = "tx", "rx", "tx", "rx";
723			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
724			resets = <&cpg 204>;
725			status = "disabled";
726		};
727
728		scifa1: serial@e6c50000 {
729			compatible = "renesas,scifa-r8a7791",
730				     "renesas,rcar-gen2-scifa", "renesas,scifa";
731			reg = <0 0xe6c50000 0 64>;
732			interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
733			clocks = <&cpg CPG_MOD 203>;
734			clock-names = "fck";
735			dmas = <&dmac0 0x25>, <&dmac0 0x26>,
736			       <&dmac1 0x25>, <&dmac1 0x26>;
737			dma-names = "tx", "rx", "tx", "rx";
738			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
739			resets = <&cpg 203>;
740			status = "disabled";
741		};
742
743		scifa2: serial@e6c60000 {
744			compatible = "renesas,scifa-r8a7791",
745				     "renesas,rcar-gen2-scifa", "renesas,scifa";
746			reg = <0 0xe6c60000 0 64>;
747			interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
748			clocks = <&cpg CPG_MOD 202>;
749			clock-names = "fck";
750			dmas = <&dmac0 0x27>, <&dmac0 0x28>,
751			       <&dmac1 0x27>, <&dmac1 0x28>;
752			dma-names = "tx", "rx", "tx", "rx";
753			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
754			resets = <&cpg 202>;
755			status = "disabled";
756		};
757
758		scifa3: serial@e6c70000 {
759			compatible = "renesas,scifa-r8a7791",
760				     "renesas,rcar-gen2-scifa", "renesas,scifa";
761			reg = <0 0xe6c70000 0 64>;
762			interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
763			clocks = <&cpg CPG_MOD 1106>;
764			clock-names = "fck";
765			dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
766			       <&dmac1 0x1b>, <&dmac1 0x1c>;
767			dma-names = "tx", "rx", "tx", "rx";
768			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
769			resets = <&cpg 1106>;
770			status = "disabled";
771		};
772
773		scifa4: serial@e6c78000 {
774			compatible = "renesas,scifa-r8a7791",
775				     "renesas,rcar-gen2-scifa", "renesas,scifa";
776			reg = <0 0xe6c78000 0 64>;
777			interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
778			clocks = <&cpg CPG_MOD 1107>;
779			clock-names = "fck";
780			dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
781			       <&dmac1 0x1f>, <&dmac1 0x20>;
782			dma-names = "tx", "rx", "tx", "rx";
783			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
784			resets = <&cpg 1107>;
785			status = "disabled";
786		};
787
788		scifa5: serial@e6c80000 {
789			compatible = "renesas,scifa-r8a7791",
790				     "renesas,rcar-gen2-scifa", "renesas,scifa";
791			reg = <0 0xe6c80000 0 64>;
792			interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
793			clocks = <&cpg CPG_MOD 1108>;
794			clock-names = "fck";
795			dmas = <&dmac0 0x23>, <&dmac0 0x24>,
796			       <&dmac1 0x23>, <&dmac1 0x24>;
797			dma-names = "tx", "rx", "tx", "rx";
798			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
799			resets = <&cpg 1108>;
800			status = "disabled";
801		};
802
803		scifb0: serial@e6c20000 {
804			compatible = "renesas,scifb-r8a7791",
805				     "renesas,rcar-gen2-scifb", "renesas,scifb";
806			reg = <0 0xe6c20000 0 0x100>;
807			interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
808			clocks = <&cpg CPG_MOD 206>;
809			clock-names = "fck";
810			dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
811			       <&dmac1 0x3d>, <&dmac1 0x3e>;
812			dma-names = "tx", "rx", "tx", "rx";
813			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
814			resets = <&cpg 206>;
815			status = "disabled";
816		};
817
818		scifb1: serial@e6c30000 {
819			compatible = "renesas,scifb-r8a7791",
820				     "renesas,rcar-gen2-scifb", "renesas,scifb";
821			reg = <0 0xe6c30000 0 0x100>;
822			interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
823			clocks = <&cpg CPG_MOD 207>;
824			clock-names = "fck";
825			dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
826			       <&dmac1 0x19>, <&dmac1 0x1a>;
827			dma-names = "tx", "rx", "tx", "rx";
828			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
829			resets = <&cpg 207>;
830			status = "disabled";
831		};
832
833		scifb2: serial@e6ce0000 {
834			compatible = "renesas,scifb-r8a7791",
835				     "renesas,rcar-gen2-scifb", "renesas,scifb";
836			reg = <0 0xe6ce0000 0 0x100>;
837			interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
838			clocks = <&cpg CPG_MOD 216>;
839			clock-names = "fck";
840			dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
841			       <&dmac1 0x1d>, <&dmac1 0x1e>;
842			dma-names = "tx", "rx", "tx", "rx";
843			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
844			resets = <&cpg 216>;
845			status = "disabled";
846		};
847
848		scif0: serial@e6e60000 {
849			compatible = "renesas,scif-r8a7791",
850				     "renesas,rcar-gen2-scif", "renesas,scif";
851			reg = <0 0xe6e60000 0 64>;
852			interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
853			clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
854				 <&scif_clk>;
855			clock-names = "fck", "brg_int", "scif_clk";
856			dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
857			       <&dmac1 0x29>, <&dmac1 0x2a>;
858			dma-names = "tx", "rx", "tx", "rx";
859			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
860			resets = <&cpg 721>;
861			status = "disabled";
862		};
863
864		scif1: serial@e6e68000 {
865			compatible = "renesas,scif-r8a7791",
866				     "renesas,rcar-gen2-scif", "renesas,scif";
867			reg = <0 0xe6e68000 0 64>;
868			interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
869			clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
870				 <&scif_clk>;
871			clock-names = "fck", "brg_int", "scif_clk";
872			dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
873			       <&dmac1 0x2d>, <&dmac1 0x2e>;
874			dma-names = "tx", "rx", "tx", "rx";
875			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
876			resets = <&cpg 720>;
877			status = "disabled";
878		};
879
880		scif2: serial@e6e58000 {
881			compatible = "renesas,scif-r8a7791",
882				     "renesas,rcar-gen2-scif", "renesas,scif";
883			reg = <0 0xe6e58000 0 64>;
884			interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
885			clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
886				 <&scif_clk>;
887			clock-names = "fck", "brg_int", "scif_clk";
888			dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
889			       <&dmac1 0x2b>, <&dmac1 0x2c>;
890			dma-names = "tx", "rx", "tx", "rx";
891			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
892			resets = <&cpg 719>;
893			status = "disabled";
894		};
895
896		scif3: serial@e6ea8000 {
897			compatible = "renesas,scif-r8a7791",
898				     "renesas,rcar-gen2-scif", "renesas,scif";
899			reg = <0 0xe6ea8000 0 64>;
900			interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
901			clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
902				 <&scif_clk>;
903			clock-names = "fck", "brg_int", "scif_clk";
904			dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
905			       <&dmac1 0x2f>, <&dmac1 0x30>;
906			dma-names = "tx", "rx", "tx", "rx";
907			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
908			resets = <&cpg 718>;
909			status = "disabled";
910		};
911
912		scif4: serial@e6ee0000 {
913			compatible = "renesas,scif-r8a7791",
914				     "renesas,rcar-gen2-scif", "renesas,scif";
915			reg = <0 0xe6ee0000 0 64>;
916			interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
917			clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
918				 <&scif_clk>;
919			clock-names = "fck", "brg_int", "scif_clk";
920			dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
921			       <&dmac1 0xfb>, <&dmac1 0xfc>;
922			dma-names = "tx", "rx", "tx", "rx";
923			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
924			resets = <&cpg 715>;
925			status = "disabled";
926		};
927
928		scif5: serial@e6ee8000 {
929			compatible = "renesas,scif-r8a7791",
930				     "renesas,rcar-gen2-scif", "renesas,scif";
931			reg = <0 0xe6ee8000 0 64>;
932			interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
933			clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
934				 <&scif_clk>;
935			clock-names = "fck", "brg_int", "scif_clk";
936			dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
937			       <&dmac1 0xfd>, <&dmac1 0xfe>;
938			dma-names = "tx", "rx", "tx", "rx";
939			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
940			resets = <&cpg 714>;
941			status = "disabled";
942		};
943
944		hscif0: serial@e62c0000 {
945			compatible = "renesas,hscif-r8a7791",
946				     "renesas,rcar-gen2-hscif", "renesas,hscif";
947			reg = <0 0xe62c0000 0 96>;
948			interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
949			clocks = <&cpg CPG_MOD 717>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
950				 <&scif_clk>;
951			clock-names = "fck", "brg_int", "scif_clk";
952			dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
953			       <&dmac1 0x39>, <&dmac1 0x3a>;
954			dma-names = "tx", "rx", "tx", "rx";
955			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
956			resets = <&cpg 717>;
957			status = "disabled";
958		};
959
960		hscif1: serial@e62c8000 {
961			compatible = "renesas,hscif-r8a7791",
962				     "renesas,rcar-gen2-hscif", "renesas,hscif";
963			reg = <0 0xe62c8000 0 96>;
964			interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
965			clocks = <&cpg CPG_MOD 716>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
966				 <&scif_clk>;
967			clock-names = "fck", "brg_int", "scif_clk";
968			dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
969			       <&dmac1 0x4d>, <&dmac1 0x4e>;
970			dma-names = "tx", "rx", "tx", "rx";
971			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
972			resets = <&cpg 716>;
973			status = "disabled";
974		};
975
976		hscif2: serial@e62d0000 {
977			compatible = "renesas,hscif-r8a7791",
978				     "renesas,rcar-gen2-hscif", "renesas,hscif";
979			reg = <0 0xe62d0000 0 96>;
980			interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
981			clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
982				 <&scif_clk>;
983			clock-names = "fck", "brg_int", "scif_clk";
984			dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
985			       <&dmac1 0x3b>, <&dmac1 0x3c>;
986			dma-names = "tx", "rx", "tx", "rx";
987			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
988			resets = <&cpg 713>;
989			status = "disabled";
990		};
991
992		msiof0: spi@e6e20000 {
993			compatible = "renesas,msiof-r8a7791",
994				     "renesas,rcar-gen2-msiof";
995			reg = <0 0xe6e20000 0 0x0064>;
996			interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
997			clocks = <&cpg CPG_MOD 000>;
998			dmas = <&dmac0 0x51>, <&dmac0 0x52>,
999			       <&dmac1 0x51>, <&dmac1 0x52>;
1000			dma-names = "tx", "rx", "tx", "rx";
1001			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1002			resets = <&cpg 0>;
1003			#address-cells = <1>;
1004			#size-cells = <0>;
1005			status = "disabled";
1006		};
1007
1008		msiof1: spi@e6e10000 {
1009			compatible = "renesas,msiof-r8a7791",
1010				     "renesas,rcar-gen2-msiof";
1011			reg = <0 0xe6e10000 0 0x0064>;
1012			interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1013			clocks = <&cpg CPG_MOD 208>;
1014			dmas = <&dmac0 0x55>, <&dmac0 0x56>,
1015			       <&dmac1 0x55>, <&dmac1 0x56>;
1016			dma-names = "tx", "rx", "tx", "rx";
1017			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1018			resets = <&cpg 208>;
1019			#address-cells = <1>;
1020			#size-cells = <0>;
1021			status = "disabled";
1022		};
1023
1024		msiof2: spi@e6e00000 {
1025			compatible = "renesas,msiof-r8a7791",
1026				     "renesas,rcar-gen2-msiof";
1027			reg = <0 0xe6e00000 0 0x0064>;
1028			interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1029			clocks = <&cpg CPG_MOD 205>;
1030			dmas = <&dmac0 0x41>, <&dmac0 0x42>,
1031			       <&dmac1 0x41>, <&dmac1 0x42>;
1032			dma-names = "tx", "rx", "tx", "rx";
1033			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1034			resets = <&cpg 205>;
1035			#address-cells = <1>;
1036			#size-cells = <0>;
1037			status = "disabled";
1038		};
1039
1040		adc: adc@e6e54000 {
1041			compatible = "renesas,r8a7791-gyroadc",
1042				     "renesas,rcar-gyroadc";
1043			reg = <0 0xe6e54000 0 64>;
1044			clocks = <&cpg CPG_MOD 901>;
1045			clock-names = "fck";
1046			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1047			resets = <&cpg 901>;
1048			status = "disabled";
1049		};
1050
1051		can0: can@e6e80000 {
1052			compatible = "renesas,can-r8a7791",
1053				     "renesas,rcar-gen2-can";
1054			reg = <0 0xe6e80000 0 0x1000>;
1055			interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1056			clocks = <&cpg CPG_MOD 916>,
1057				 <&cpg CPG_CORE R8A7791_CLK_RCAN>, <&can_clk>;
1058			clock-names = "clkp1", "clkp2", "can_clk";
1059			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1060			resets = <&cpg 916>;
1061			status = "disabled";
1062		};
1063
1064		can1: can@e6e88000 {
1065			compatible = "renesas,can-r8a7791",
1066				     "renesas,rcar-gen2-can";
1067			reg = <0 0xe6e88000 0 0x1000>;
1068			interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1069			clocks = <&cpg CPG_MOD 915>,
1070				 <&cpg CPG_CORE R8A7791_CLK_RCAN>, <&can_clk>;
1071			clock-names = "clkp1", "clkp2", "can_clk";
1072			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1073			resets = <&cpg 915>;
1074			status = "disabled";
1075		};
1076
1077		vin0: video@e6ef0000 {
1078			compatible = "renesas,vin-r8a7791",
1079				     "renesas,rcar-gen2-vin";
1080			reg = <0 0xe6ef0000 0 0x1000>;
1081			interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1082			clocks = <&cpg CPG_MOD 811>;
1083			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1084			resets = <&cpg 811>;
1085			status = "disabled";
1086		};
1087
1088		vin1: video@e6ef1000 {
1089			compatible = "renesas,vin-r8a7791",
1090				     "renesas,rcar-gen2-vin";
1091			reg = <0 0xe6ef1000 0 0x1000>;
1092			interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1093			clocks = <&cpg CPG_MOD 810>;
1094			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1095			resets = <&cpg 810>;
1096			status = "disabled";
1097		};
1098
1099		vin2: video@e6ef2000 {
1100			compatible = "renesas,vin-r8a7791",
1101				     "renesas,rcar-gen2-vin";
1102			reg = <0 0xe6ef2000 0 0x1000>;
1103			interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1104			clocks = <&cpg CPG_MOD 809>;
1105			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1106			resets = <&cpg 809>;
1107			status = "disabled";
1108		};
1109
1110		rcar_sound: sound@ec500000 {
1111			/*
1112			 * #sound-dai-cells is required
1113			 *
1114			 * Single DAI : #sound-dai-cells = <0>;         <&rcar_sound>;
1115			 * Multi  DAI : #sound-dai-cells = <1>;         <&rcar_sound N>;
1116			 */
1117			compatible = "renesas,rcar_sound-r8a7791",
1118				     "renesas,rcar_sound-gen2";
1119			reg = <0 0xec500000 0 0x1000>, /* SCU */
1120			      <0 0xec5a0000 0 0x100>,  /* ADG */
1121			      <0 0xec540000 0 0x1000>, /* SSIU */
1122			      <0 0xec541000 0 0x280>,  /* SSI */
1123			      <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri*/
1124			reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1125
1126			clocks = <&cpg CPG_MOD 1005>,
1127				 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1128				 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1129				 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1130				 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1131				 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1132				 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1133				 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1134				 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1135				 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1136				 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1137				 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1138				 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1139				 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1140				 <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
1141				 <&cpg CPG_CORE R8A7791_CLK_M2>;
1142			clock-names = "ssi-all",
1143				      "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1144				      "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1145				      "ssi.1", "ssi.0", "src.9", "src.8",
1146				      "src.7", "src.6", "src.5", "src.4",
1147				      "src.3", "src.2", "src.1", "src.0",
1148				      "ctu.0", "ctu.1",
1149				      "mix.0", "mix.1",
1150				      "dvc.0", "dvc.1",
1151				      "clk_a", "clk_b", "clk_c", "clk_i";
1152			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1153			resets = <&cpg 1005>,
1154				 <&cpg 1006>, <&cpg 1007>,
1155				 <&cpg 1008>, <&cpg 1009>,
1156				 <&cpg 1010>, <&cpg 1011>,
1157				 <&cpg 1012>, <&cpg 1013>,
1158				 <&cpg 1014>, <&cpg 1015>;
1159			reset-names = "ssi-all",
1160				      "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1161				      "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1162				      "ssi.1", "ssi.0";
1163
1164			status = "disabled";
1165
1166			rcar_sound,dvc {
1167				dvc0: dvc-0 {
1168					dmas = <&audma1 0xbc>;
1169					dma-names = "tx";
1170				};
1171				dvc1: dvc-1 {
1172					dmas = <&audma1 0xbe>;
1173					dma-names = "tx";
1174				};
1175			};
1176
1177			rcar_sound,mix {
1178				mix0: mix-0 { };
1179				mix1: mix-1 { };
1180			};
1181
1182			rcar_sound,ctu {
1183				ctu00: ctu-0 { };
1184				ctu01: ctu-1 { };
1185				ctu02: ctu-2 { };
1186				ctu03: ctu-3 { };
1187				ctu10: ctu-4 { };
1188				ctu11: ctu-5 { };
1189				ctu12: ctu-6 { };
1190				ctu13: ctu-7 { };
1191			};
1192
1193			rcar_sound,src {
1194				src0: src-0 {
1195					interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1196					dmas = <&audma0 0x85>, <&audma1 0x9a>;
1197					dma-names = "rx", "tx";
1198				};
1199				src1: src-1 {
1200					interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1201					dmas = <&audma0 0x87>, <&audma1 0x9c>;
1202					dma-names = "rx", "tx";
1203				};
1204				src2: src-2 {
1205					interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1206					dmas = <&audma0 0x89>, <&audma1 0x9e>;
1207					dma-names = "rx", "tx";
1208				};
1209				src3: src-3 {
1210					interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1211					dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1212					dma-names = "rx", "tx";
1213				};
1214				src4: src-4 {
1215					interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1216					dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1217					dma-names = "rx", "tx";
1218				};
1219				src5: src-5 {
1220					interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1221					dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1222					dma-names = "rx", "tx";
1223				};
1224				src6: src-6 {
1225					interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1226					dmas = <&audma0 0x91>, <&audma1 0xb4>;
1227					dma-names = "rx", "tx";
1228				};
1229				src7: src-7 {
1230					interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1231					dmas = <&audma0 0x93>, <&audma1 0xb6>;
1232					dma-names = "rx", "tx";
1233				};
1234				src8: src-8 {
1235					interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1236					dmas = <&audma0 0x95>, <&audma1 0xb8>;
1237					dma-names = "rx", "tx";
1238				};
1239				src9: src-9 {
1240					interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1241					dmas = <&audma0 0x97>, <&audma1 0xba>;
1242					dma-names = "rx", "tx";
1243				};
1244			};
1245
1246			rcar_sound,ssi {
1247				ssi0: ssi-0 {
1248					interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1249					dmas = <&audma0 0x01>, <&audma1 0x02>,
1250					       <&audma0 0x15>, <&audma1 0x16>;
1251					dma-names = "rx", "tx", "rxu", "txu";
1252				};
1253				ssi1: ssi-1 {
1254					 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1255					dmas = <&audma0 0x03>, <&audma1 0x04>,
1256					       <&audma0 0x49>, <&audma1 0x4a>;
1257					dma-names = "rx", "tx", "rxu", "txu";
1258				};
1259				ssi2: ssi-2 {
1260					interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1261					dmas = <&audma0 0x05>, <&audma1 0x06>,
1262					       <&audma0 0x63>, <&audma1 0x64>;
1263					dma-names = "rx", "tx", "rxu", "txu";
1264				};
1265				ssi3: ssi-3 {
1266					interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1267					dmas = <&audma0 0x07>, <&audma1 0x08>,
1268					       <&audma0 0x6f>, <&audma1 0x70>;
1269					dma-names = "rx", "tx", "rxu", "txu";
1270				};
1271				ssi4: ssi-4 {
1272					interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1273					dmas = <&audma0 0x09>, <&audma1 0x0a>,
1274					       <&audma0 0x71>, <&audma1 0x72>;
1275					dma-names = "rx", "tx", "rxu", "txu";
1276				};
1277				ssi5: ssi-5 {
1278					interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1279					dmas = <&audma0 0x0b>, <&audma1 0x0c>,
1280					       <&audma0 0x73>, <&audma1 0x74>;
1281					dma-names = "rx", "tx", "rxu", "txu";
1282				};
1283				ssi6: ssi-6 {
1284					interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1285					dmas = <&audma0 0x0d>, <&audma1 0x0e>,
1286					       <&audma0 0x75>, <&audma1 0x76>;
1287					dma-names = "rx", "tx", "rxu", "txu";
1288				};
1289				ssi7: ssi-7 {
1290					interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1291					dmas = <&audma0 0x0f>, <&audma1 0x10>,
1292					       <&audma0 0x79>, <&audma1 0x7a>;
1293					dma-names = "rx", "tx", "rxu", "txu";
1294				};
1295				ssi8: ssi-8 {
1296					interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1297					dmas = <&audma0 0x11>, <&audma1 0x12>,
1298					       <&audma0 0x7b>, <&audma1 0x7c>;
1299					dma-names = "rx", "tx", "rxu", "txu";
1300				};
1301				ssi9: ssi-9 {
1302					interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1303					dmas = <&audma0 0x13>, <&audma1 0x14>,
1304					       <&audma0 0x7d>, <&audma1 0x7e>;
1305					dma-names = "rx", "tx", "rxu", "txu";
1306				};
1307			};
1308		};
1309
1310		audma0: dma-controller@ec700000 {
1311			compatible = "renesas,dmac-r8a7791",
1312				     "renesas,rcar-dmac";
1313			reg = <0 0xec700000 0 0x10000>;
1314			interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
1315				      GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
1316				      GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
1317				      GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
1318				      GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
1319				      GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
1320				      GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
1321				      GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
1322				      GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
1323				      GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
1324				      GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
1325				      GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
1326				      GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
1327				      GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
1328			interrupt-names = "error",
1329					  "ch0", "ch1", "ch2", "ch3",
1330					  "ch4", "ch5", "ch6", "ch7",
1331					  "ch8", "ch9", "ch10", "ch11",
1332					  "ch12";
1333			clocks = <&cpg CPG_MOD 502>;
1334			clock-names = "fck";
1335			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1336			resets = <&cpg 502>;
1337			#dma-cells = <1>;
1338			dma-channels = <13>;
1339		};
1340
1341		audma1: dma-controller@ec720000 {
1342			compatible = "renesas,dmac-r8a7791",
1343				     "renesas,rcar-dmac";
1344			reg = <0 0xec720000 0 0x10000>;
1345			interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
1346				      GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
1347				      GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
1348				      GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
1349				      GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
1350				      GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
1351				      GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
1352				      GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
1353				      GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
1354				      GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
1355				      GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
1356				      GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
1357				      GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
1358				      GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
1359			interrupt-names = "error",
1360					  "ch0", "ch1", "ch2", "ch3",
1361					  "ch4", "ch5", "ch6", "ch7",
1362					  "ch8", "ch9", "ch10", "ch11",
1363					  "ch12";
1364			clocks = <&cpg CPG_MOD 501>;
1365			clock-names = "fck";
1366			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1367			resets = <&cpg 501>;
1368			#dma-cells = <1>;
1369			dma-channels = <13>;
1370		};
1371
1372		xhci: usb@ee000000 {
1373			compatible = "renesas,xhci-r8a7791",
1374				     "renesas,rcar-gen2-xhci";
1375			reg = <0 0xee000000 0 0xc00>;
1376			interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
1377			clocks = <&cpg CPG_MOD 328>;
1378			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1379			resets = <&cpg 328>;
1380			phys = <&usb2 1>;
1381			phy-names = "usb";
1382			status = "disabled";
1383		};
1384
1385		pci0: pci@ee090000 {
1386			compatible = "renesas,pci-r8a7791",
1387				     "renesas,pci-rcar-gen2";
1388			device_type = "pci";
1389			reg = <0 0xee090000 0 0xc00>,
1390			      <0 0xee080000 0 0x1100>;
1391			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1392			clocks = <&cpg CPG_MOD 703>;
1393			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1394			resets = <&cpg 703>;
1395			status = "disabled";
1396
1397			bus-range = <0 0>;
1398			#address-cells = <3>;
1399			#size-cells = <2>;
1400			#interrupt-cells = <1>;
1401			ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
1402			interrupt-map-mask = <0xff00 0 0 0x7>;
1403			interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
1404					 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
1405					 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1406
1407			usb@1,0 {
1408				reg = <0x800 0 0 0 0>;
1409				phys = <&usb0 0>;
1410				phy-names = "usb";
1411			};
1412
1413			usb@2,0 {
1414				reg = <0x1000 0 0 0 0>;
1415				phys = <&usb0 0>;
1416				phy-names = "usb";
1417			};
1418		};
1419
1420		pci1: pci@ee0d0000 {
1421			compatible = "renesas,pci-r8a7791",
1422				     "renesas,pci-rcar-gen2";
1423			device_type = "pci";
1424			reg = <0 0xee0d0000 0 0xc00>,
1425			      <0 0xee0c0000 0 0x1100>;
1426			interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1427			clocks = <&cpg CPG_MOD 703>;
1428			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1429			resets = <&cpg 703>;
1430			status = "disabled";
1431
1432			bus-range = <1 1>;
1433			#address-cells = <3>;
1434			#size-cells = <2>;
1435			#interrupt-cells = <1>;
1436			ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
1437			interrupt-map-mask = <0xff00 0 0 0x7>;
1438			interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
1439					 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
1440					 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1441
1442			usb@1,0 {
1443				reg = <0x10800 0 0 0 0>;
1444				phys = <&usb2 0>;
1445				phy-names = "usb";
1446			};
1447
1448			usb@2,0 {
1449				reg = <0x11000 0 0 0 0>;
1450				phys = <&usb2 0>;
1451				phy-names = "usb";
1452			};
1453		};
1454
1455		sdhi0: sd@ee100000 {
1456			compatible = "renesas,sdhi-r8a7791",
1457				     "renesas,rcar-gen2-sdhi";
1458			reg = <0 0xee100000 0 0x328>;
1459			interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1460			clocks = <&cpg CPG_MOD 314>;
1461			dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
1462			       <&dmac1 0xcd>, <&dmac1 0xce>;
1463			dma-names = "tx", "rx", "tx", "rx";
1464			max-frequency = <195000000>;
1465			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1466			resets = <&cpg 314>;
1467			status = "disabled";
1468		};
1469
1470		sdhi1: sd@ee140000 {
1471			compatible = "renesas,sdhi-r8a7791",
1472				     "renesas,rcar-gen2-sdhi";
1473			reg = <0 0xee140000 0 0x100>;
1474			interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1475			clocks = <&cpg CPG_MOD 312>;
1476			dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
1477			       <&dmac1 0xc1>, <&dmac1 0xc2>;
1478			dma-names = "tx", "rx", "tx", "rx";
1479			max-frequency = <97500000>;
1480			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1481			resets = <&cpg 312>;
1482			status = "disabled";
1483		};
1484
1485		sdhi2: sd@ee160000 {
1486			compatible = "renesas,sdhi-r8a7791",
1487				     "renesas,rcar-gen2-sdhi";
1488			reg = <0 0xee160000 0 0x100>;
1489			interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1490			clocks = <&cpg CPG_MOD 311>;
1491			dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
1492			       <&dmac1 0xd3>, <&dmac1 0xd4>;
1493			dma-names = "tx", "rx", "tx", "rx";
1494			max-frequency = <97500000>;
1495			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1496			resets = <&cpg 311>;
1497			status = "disabled";
1498		};
1499
1500		mmcif0: mmc@ee200000 {
1501			compatible = "renesas,mmcif-r8a7791",
1502				     "renesas,sh-mmcif";
1503			reg = <0 0xee200000 0 0x80>;
1504			interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
1505			clocks = <&cpg CPG_MOD 315>;
1506			dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
1507			       <&dmac1 0xd1>, <&dmac1 0xd2>;
1508			dma-names = "tx", "rx", "tx", "rx";
1509			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1510			resets = <&cpg 315>;
1511			reg-io-width = <4>;
1512			status = "disabled";
1513			max-frequency = <97500000>;
1514		};
1515
1516		sata0: sata@ee300000 {
1517			compatible = "renesas,sata-r8a7791",
1518				     "renesas,rcar-gen2-sata";
1519			reg = <0 0xee300000 0 0x2000>;
1520			interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
1521			clocks = <&cpg CPG_MOD 815>;
1522			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1523			resets = <&cpg 815>;
1524			status = "disabled";
1525		};
1526
1527		sata1: sata@ee500000 {
1528			compatible = "renesas,sata-r8a7791",
1529				     "renesas,rcar-gen2-sata";
1530			reg = <0 0xee500000 0 0x2000>;
1531			interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
1532			clocks = <&cpg CPG_MOD 814>;
1533			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1534			resets = <&cpg 814>;
1535			status = "disabled";
1536		};
1537
1538		ether: ethernet@ee700000 {
1539			compatible = "renesas,ether-r8a7791",
1540				     "renesas,rcar-gen2-ether";
1541			reg = <0 0xee700000 0 0x400>;
1542			interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
1543			clocks = <&cpg CPG_MOD 813>;
1544			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1545			resets = <&cpg 813>;
1546			phy-mode = "rmii";
1547			#address-cells = <1>;
1548			#size-cells = <0>;
1549			status = "disabled";
1550		};
1551
1552		gic: interrupt-controller@f1001000 {
1553			compatible = "arm,gic-400";
1554			#interrupt-cells = <3>;
1555			#address-cells = <0>;
1556			interrupt-controller;
1557			reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>,
1558			      <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>;
1559			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
1560			clocks = <&cpg CPG_MOD 408>;
1561			clock-names = "clk";
1562			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1563			resets = <&cpg 408>;
1564		};
1565
1566		pciec: pcie@fe000000 {
1567			compatible = "renesas,pcie-r8a7791",
1568				     "renesas,pcie-rcar-gen2";
1569			reg = <0 0xfe000000 0 0x80000>;
1570			#address-cells = <3>;
1571			#size-cells = <2>;
1572			bus-range = <0x00 0xff>;
1573			device_type = "pci";
1574			ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
1575				  0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
1576				  0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
1577				  0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1578			/* Map all possible DDR as inbound ranges */
1579			dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000
1580				      0x43000000 2 0x00000000 2 0x00000000 1 0x00000000>;
1581			interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1582				     <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1583				     <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1584			#interrupt-cells = <1>;
1585			interrupt-map-mask = <0 0 0 0>;
1586			interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1587			clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1588			clock-names = "pcie", "pcie_bus";
1589			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1590			resets = <&cpg 319>;
1591			status = "disabled";
1592		};
1593
1594		vsp@fe928000 {
1595			compatible = "renesas,vsp1";
1596			reg = <0 0xfe928000 0 0x8000>;
1597			interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
1598			clocks = <&cpg CPG_MOD 131>;
1599			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1600			resets = <&cpg 131>;
1601		};
1602
1603		vsp@fe930000 {
1604			compatible = "renesas,vsp1";
1605			reg = <0 0xfe930000 0 0x8000>;
1606			interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1607			clocks = <&cpg CPG_MOD 128>;
1608			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1609			resets = <&cpg 128>;
1610		};
1611
1612		vsp@fe938000 {
1613			compatible = "renesas,vsp1";
1614			reg = <0 0xfe938000 0 0x8000>;
1615			interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
1616			clocks = <&cpg CPG_MOD 127>;
1617			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1618			resets = <&cpg 127>;
1619		};
1620
1621		jpu: jpeg-codec@fe980000 {
1622			compatible = "renesas,jpu-r8a7791",
1623				     "renesas,rcar-gen2-jpu";
1624			reg = <0 0xfe980000 0 0x10300>;
1625			interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
1626			clocks = <&cpg CPG_MOD 106>;
1627			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1628			resets = <&cpg 106>;
1629		};
1630
1631		du: display@feb00000 {
1632			compatible = "renesas,du-r8a7791";
1633			reg = <0 0xfeb00000 0 0x40000>;
1634			interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1635				     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
1636			clocks = <&cpg CPG_MOD 724>,
1637				 <&cpg CPG_MOD 723>;
1638			clock-names = "du.0", "du.1";
1639			status = "disabled";
1640
1641			ports {
1642				#address-cells = <1>;
1643				#size-cells = <0>;
1644
1645				port@0 {
1646					reg = <0>;
1647					du_out_rgb: endpoint {
1648					};
1649				};
1650				port@1 {
1651					reg = <1>;
1652					du_out_lvds0: endpoint {
1653						remote-endpoint = <&lvds0_in>;
1654					};
1655				};
1656			};
1657		};
1658
1659		lvds0: lvds@feb90000 {
1660			compatible = "renesas,r8a7791-lvds";
1661			reg = <0 0xfeb90000 0 0x1c>;
1662			clocks = <&cpg CPG_MOD 726>;
1663			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1664			resets = <&cpg 726>;
1665			status = "disabled";
1666
1667			ports {
1668				#address-cells = <1>;
1669				#size-cells = <0>;
1670
1671				port@0 {
1672					reg = <0>;
1673					lvds0_in: endpoint {
1674						remote-endpoint = <&du_out_lvds0>;
1675					};
1676				};
1677				port@1 {
1678					reg = <1>;
1679					lvds0_out: endpoint {
1680					};
1681				};
1682			};
1683		};
1684
1685		prr: chipid@ff000044 {
1686			compatible = "renesas,prr";
1687			reg = <0 0xff000044 0 4>;
1688		};
1689
1690		cmt0: timer@ffca0000 {
1691			compatible = "renesas,r8a7791-cmt0",
1692				     "renesas,rcar-gen2-cmt0";
1693			reg = <0 0xffca0000 0 0x1004>;
1694			interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
1695				     <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
1696			clocks = <&cpg CPG_MOD 124>;
1697			clock-names = "fck";
1698			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1699			resets = <&cpg 124>;
1700
1701			status = "disabled";
1702		};
1703
1704		cmt1: timer@e6130000 {
1705			compatible = "renesas,r8a7791-cmt1",
1706				     "renesas,rcar-gen2-cmt1";
1707			reg = <0 0xe6130000 0 0x1004>;
1708			interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
1709				     <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
1710				     <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
1711				     <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
1712				     <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
1713				     <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
1714				     <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
1715				     <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
1716			clocks = <&cpg CPG_MOD 329>;
1717			clock-names = "fck";
1718			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1719			resets = <&cpg 329>;
1720
1721			status = "disabled";
1722		};
1723	};
1724
1725	thermal-zones {
1726		cpu_thermal: cpu-thermal {
1727			polling-delay-passive = <0>;
1728			polling-delay = <0>;
1729
1730			thermal-sensors = <&thermal>;
1731
1732			trips {
1733				cpu-crit {
1734					temperature = <95000>;
1735					hysteresis = <0>;
1736					type = "critical";
1737				};
1738			};
1739			cooling-maps {
1740			};
1741		};
1742	};
1743
1744	timer {
1745		compatible = "arm,armv7-timer";
1746		interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1747				      <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1748				      <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1749				      <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
1750	};
1751
1752	/* External USB clock - can be overridden by the board */
1753	usb_extal_clk: usb_extal {
1754		compatible = "fixed-clock";
1755		#clock-cells = <0>;
1756		clock-frequency = <48000000>;
1757	};
1758};
1759