1/* 2 * Device Tree Source for the Porter board 3 * 4 * Copyright (C) 2015 Cogent Embedded, Inc. 5 * 6 * SPDX-License-Identifier: GPL-2.0 7 */ 8 9/* 10 * SSI-AK4642 11 * 12 * JP3: 2-1: AK4642 13 * 2-3: ADV7511 14 * 15 * This command is required before playback/capture: 16 * 17 * amixer set "LINEOUT Mixer DACL" on 18 */ 19 20/dts-v1/; 21#include "r8a7791.dtsi" 22#include <dt-bindings/gpio/gpio.h> 23 24/ { 25 model = "Porter"; 26 compatible = "renesas,porter", "renesas,r8a7791"; 27 28 aliases { 29 serial0 = &scif0; 30 }; 31 32 chosen { 33 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp"; 34 stdout-path = "serial0:115200n8"; 35 }; 36 37 memory@40000000 { 38 device_type = "memory"; 39 reg = <0 0x40000000 0 0x40000000>; 40 }; 41 42 memory@200000000 { 43 device_type = "memory"; 44 reg = <2 0x00000000 0 0x40000000>; 45 }; 46 47 vcc_sdhi0: regulator-vcc-sdhi0 { 48 compatible = "regulator-fixed"; 49 50 regulator-name = "SDHI0 Vcc"; 51 regulator-min-microvolt = <3300000>; 52 regulator-max-microvolt = <3300000>; 53 regulator-always-on; 54 }; 55 56 vccq_sdhi0: regulator-vccq-sdhi0 { 57 compatible = "regulator-gpio"; 58 59 regulator-name = "SDHI0 VccQ"; 60 regulator-min-microvolt = <1800000>; 61 regulator-max-microvolt = <3300000>; 62 63 gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>; 64 gpios-states = <1>; 65 states = <3300000 1 66 1800000 0>; 67 }; 68 69 vcc_sdhi2: regulator-vcc-sdhi2 { 70 compatible = "regulator-fixed"; 71 72 regulator-name = "SDHI2 Vcc"; 73 regulator-min-microvolt = <3300000>; 74 regulator-max-microvolt = <3300000>; 75 regulator-always-on; 76 }; 77 78 vccq_sdhi2: regulator-vccq-sdhi2 { 79 compatible = "regulator-gpio"; 80 81 regulator-name = "SDHI2 VccQ"; 82 regulator-min-microvolt = <1800000>; 83 regulator-max-microvolt = <3300000>; 84 85 gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>; 86 gpios-states = <1>; 87 states = <3300000 1 88 1800000 0>; 89 }; 90 91 hdmi-out { 92 compatible = "hdmi-connector"; 93 type = "a"; 94 95 port { 96 hdmi_con: endpoint { 97 remote-endpoint = <&adv7511_out>; 98 }; 99 }; 100 }; 101 102 x3_clk: x3-clock { 103 compatible = "fixed-clock"; 104 #clock-cells = <0>; 105 clock-frequency = <148500000>; 106 }; 107 108 x16_clk: x16-clock { 109 compatible = "fixed-clock"; 110 #clock-cells = <0>; 111 clock-frequency = <74250000>; 112 }; 113 114 x14_clk: audio_clock { 115 compatible = "fixed-clock"; 116 #clock-cells = <0>; 117 clock-frequency = <11289600>; 118 }; 119 120 sound { 121 compatible = "simple-audio-card"; 122 123 simple-audio-card,format = "left_j"; 124 simple-audio-card,bitclock-master = <&soundcodec>; 125 simple-audio-card,frame-master = <&soundcodec>; 126 127 simple-audio-card,cpu { 128 sound-dai = <&rcar_sound>; 129 }; 130 131 soundcodec: simple-audio-card,codec { 132 sound-dai = <&ak4642>; 133 clocks = <&x14_clk>; 134 }; 135 }; 136}; 137 138&extal_clk { 139 clock-frequency = <20000000>; 140}; 141 142&pfc { 143 scif0_pins: scif0 { 144 groups = "scif0_data_d"; 145 function = "scif0"; 146 }; 147 148 ether_pins: ether { 149 groups = "eth_link", "eth_mdio", "eth_rmii"; 150 function = "eth"; 151 }; 152 153 phy1_pins: phy1 { 154 groups = "intc_irq0"; 155 function = "intc"; 156 }; 157 158 sdhi0_pins: sd0 { 159 groups = "sdhi0_data4", "sdhi0_ctrl"; 160 function = "sdhi0"; 161 }; 162 163 sdhi2_pins: sd2 { 164 groups = "sdhi2_data4", "sdhi2_ctrl"; 165 function = "sdhi2"; 166 }; 167 168 qspi_pins: qspi { 169 groups = "qspi_ctrl", "qspi_data4"; 170 function = "qspi"; 171 }; 172 173 i2c2_pins: i2c2 { 174 groups = "i2c2"; 175 function = "i2c2"; 176 }; 177 178 usb0_pins: usb0 { 179 groups = "usb0"; 180 function = "usb0"; 181 }; 182 183 usb1_pins: usb1 { 184 groups = "usb1"; 185 function = "usb1"; 186 }; 187 188 vin0_pins: vin0 { 189 groups = "vin0_data8", "vin0_clk"; 190 function = "vin0"; 191 }; 192 193 can0_pins: can0 { 194 groups = "can0_data"; 195 function = "can0"; 196 }; 197 198 du_pins: du { 199 groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0"; 200 function = "du"; 201 }; 202 203 ssi_pins: sound { 204 groups = "ssi0129_ctrl", "ssi0_data", "ssi1_data"; 205 function = "ssi"; 206 }; 207 208 audio_clk_pins: audio_clk { 209 groups = "audio_clk_a"; 210 function = "audio_clk"; 211 }; 212}; 213 214&scif0 { 215 pinctrl-0 = <&scif0_pins>; 216 pinctrl-names = "default"; 217 218 status = "okay"; 219}; 220 221ðer { 222 pinctrl-0 = <ðer_pins &phy1_pins>; 223 pinctrl-names = "default"; 224 225 phy-handle = <&phy1>; 226 renesas,ether-link-active-low; 227 status = "okay"; 228 229 phy1: ethernet-phy@1 { 230 reg = <1>; 231 interrupt-parent = <&irqc0>; 232 interrupts = <0 IRQ_TYPE_LEVEL_LOW>; 233 micrel,led-mode = <1>; 234 }; 235}; 236 237&sdhi0 { 238 pinctrl-0 = <&sdhi0_pins>; 239 pinctrl-names = "default"; 240 241 vmmc-supply = <&vcc_sdhi0>; 242 vqmmc-supply = <&vccq_sdhi0>; 243 cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>; 244 wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>; 245 status = "okay"; 246}; 247 248&sdhi2 { 249 pinctrl-0 = <&sdhi2_pins>; 250 pinctrl-names = "default"; 251 252 vmmc-supply = <&vcc_sdhi2>; 253 vqmmc-supply = <&vccq_sdhi2>; 254 cd-gpios = <&gpio6 22 GPIO_ACTIVE_LOW>; 255 status = "okay"; 256}; 257 258&qspi { 259 pinctrl-0 = <&qspi_pins>; 260 pinctrl-names = "default"; 261 262 status = "okay"; 263 264 flash@0 { 265 compatible = "spansion,s25fl512s", "jedec,spi-nor"; 266 reg = <0>; 267 spi-max-frequency = <30000000>; 268 spi-tx-bus-width = <4>; 269 spi-rx-bus-width = <4>; 270 m25p,fast-read; 271 272 partitions { 273 compatible = "fixed-partitions"; 274 #address-cells = <1>; 275 #size-cells = <1>; 276 277 partition@0 { 278 label = "loader_prg"; 279 reg = <0x00000000 0x00040000>; 280 read-only; 281 }; 282 partition@40000 { 283 label = "user_prg"; 284 reg = <0x00040000 0x00400000>; 285 read-only; 286 }; 287 partition@440000 { 288 label = "flash_fs"; 289 reg = <0x00440000 0x03bc0000>; 290 }; 291 }; 292 }; 293}; 294 295&i2c2 { 296 pinctrl-0 = <&i2c2_pins>; 297 pinctrl-names = "default"; 298 299 status = "okay"; 300 clock-frequency = <400000>; 301 302 ak4642: codec@12 { 303 compatible = "asahi-kasei,ak4642"; 304 #sound-dai-cells = <0>; 305 reg = <0x12>; 306 }; 307 308 composite-in@20 { 309 compatible = "adi,adv7180"; 310 reg = <0x20>; 311 remote = <&vin0>; 312 313 port { 314 adv7180: endpoint { 315 bus-width = <8>; 316 remote-endpoint = <&vin0ep>; 317 }; 318 }; 319 }; 320 321 hdmi@39 { 322 compatible = "adi,adv7511w"; 323 reg = <0x39>; 324 interrupt-parent = <&gpio3>; 325 interrupts = <29 IRQ_TYPE_LEVEL_LOW>; 326 327 adi,input-depth = <8>; 328 adi,input-colorspace = "rgb"; 329 adi,input-clock = "1x"; 330 adi,input-style = <1>; 331 adi,input-justification = "evenly"; 332 333 ports { 334 #address-cells = <1>; 335 #size-cells = <0>; 336 337 port@0 { 338 reg = <0>; 339 adv7511_in: endpoint { 340 remote-endpoint = <&du_out_rgb>; 341 }; 342 }; 343 344 port@1 { 345 reg = <1>; 346 adv7511_out: endpoint { 347 remote-endpoint = <&hdmi_con>; 348 }; 349 }; 350 }; 351 }; 352}; 353 354&sata0 { 355 status = "okay"; 356}; 357 358/* composite video input */ 359&vin0 { 360 status = "okay"; 361 pinctrl-0 = <&vin0_pins>; 362 pinctrl-names = "default"; 363 364 port { 365 #address-cells = <1>; 366 #size-cells = <0>; 367 368 vin0ep: endpoint { 369 remote-endpoint = <&adv7180>; 370 bus-width = <8>; 371 }; 372 }; 373}; 374 375&pci0 { 376 pinctrl-0 = <&usb0_pins>; 377 pinctrl-names = "default"; 378 379 status = "okay"; 380}; 381 382&pci1 { 383 pinctrl-0 = <&usb1_pins>; 384 pinctrl-names = "default"; 385 386 status = "okay"; 387}; 388 389&hsusb { 390 pinctrl-0 = <&usb0_pins>; 391 pinctrl-names = "default"; 392 393 status = "okay"; 394}; 395 396&usbphy { 397 status = "okay"; 398}; 399 400&pcie_bus_clk { 401 clock-frequency = <100000000>; 402}; 403 404&pciec { 405 status = "okay"; 406}; 407 408&can0 { 409 pinctrl-0 = <&can0_pins>; 410 pinctrl-names = "default"; 411 412 status = "okay"; 413}; 414 415&du { 416 pinctrl-0 = <&du_pins>; 417 pinctrl-names = "default"; 418 status = "okay"; 419 420 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, <&cpg CPG_MOD 726>, 421 <&x3_clk>, <&x16_clk>; 422 clock-names = "du.0", "du.1", "lvds.0", 423 "dclkin.0", "dclkin.1"; 424 425 ports { 426 port@1 { 427 endpoint { 428 remote-endpoint = <&adv7511_in>; 429 }; 430 }; 431 }; 432}; 433 434&rcar_sound { 435 pinctrl-0 = <&ssi_pins &audio_clk_pins>; 436 pinctrl-names = "default"; 437 status = "okay"; 438 439 /* Single DAI */ 440 #sound-dai-cells = <0>; 441 442 rcar_sound,dai { 443 dai0 { 444 playback = <&ssi0>; 445 capture = <&ssi1>; 446 }; 447 }; 448}; 449 450&ssi1 { 451 shared-pin; 452}; 453