1*57cd681bSTom Rini/* 2*57cd681bSTom Rini * Device Tree Source for OMAP4/5 SoC CPU thermal 3*57cd681bSTom Rini * 4*57cd681bSTom Rini * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ 5*57cd681bSTom Rini * Contact: Eduardo Valentin <eduardo.valentin@ti.com> 6*57cd681bSTom Rini * 7*57cd681bSTom Rini * This file is licensed under the terms of the GNU General Public License 8*57cd681bSTom Rini * version 2. This program is licensed "as is" without any warranty of any 9*57cd681bSTom Rini * kind, whether express or implied. 10*57cd681bSTom Rini */ 11*57cd681bSTom Rini 12*57cd681bSTom Rini#include <dt-bindings/thermal/thermal.h> 13*57cd681bSTom Rini 14*57cd681bSTom Rinicpu_thermal: cpu_thermal { 15*57cd681bSTom Rini polling-delay-passive = <250>; /* milliseconds */ 16*57cd681bSTom Rini polling-delay = <1000>; /* milliseconds */ 17*57cd681bSTom Rini 18*57cd681bSTom Rini /* sensor ID */ 19*57cd681bSTom Rini thermal-sensors = <&bandgap 0>; 20*57cd681bSTom Rini 21*57cd681bSTom Rini cpu_trips: trips { 22*57cd681bSTom Rini cpu_alert0: cpu_alert { 23*57cd681bSTom Rini temperature = <100000>; /* millicelsius */ 24*57cd681bSTom Rini hysteresis = <2000>; /* millicelsius */ 25*57cd681bSTom Rini type = "passive"; 26*57cd681bSTom Rini }; 27*57cd681bSTom Rini cpu_crit: cpu_crit { 28*57cd681bSTom Rini temperature = <125000>; /* millicelsius */ 29*57cd681bSTom Rini hysteresis = <2000>; /* millicelsius */ 30*57cd681bSTom Rini type = "critical"; 31*57cd681bSTom Rini }; 32*57cd681bSTom Rini }; 33*57cd681bSTom Rini 34*57cd681bSTom Rini cpu_cooling_maps: cooling-maps { 35*57cd681bSTom Rini map0 { 36*57cd681bSTom Rini trip = <&cpu_alert0>; 37*57cd681bSTom Rini cooling-device = 38*57cd681bSTom Rini <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 39*57cd681bSTom Rini }; 40*57cd681bSTom Rini }; 41*57cd681bSTom Rini}; 42