xref: /openbmc/u-boot/arch/arm/dts/omap3-igep0020.dts (revision 8fd8f2e4)
1*8fd8f2e4SEnric Balletbo i Serra/*
2*8fd8f2e4SEnric Balletbo i Serra * Device Tree Source for IGEPv2 Rev. C (TI OMAP AM/DM37x)
3*8fd8f2e4SEnric Balletbo i Serra *
4*8fd8f2e4SEnric Balletbo i Serra * Copyright (C) 2012 Javier Martinez Canillas <javier@osg.samsung.com>
5*8fd8f2e4SEnric Balletbo i Serra * Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com>
6*8fd8f2e4SEnric Balletbo i Serra *
7*8fd8f2e4SEnric Balletbo i Serra * This program is free software; you can redistribute it and/or modify
8*8fd8f2e4SEnric Balletbo i Serra * it under the terms of the GNU General Public License version 2 as
9*8fd8f2e4SEnric Balletbo i Serra * published by the Free Software Foundation.
10*8fd8f2e4SEnric Balletbo i Serra */
11*8fd8f2e4SEnric Balletbo i Serra
12*8fd8f2e4SEnric Balletbo i Serra#include "omap3-igep0020-common.dtsi"
13*8fd8f2e4SEnric Balletbo i Serra
14*8fd8f2e4SEnric Balletbo i Serra/ {
15*8fd8f2e4SEnric Balletbo i Serra	model = "IGEPv2 Rev. C (TI OMAP AM/DM37x)";
16*8fd8f2e4SEnric Balletbo i Serra	compatible = "isee,omap3-igep0020", "ti,omap36xx", "ti,omap3";
17*8fd8f2e4SEnric Balletbo i Serra
18*8fd8f2e4SEnric Balletbo i Serra	vmmcsdio_fixed: fixedregulator-mmcsdio {
19*8fd8f2e4SEnric Balletbo i Serra		compatible = "regulator-fixed";
20*8fd8f2e4SEnric Balletbo i Serra		regulator-name = "vmmcsdio_fixed";
21*8fd8f2e4SEnric Balletbo i Serra		regulator-min-microvolt = <3300000>;
22*8fd8f2e4SEnric Balletbo i Serra		regulator-max-microvolt = <3300000>;
23*8fd8f2e4SEnric Balletbo i Serra	};
24*8fd8f2e4SEnric Balletbo i Serra
25*8fd8f2e4SEnric Balletbo i Serra	mmc2_pwrseq: mmc2_pwrseq {
26*8fd8f2e4SEnric Balletbo i Serra		compatible = "mmc-pwrseq-simple";
27*8fd8f2e4SEnric Balletbo i Serra		reset-gpios = <&gpio5 11 GPIO_ACTIVE_LOW>,	/* gpio_139 - RESET_N_W */
28*8fd8f2e4SEnric Balletbo i Serra			      <&gpio5 10 GPIO_ACTIVE_LOW>;	/* gpio_138 - WIFI_PDN */
29*8fd8f2e4SEnric Balletbo i Serra	};
30*8fd8f2e4SEnric Balletbo i Serra};
31*8fd8f2e4SEnric Balletbo i Serra
32*8fd8f2e4SEnric Balletbo i Serra&omap3_pmx_core {
33*8fd8f2e4SEnric Balletbo i Serra	lbee1usjyc_pins: pinmux_lbee1usjyc_pins {
34*8fd8f2e4SEnric Balletbo i Serra		pinctrl-single,pins = <
35*8fd8f2e4SEnric Balletbo i Serra			OMAP3_CORE1_IOPAD(0x2166, PIN_OUTPUT | MUX_MODE4)	/* sdmmc2_dat5.gpio_137 - RESET_N_W */
36*8fd8f2e4SEnric Balletbo i Serra			OMAP3_CORE1_IOPAD(0x2168, PIN_OUTPUT | MUX_MODE4)	/* sdmmc2_dat6.gpio_138 - WIFI_PDN */
37*8fd8f2e4SEnric Balletbo i Serra			OMAP3_CORE1_IOPAD(0x216a, PIN_OUTPUT | MUX_MODE4)	/* sdmmc2_dat7.gpio_139 - RST_N_B */
38*8fd8f2e4SEnric Balletbo i Serra		>;
39*8fd8f2e4SEnric Balletbo i Serra	};
40*8fd8f2e4SEnric Balletbo i Serra};
41*8fd8f2e4SEnric Balletbo i Serra
42*8fd8f2e4SEnric Balletbo i Serra/* On board Wifi module */
43*8fd8f2e4SEnric Balletbo i Serra&mmc2 {
44*8fd8f2e4SEnric Balletbo i Serra	pinctrl-names = "default";
45*8fd8f2e4SEnric Balletbo i Serra	pinctrl-0 = <&mmc2_pins &lbee1usjyc_pins>;
46*8fd8f2e4SEnric Balletbo i Serra	vmmc-supply = <&vmmcsdio_fixed>;
47*8fd8f2e4SEnric Balletbo i Serra	mmc-pwrseq = <&mmc2_pwrseq>;
48*8fd8f2e4SEnric Balletbo i Serra	bus-width = <4>;
49*8fd8f2e4SEnric Balletbo i Serra	non-removable;
50*8fd8f2e4SEnric Balletbo i Serra};
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