1*8fd8f2e4SEnric Balletbo i Serra/* 2*8fd8f2e4SEnric Balletbo i Serra * Common Device Tree Source for IGEPv2 3*8fd8f2e4SEnric Balletbo i Serra * 4*8fd8f2e4SEnric Balletbo i Serra * Copyright (C) 2014 Javier Martinez Canillas <javier@osg.samsung.com> 5*8fd8f2e4SEnric Balletbo i Serra * Copyright (C) 2014 Enric Balletbo i Serra <eballetbo@gmail.com> 6*8fd8f2e4SEnric Balletbo i Serra * 7*8fd8f2e4SEnric Balletbo i Serra * This program is free software; you can redistribute it and/or modify 8*8fd8f2e4SEnric Balletbo i Serra * it under the terms of the GNU General Public License version 2 as 9*8fd8f2e4SEnric Balletbo i Serra * published by the Free Software Foundation. 10*8fd8f2e4SEnric Balletbo i Serra */ 11*8fd8f2e4SEnric Balletbo i Serra 12*8fd8f2e4SEnric Balletbo i Serra#include "omap3-igep.dtsi" 13*8fd8f2e4SEnric Balletbo i Serra#include "omap-gpmc-smsc9221.dtsi" 14*8fd8f2e4SEnric Balletbo i Serra 15*8fd8f2e4SEnric Balletbo i Serra/ { 16*8fd8f2e4SEnric Balletbo i Serra 17*8fd8f2e4SEnric Balletbo i Serra leds { 18*8fd8f2e4SEnric Balletbo i Serra pinctrl-names = "default"; 19*8fd8f2e4SEnric Balletbo i Serra pinctrl-0 = <&leds_pins>; 20*8fd8f2e4SEnric Balletbo i Serra compatible = "gpio-leds"; 21*8fd8f2e4SEnric Balletbo i Serra 22*8fd8f2e4SEnric Balletbo i Serra boot { 23*8fd8f2e4SEnric Balletbo i Serra label = "omap3:green:boot"; 24*8fd8f2e4SEnric Balletbo i Serra gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>; 25*8fd8f2e4SEnric Balletbo i Serra default-state = "on"; 26*8fd8f2e4SEnric Balletbo i Serra }; 27*8fd8f2e4SEnric Balletbo i Serra 28*8fd8f2e4SEnric Balletbo i Serra user0 { 29*8fd8f2e4SEnric Balletbo i Serra label = "omap3:red:user0"; 30*8fd8f2e4SEnric Balletbo i Serra gpios = <&gpio1 27 GPIO_ACTIVE_HIGH>; 31*8fd8f2e4SEnric Balletbo i Serra default-state = "off"; 32*8fd8f2e4SEnric Balletbo i Serra }; 33*8fd8f2e4SEnric Balletbo i Serra 34*8fd8f2e4SEnric Balletbo i Serra user1 { 35*8fd8f2e4SEnric Balletbo i Serra label = "omap3:red:user1"; 36*8fd8f2e4SEnric Balletbo i Serra gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>; 37*8fd8f2e4SEnric Balletbo i Serra default-state = "off"; 38*8fd8f2e4SEnric Balletbo i Serra }; 39*8fd8f2e4SEnric Balletbo i Serra 40*8fd8f2e4SEnric Balletbo i Serra user2 { 41*8fd8f2e4SEnric Balletbo i Serra label = "omap3:green:user1"; 42*8fd8f2e4SEnric Balletbo i Serra gpios = <&twl_gpio 19 GPIO_ACTIVE_LOW>; 43*8fd8f2e4SEnric Balletbo i Serra }; 44*8fd8f2e4SEnric Balletbo i Serra }; 45*8fd8f2e4SEnric Balletbo i Serra 46*8fd8f2e4SEnric Balletbo i Serra /* HS USB Port 1 Power */ 47*8fd8f2e4SEnric Balletbo i Serra hsusb1_power: hsusb1_power_reg { 48*8fd8f2e4SEnric Balletbo i Serra compatible = "regulator-fixed"; 49*8fd8f2e4SEnric Balletbo i Serra regulator-name = "hsusb1_vbus"; 50*8fd8f2e4SEnric Balletbo i Serra regulator-min-microvolt = <3300000>; 51*8fd8f2e4SEnric Balletbo i Serra regulator-max-microvolt = <3300000>; 52*8fd8f2e4SEnric Balletbo i Serra gpio = <&twl_gpio 18 GPIO_ACTIVE_LOW>; /* GPIO LEDA */ 53*8fd8f2e4SEnric Balletbo i Serra startup-delay-us = <70000>; 54*8fd8f2e4SEnric Balletbo i Serra }; 55*8fd8f2e4SEnric Balletbo i Serra 56*8fd8f2e4SEnric Balletbo i Serra /* HS USB Host PHY on PORT 1 */ 57*8fd8f2e4SEnric Balletbo i Serra hsusb1_phy: hsusb1_phy { 58*8fd8f2e4SEnric Balletbo i Serra compatible = "usb-nop-xceiv"; 59*8fd8f2e4SEnric Balletbo i Serra reset-gpios = <&gpio1 24 GPIO_ACTIVE_LOW>; /* gpio_24 */ 60*8fd8f2e4SEnric Balletbo i Serra vcc-supply = <&hsusb1_power>; 61*8fd8f2e4SEnric Balletbo i Serra #phy-cells = <0>; 62*8fd8f2e4SEnric Balletbo i Serra }; 63*8fd8f2e4SEnric Balletbo i Serra 64*8fd8f2e4SEnric Balletbo i Serra tfp410: encoder { 65*8fd8f2e4SEnric Balletbo i Serra compatible = "ti,tfp410"; 66*8fd8f2e4SEnric Balletbo i Serra powerdown-gpios = <&gpio6 10 GPIO_ACTIVE_LOW>; /* gpio_170 */ 67*8fd8f2e4SEnric Balletbo i Serra 68*8fd8f2e4SEnric Balletbo i Serra ports { 69*8fd8f2e4SEnric Balletbo i Serra #address-cells = <1>; 70*8fd8f2e4SEnric Balletbo i Serra #size-cells = <0>; 71*8fd8f2e4SEnric Balletbo i Serra 72*8fd8f2e4SEnric Balletbo i Serra port@0 { 73*8fd8f2e4SEnric Balletbo i Serra reg = <0>; 74*8fd8f2e4SEnric Balletbo i Serra 75*8fd8f2e4SEnric Balletbo i Serra tfp410_in: endpoint { 76*8fd8f2e4SEnric Balletbo i Serra remote-endpoint = <&dpi_out>; 77*8fd8f2e4SEnric Balletbo i Serra }; 78*8fd8f2e4SEnric Balletbo i Serra }; 79*8fd8f2e4SEnric Balletbo i Serra 80*8fd8f2e4SEnric Balletbo i Serra port@1 { 81*8fd8f2e4SEnric Balletbo i Serra reg = <1>; 82*8fd8f2e4SEnric Balletbo i Serra 83*8fd8f2e4SEnric Balletbo i Serra tfp410_out: endpoint { 84*8fd8f2e4SEnric Balletbo i Serra remote-endpoint = <&dvi_connector_in>; 85*8fd8f2e4SEnric Balletbo i Serra }; 86*8fd8f2e4SEnric Balletbo i Serra }; 87*8fd8f2e4SEnric Balletbo i Serra }; 88*8fd8f2e4SEnric Balletbo i Serra }; 89*8fd8f2e4SEnric Balletbo i Serra 90*8fd8f2e4SEnric Balletbo i Serra dvi0: connector { 91*8fd8f2e4SEnric Balletbo i Serra compatible = "dvi-connector"; 92*8fd8f2e4SEnric Balletbo i Serra label = "dvi"; 93*8fd8f2e4SEnric Balletbo i Serra 94*8fd8f2e4SEnric Balletbo i Serra digital; 95*8fd8f2e4SEnric Balletbo i Serra 96*8fd8f2e4SEnric Balletbo i Serra ddc-i2c-bus = <&i2c3>; 97*8fd8f2e4SEnric Balletbo i Serra 98*8fd8f2e4SEnric Balletbo i Serra port { 99*8fd8f2e4SEnric Balletbo i Serra dvi_connector_in: endpoint { 100*8fd8f2e4SEnric Balletbo i Serra remote-endpoint = <&tfp410_out>; 101*8fd8f2e4SEnric Balletbo i Serra }; 102*8fd8f2e4SEnric Balletbo i Serra }; 103*8fd8f2e4SEnric Balletbo i Serra }; 104*8fd8f2e4SEnric Balletbo i Serra}; 105*8fd8f2e4SEnric Balletbo i Serra 106*8fd8f2e4SEnric Balletbo i Serra&omap3_pmx_core { 107*8fd8f2e4SEnric Balletbo i Serra pinctrl-names = "default"; 108*8fd8f2e4SEnric Balletbo i Serra pinctrl-0 = < 109*8fd8f2e4SEnric Balletbo i Serra &tfp410_pins 110*8fd8f2e4SEnric Balletbo i Serra &dss_dpi_pins 111*8fd8f2e4SEnric Balletbo i Serra >; 112*8fd8f2e4SEnric Balletbo i Serra 113*8fd8f2e4SEnric Balletbo i Serra tfp410_pins: pinmux_tfp410_pins { 114*8fd8f2e4SEnric Balletbo i Serra pinctrl-single,pins = < 115*8fd8f2e4SEnric Balletbo i Serra OMAP3_CORE1_IOPAD(0x21c6, PIN_OUTPUT | MUX_MODE4) /* hdq_sio.gpio_170 */ 116*8fd8f2e4SEnric Balletbo i Serra >; 117*8fd8f2e4SEnric Balletbo i Serra }; 118*8fd8f2e4SEnric Balletbo i Serra 119*8fd8f2e4SEnric Balletbo i Serra dss_dpi_pins: pinmux_dss_dpi_pins { 120*8fd8f2e4SEnric Balletbo i Serra pinctrl-single,pins = < 121*8fd8f2e4SEnric Balletbo i Serra OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */ 122*8fd8f2e4SEnric Balletbo i Serra OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */ 123*8fd8f2e4SEnric Balletbo i Serra OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */ 124*8fd8f2e4SEnric Balletbo i Serra OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */ 125*8fd8f2e4SEnric Balletbo i Serra OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0) /* dss_data0.dss_data0 */ 126*8fd8f2e4SEnric Balletbo i Serra OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0) /* dss_data1.dss_data1 */ 127*8fd8f2e4SEnric Balletbo i Serra OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0) /* dss_data2.dss_data2 */ 128*8fd8f2e4SEnric Balletbo i Serra OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0) /* dss_data3.dss_data3 */ 129*8fd8f2e4SEnric Balletbo i Serra OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0) /* dss_data4.dss_data4 */ 130*8fd8f2e4SEnric Balletbo i Serra OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0) /* dss_data5.dss_data5 */ 131*8fd8f2e4SEnric Balletbo i Serra OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */ 132*8fd8f2e4SEnric Balletbo i Serra OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0) /* dss_data7.dss_data7 */ 133*8fd8f2e4SEnric Balletbo i Serra OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0) /* dss_data8.dss_data8 */ 134*8fd8f2e4SEnric Balletbo i Serra OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0) /* dss_data9.dss_data9 */ 135*8fd8f2e4SEnric Balletbo i Serra OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0) /* dss_data10.dss_data10 */ 136*8fd8f2e4SEnric Balletbo i Serra OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0) /* dss_data11.dss_data11 */ 137*8fd8f2e4SEnric Balletbo i Serra OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0) /* dss_data12.dss_data12 */ 138*8fd8f2e4SEnric Balletbo i Serra OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0) /* dss_data13.dss_data13 */ 139*8fd8f2e4SEnric Balletbo i Serra OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0) /* dss_data14.dss_data14 */ 140*8fd8f2e4SEnric Balletbo i Serra OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0) /* dss_data15.dss_data15 */ 141*8fd8f2e4SEnric Balletbo i Serra OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0) /* dss_data16.dss_data16 */ 142*8fd8f2e4SEnric Balletbo i Serra OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0) /* dss_data17.dss_data17 */ 143*8fd8f2e4SEnric Balletbo i Serra OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE0) /* dss_data18.dss_data18 */ 144*8fd8f2e4SEnric Balletbo i Serra OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT | MUX_MODE0) /* dss_data19.dss_data19 */ 145*8fd8f2e4SEnric Balletbo i Serra OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE0) /* dss_data20.dss_data20 */ 146*8fd8f2e4SEnric Balletbo i Serra OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE0) /* dss_data21.dss_data21 */ 147*8fd8f2e4SEnric Balletbo i Serra OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE0) /* dss_data22.dss_data22 */ 148*8fd8f2e4SEnric Balletbo i Serra OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE0) /* dss_data23.dss_data23 */ 149*8fd8f2e4SEnric Balletbo i Serra >; 150*8fd8f2e4SEnric Balletbo i Serra }; 151*8fd8f2e4SEnric Balletbo i Serra 152*8fd8f2e4SEnric Balletbo i Serra uart2_pins: pinmux_uart2_pins { 153*8fd8f2e4SEnric Balletbo i Serra pinctrl-single,pins = < 154*8fd8f2e4SEnric Balletbo i Serra OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT | MUX_MODE0) /* uart2_cts.uart2_cts */ 155*8fd8f2e4SEnric Balletbo i Serra OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0) /* uart2_rts .uart2_rts*/ 156*8fd8f2e4SEnric Balletbo i Serra OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */ 157*8fd8f2e4SEnric Balletbo i Serra OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */ 158*8fd8f2e4SEnric Balletbo i Serra >; 159*8fd8f2e4SEnric Balletbo i Serra }; 160*8fd8f2e4SEnric Balletbo i Serra 161*8fd8f2e4SEnric Balletbo i Serra smsc9221_pins: pinmux_smsc9221_pins { 162*8fd8f2e4SEnric Balletbo i Serra pinctrl-single,pins = < 163*8fd8f2e4SEnric Balletbo i Serra OMAP3_CORE1_IOPAD(0x21d2, PIN_INPUT | MUX_MODE4) /* mcspi1_cs2.gpio_176 */ 164*8fd8f2e4SEnric Balletbo i Serra >; 165*8fd8f2e4SEnric Balletbo i Serra }; 166*8fd8f2e4SEnric Balletbo i Serra}; 167*8fd8f2e4SEnric Balletbo i Serra 168*8fd8f2e4SEnric Balletbo i Serra&omap3_pmx_core2 { 169*8fd8f2e4SEnric Balletbo i Serra pinctrl-names = "default"; 170*8fd8f2e4SEnric Balletbo i Serra pinctrl-0 = < 171*8fd8f2e4SEnric Balletbo i Serra &hsusbb1_pins 172*8fd8f2e4SEnric Balletbo i Serra >; 173*8fd8f2e4SEnric Balletbo i Serra 174*8fd8f2e4SEnric Balletbo i Serra hsusbb1_pins: pinmux_hsusbb1_pins { 175*8fd8f2e4SEnric Balletbo i Serra pinctrl-single,pins = < 176*8fd8f2e4SEnric Balletbo i Serra OMAP3630_CORE2_IOPAD(0x25da, PIN_OUTPUT | MUX_MODE3) /* etk_ctl.hsusb1_clk */ 177*8fd8f2e4SEnric Balletbo i Serra OMAP3630_CORE2_IOPAD(0x25d8, PIN_OUTPUT | MUX_MODE3) /* etk_clk.hsusb1_stp */ 178*8fd8f2e4SEnric Balletbo i Serra OMAP3630_CORE2_IOPAD(0x25ec, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d8.hsusb1_dir */ 179*8fd8f2e4SEnric Balletbo i Serra OMAP3630_CORE2_IOPAD(0x25ee, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d9.hsusb1_nxt */ 180*8fd8f2e4SEnric Balletbo i Serra OMAP3630_CORE2_IOPAD(0x25dc, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d0.hsusb1_data0 */ 181*8fd8f2e4SEnric Balletbo i Serra OMAP3630_CORE2_IOPAD(0x25de, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d1.hsusb1_data1 */ 182*8fd8f2e4SEnric Balletbo i Serra OMAP3630_CORE2_IOPAD(0x25e0, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d2.hsusb1_data2 */ 183*8fd8f2e4SEnric Balletbo i Serra OMAP3630_CORE2_IOPAD(0x25e2, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d3.hsusb1_data7 */ 184*8fd8f2e4SEnric Balletbo i Serra OMAP3630_CORE2_IOPAD(0x25e4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d4.hsusb1_data4 */ 185*8fd8f2e4SEnric Balletbo i Serra OMAP3630_CORE2_IOPAD(0x25e6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d5.hsusb1_data5 */ 186*8fd8f2e4SEnric Balletbo i Serra OMAP3630_CORE2_IOPAD(0x25e8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d6.hsusb1_data6 */ 187*8fd8f2e4SEnric Balletbo i Serra OMAP3630_CORE2_IOPAD(0x25ea, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d7.hsusb1_data3 */ 188*8fd8f2e4SEnric Balletbo i Serra >; 189*8fd8f2e4SEnric Balletbo i Serra }; 190*8fd8f2e4SEnric Balletbo i Serra 191*8fd8f2e4SEnric Balletbo i Serra leds_pins: pinmux_leds_pins { 192*8fd8f2e4SEnric Balletbo i Serra pinctrl-single,pins = < 193*8fd8f2e4SEnric Balletbo i Serra OMAP3630_CORE2_IOPAD(0x25f4, PIN_OUTPUT | MUX_MODE4) /* etk_d12.gpio_26 */ 194*8fd8f2e4SEnric Balletbo i Serra OMAP3630_CORE2_IOPAD(0x25f6, PIN_OUTPUT | MUX_MODE4) /* etk_d13.gpio_27 */ 195*8fd8f2e4SEnric Balletbo i Serra OMAP3630_CORE2_IOPAD(0x25f8, PIN_OUTPUT | MUX_MODE4) /* etk_d14.gpio_28 */ 196*8fd8f2e4SEnric Balletbo i Serra >; 197*8fd8f2e4SEnric Balletbo i Serra }; 198*8fd8f2e4SEnric Balletbo i Serra 199*8fd8f2e4SEnric Balletbo i Serra mmc1_wp_pins: pinmux_mmc1_cd_pins { 200*8fd8f2e4SEnric Balletbo i Serra pinctrl-single,pins = < 201*8fd8f2e4SEnric Balletbo i Serra OMAP3630_CORE2_IOPAD(0x25fa, PIN_INPUT | MUX_MODE4) /* etk_d15.gpio_29 */ 202*8fd8f2e4SEnric Balletbo i Serra >; 203*8fd8f2e4SEnric Balletbo i Serra }; 204*8fd8f2e4SEnric Balletbo i Serra}; 205*8fd8f2e4SEnric Balletbo i Serra 206*8fd8f2e4SEnric Balletbo i Serra&i2c3 { 207*8fd8f2e4SEnric Balletbo i Serra clock-frequency = <100000>; 208*8fd8f2e4SEnric Balletbo i Serra 209*8fd8f2e4SEnric Balletbo i Serra /* 210*8fd8f2e4SEnric Balletbo i Serra * Display monitor features are burnt in the EEPROM 211*8fd8f2e4SEnric Balletbo i Serra * as EDID data. 212*8fd8f2e4SEnric Balletbo i Serra */ 213*8fd8f2e4SEnric Balletbo i Serra eeprom@50 { 214*8fd8f2e4SEnric Balletbo i Serra compatible = "ti,eeprom"; 215*8fd8f2e4SEnric Balletbo i Serra reg = <0x50>; 216*8fd8f2e4SEnric Balletbo i Serra }; 217*8fd8f2e4SEnric Balletbo i Serra}; 218*8fd8f2e4SEnric Balletbo i Serra 219*8fd8f2e4SEnric Balletbo i Serra&gpmc { 220*8fd8f2e4SEnric Balletbo i Serra ranges = <0 0 0x30000000 0x01000000>, /* CS0: 16MB for NAND */ 221*8fd8f2e4SEnric Balletbo i Serra <5 0 0x2c000000 0x01000000>; /* CS5: 16MB for ethernet */ 222*8fd8f2e4SEnric Balletbo i Serra 223*8fd8f2e4SEnric Balletbo i Serra ethernet@gpmc { 224*8fd8f2e4SEnric Balletbo i Serra pinctrl-names = "default"; 225*8fd8f2e4SEnric Balletbo i Serra pinctrl-0 = <&smsc9221_pins>; 226*8fd8f2e4SEnric Balletbo i Serra reg = <5 0 0xff>; 227*8fd8f2e4SEnric Balletbo i Serra interrupt-parent = <&gpio6>; 228*8fd8f2e4SEnric Balletbo i Serra interrupts = <16 IRQ_TYPE_LEVEL_LOW>; 229*8fd8f2e4SEnric Balletbo i Serra }; 230*8fd8f2e4SEnric Balletbo i Serra}; 231*8fd8f2e4SEnric Balletbo i Serra 232*8fd8f2e4SEnric Balletbo i Serra&uart2 { 233*8fd8f2e4SEnric Balletbo i Serra pinctrl-names = "default"; 234*8fd8f2e4SEnric Balletbo i Serra pinctrl-0 = <&uart2_pins>; 235*8fd8f2e4SEnric Balletbo i Serra}; 236*8fd8f2e4SEnric Balletbo i Serra 237*8fd8f2e4SEnric Balletbo i Serra&usbhshost { 238*8fd8f2e4SEnric Balletbo i Serra port1-mode = "ehci-phy"; 239*8fd8f2e4SEnric Balletbo i Serra}; 240*8fd8f2e4SEnric Balletbo i Serra 241*8fd8f2e4SEnric Balletbo i Serra&usbhsehci { 242*8fd8f2e4SEnric Balletbo i Serra phys = <&hsusb1_phy>; 243*8fd8f2e4SEnric Balletbo i Serra}; 244*8fd8f2e4SEnric Balletbo i Serra 245*8fd8f2e4SEnric Balletbo i Serra&vpll2 { 246*8fd8f2e4SEnric Balletbo i Serra /* Needed for DSS */ 247*8fd8f2e4SEnric Balletbo i Serra regulator-name = "vdds_dsi"; 248*8fd8f2e4SEnric Balletbo i Serra}; 249*8fd8f2e4SEnric Balletbo i Serra 250*8fd8f2e4SEnric Balletbo i Serra&dss { 251*8fd8f2e4SEnric Balletbo i Serra status = "ok"; 252*8fd8f2e4SEnric Balletbo i Serra 253*8fd8f2e4SEnric Balletbo i Serra port { 254*8fd8f2e4SEnric Balletbo i Serra dpi_out: endpoint { 255*8fd8f2e4SEnric Balletbo i Serra remote-endpoint = <&tfp410_in>; 256*8fd8f2e4SEnric Balletbo i Serra data-lines = <24>; 257*8fd8f2e4SEnric Balletbo i Serra }; 258*8fd8f2e4SEnric Balletbo i Serra }; 259*8fd8f2e4SEnric Balletbo i Serra}; 260*8fd8f2e4SEnric Balletbo i Serra 261*8fd8f2e4SEnric Balletbo i Serra&mmc1 { 262*8fd8f2e4SEnric Balletbo i Serra pinctrl-0 = <&mmc1_pins &mmc1_wp_pins>; 263*8fd8f2e4SEnric Balletbo i Serra wp-gpios = <&gpio1 29 GPIO_ACTIVE_LOW>; /* gpio_29 */ 264*8fd8f2e4SEnric Balletbo i Serra}; 265