1*d9be183bSDerald D. Woods/* 2*d9be183bSDerald D. Woods * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ 3*d9be183bSDerald D. Woods * 4*d9be183bSDerald D. Woods * This program is free software; you can redistribute it and/or modify 5*d9be183bSDerald D. Woods * it under the terms of the GNU General Public License version 2 as 6*d9be183bSDerald D. Woods * published by the Free Software Foundation. 7*d9be183bSDerald D. Woods */ 8*d9be183bSDerald D. Woods/dts-v1/; 9*d9be183bSDerald D. Woods 10*d9be183bSDerald D. Woods#include "omap34xx.dtsi" 11*d9be183bSDerald D. Woods#include "omap3-evm-common.dtsi" 12*d9be183bSDerald D. Woods#include "omap3-evm-processor-common.dtsi" 13*d9be183bSDerald D. Woods 14*d9be183bSDerald D. Woods/ { 15*d9be183bSDerald D. Woods model = "TI OMAP35XX EVM (TMDSEVM3530)"; 16*d9be183bSDerald D. Woods compatible = "ti,omap3-evm", "ti,omap3430", "ti,omap3"; 17*d9be183bSDerald D. Woods}; 18*d9be183bSDerald D. Woods 19*d9be183bSDerald D. Woods&omap3_pmx_core2 { 20*d9be183bSDerald D. Woods pinctrl-names = "default"; 21*d9be183bSDerald D. Woods pinctrl-0 = <&hsusb2_2_pins>; 22*d9be183bSDerald D. Woods 23*d9be183bSDerald D. Woods ehci_phy_pins: pinmux_ehci_phy_pins { 24*d9be183bSDerald D. Woods pinctrl-single,pins = < 25*d9be183bSDerald D. Woods 26*d9be183bSDerald D. Woods /* EHCI PHY reset GPIO etk_d7.gpio_21 */ 27*d9be183bSDerald D. Woods OMAP3430_CORE2_IOPAD(0x25ea, PIN_OUTPUT | MUX_MODE4) 28*d9be183bSDerald D. Woods 29*d9be183bSDerald D. Woods /* EHCI VBUS etk_d8.gpio_22 */ 30*d9be183bSDerald D. Woods OMAP3430_CORE2_IOPAD(0x25ec, PIN_OUTPUT | MUX_MODE4) 31*d9be183bSDerald D. Woods >; 32*d9be183bSDerald D. Woods }; 33*d9be183bSDerald D. Woods 34*d9be183bSDerald D. Woods /* Used by OHCI and EHCI. OHCI won't work without external phy */ 35*d9be183bSDerald D. Woods hsusb2_2_pins: pinmux_hsusb2_2_pins { 36*d9be183bSDerald D. Woods pinctrl-single,pins = < 37*d9be183bSDerald D. Woods 38*d9be183bSDerald D. Woods /* etk_d10.hsusb2_clk */ 39*d9be183bSDerald D. Woods OMAP3430_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3) 40*d9be183bSDerald D. Woods 41*d9be183bSDerald D. Woods /* etk_d11.hsusb2_stp */ 42*d9be183bSDerald D. Woods OMAP3430_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3) 43*d9be183bSDerald D. Woods 44*d9be183bSDerald D. Woods /* etk_d12.hsusb2_dir */ 45*d9be183bSDerald D. Woods OMAP3430_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3) 46*d9be183bSDerald D. Woods 47*d9be183bSDerald D. Woods /* etk_d13.hsusb2_nxt */ 48*d9be183bSDerald D. Woods OMAP3430_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3) 49*d9be183bSDerald D. Woods 50*d9be183bSDerald D. Woods /* etk_d14.hsusb2_data0 */ 51*d9be183bSDerald D. Woods OMAP3430_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3) 52*d9be183bSDerald D. Woods 53*d9be183bSDerald D. Woods /* etk_d15.hsusb2_data1 */ 54*d9be183bSDerald D. Woods OMAP3430_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3) 55*d9be183bSDerald D. Woods >; 56*d9be183bSDerald D. Woods }; 57*d9be183bSDerald D. Woods}; 58*d9be183bSDerald D. Woods 59*d9be183bSDerald D. Woods&gpmc { 60*d9be183bSDerald D. Woods nand@0,0 { 61*d9be183bSDerald D. Woods compatible = "ti,omap2-nand"; 62*d9be183bSDerald D. Woods reg = <0 0 4>; /* CS0, offset 0, IO size 4 */ 63*d9be183bSDerald D. Woods interrupt-parent = <&gpmc>; 64*d9be183bSDerald D. Woods interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */ 65*d9be183bSDerald D. Woods <1 IRQ_TYPE_NONE>; /* termcount */ 66*d9be183bSDerald D. Woods linux,mtd-name= "micron,mt29f2g16abdhc"; 67*d9be183bSDerald D. Woods nand-bus-width = <16>; 68*d9be183bSDerald D. Woods gpmc,device-width = <2>; 69*d9be183bSDerald D. Woods ti,nand-ecc-opt = "bch8"; 70*d9be183bSDerald D. Woods 71*d9be183bSDerald D. Woods gpmc,sync-clk-ps = <0>; 72*d9be183bSDerald D. Woods gpmc,cs-on-ns = <0>; 73*d9be183bSDerald D. Woods gpmc,cs-rd-off-ns = <44>; 74*d9be183bSDerald D. Woods gpmc,cs-wr-off-ns = <44>; 75*d9be183bSDerald D. Woods gpmc,adv-on-ns = <6>; 76*d9be183bSDerald D. Woods gpmc,adv-rd-off-ns = <34>; 77*d9be183bSDerald D. Woods gpmc,adv-wr-off-ns = <44>; 78*d9be183bSDerald D. Woods gpmc,we-off-ns = <40>; 79*d9be183bSDerald D. Woods gpmc,oe-off-ns = <54>; 80*d9be183bSDerald D. Woods gpmc,access-ns = <64>; 81*d9be183bSDerald D. Woods gpmc,rd-cycle-ns = <82>; 82*d9be183bSDerald D. Woods gpmc,wr-cycle-ns = <82>; 83*d9be183bSDerald D. Woods gpmc,wr-access-ns = <40>; 84*d9be183bSDerald D. Woods gpmc,wr-data-mux-bus-ns = <0>; 85*d9be183bSDerald D. Woods 86*d9be183bSDerald D. Woods #address-cells = <1>; 87*d9be183bSDerald D. Woods #size-cells = <1>; 88*d9be183bSDerald D. Woods }; 89*d9be183bSDerald D. Woods}; 90