1/*
2 * Copyright (C) 2018 MediaTek Inc.
3 * Author: Ryder Lee <ryder.lee@mediatek.com>
4 *
5 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 */
7
8/dts-v1/;
9#include "mt7623.dtsi"
10
11/ {
12	model = "Bananapi BPI-R2";
13	compatible = "bananapi,bpi-r2", "mediatek,mt7623";
14
15	chosen {
16		stdout-path = &uart2;
17		tick-timer = &timer0;
18	};
19
20	reg_1p8v: regulator-1p8v {
21		compatible = "regulator-fixed";
22		regulator-name = "fixed-1.8V";
23		regulator-min-microvolt = <1800000>;
24		regulator-max-microvolt = <1800000>;
25		regulator-boot-on;
26		regulator-always-on;
27	};
28
29	reg_3p3v: regulator-3p3v {
30		compatible = "regulator-fixed";
31		regulator-name = "fixed-3.3V";
32		regulator-min-microvolt = <3300000>;
33		regulator-max-microvolt = <3300000>;
34		regulator-boot-on;
35		regulator-always-on;
36	};
37
38	reg_5v: regulator-5v {
39		compatible = "regulator-fixed";
40		regulator-name = "fixed-5V";
41		regulator-min-microvolt = <5000000>;
42		regulator-max-microvolt = <5000000>;
43		regulator-boot-on;
44		regulator-always-on;
45	};
46
47	leds {
48		compatible = "gpio-leds";
49
50		blue {
51			label = "bpi-r2:pio:blue";
52			gpios = <&gpio 241 GPIO_ACTIVE_HIGH>;
53			default-state = "off";
54		};
55
56		green {
57			label = "bpi-r2:pio:green";
58			gpios = <&gpio 240 GPIO_ACTIVE_HIGH>;
59			default-state = "off";
60		};
61
62		red {
63			label = "bpi-r2:pio:red";
64			gpios = <&gpio 239 GPIO_ACTIVE_HIGH>;
65			default-state = "off";
66		};
67	};
68};
69
70&mmc0 {
71	pinctrl-names = "default";
72	pinctrl-0 = <&mmc0_pins_default>;
73	status = "okay";
74	bus-width = <8>;
75	max-frequency = <50000000>;
76	cap-mmc-highspeed;
77	vmmc-supply = <&reg_3p3v>;
78	vqmmc-supply = <&reg_1p8v>;
79	non-removable;
80};
81
82&mmc1 {
83	pinctrl-names = "default";
84	pinctrl-0 = <&mmc1_pins_default>;
85	status = "okay";
86	bus-width = <4>;
87	max-frequency = <50000000>;
88	cap-sd-highspeed;
89	cd-gpios = <&gpio 261 GPIO_ACTIVE_LOW>;
90	vmmc-supply = <&reg_3p3v>;
91	vqmmc-supply = <&reg_3p3v>;
92};
93
94&pinctrl {
95	ephy_default: ephy_default {
96		mux {
97			function = "eth";
98			groups = "mdc_mdio", "ephy";
99		};
100
101		conf {
102			pins = "G2_TXEN", "G2_TXD0", "G2_TXD1", "G2_TXD2",
103			       "G2_TXD3", "G2_TXC", "G2_RXC", "G2_RXD0",
104			       "G2_RXD1", "G2_RXD2", "G2_RXD3", "G2_RXDV",
105			       "MDC", "MDIO";
106			drive-strength = <12>;
107			mediatek,tdsel = <5>;
108		};
109	};
110
111	mmc0_pins_default: mmc0default {
112		mux {
113			function = "msdc";
114			groups =  "msdc0";
115		};
116
117		conf-cmd-data {
118			pins = "MSDC0_CMD", "MSDC0_DAT0", "MSDC0_DAT1",
119			       "MSDC0_DAT2", "MSDC0_DAT3", "MSDC0_DAT4",
120			       "MSDC0_DAT5", "MSDC0_DAT6", "MSDC0_DAT7";
121			input-enable;
122			bias-pull-up;
123		};
124
125		conf-clk {
126			pins = "MSDC0_CLK";
127			bias-pull-down;
128		};
129
130		conf-rst {
131			pins = "MSDC0_RSTB";
132			bias-pull-up;
133		};
134	};
135
136	mmc1_pins_default: mmc1default {
137		mux {
138			function = "msdc";
139			groups =  "msdc1", "msdc1_wp_0";
140		};
141
142		conf-cmd-data {
143			pins = "MSDC1_DAT0", "MSDC1_DAT1", "MSDC1_DAT2",
144			       "MSDC1_DAT3", "MSDC1_DAT3", "MSDC1_CMD";
145			input-enable;
146			drive-strength = <4>;
147			bias-pull-up;
148		};
149
150		conf-clk {
151			pins = "MSDC1_CLK";
152			drive-strength = <4>;
153		};
154
155		conf-wp {
156			pins = "EINT7";
157			input-enable;
158			bias-pull-up;
159		};
160	};
161
162	uart0_pins_a: uart0-default {
163		mux {
164			function = "uart";
165			groups =  "uart0_0_txd_rxd";
166		};
167	};
168
169	uart1_pins_a: uart1-default {
170		mux {
171			function = "uart";
172			groups =  "uart1_0_txd_rxd";
173		};
174	};
175
176	uart2_pins_a: uart2-default {
177		mux {
178			function = "uart";
179			groups =  "uart2_0_txd_rxd";
180		};
181	};
182
183	uart2_pins_b: uart2-alt {
184		mux {
185			function = "uart";
186			groups =  "uart2_1_txd_rxd";
187		};
188	};
189};
190
191&uart0 {
192	pinctrl-names = "default";
193	pinctrl-0 = <&uart0_pins_a>;
194	status = "okay";
195};
196
197&uart1 {
198	pinctrl-names = "default";
199	pinctrl-0 = <&uart1_pins_a>;
200	status = "okay";
201};
202
203&uart2 {
204	pinctrl-names = "default";
205	pinctrl-0 = <&uart2_pins_a>;
206	status = "okay";
207};
208