1bfcef28aSBeniamino Galvani/*
2bfcef28aSBeniamino Galvani * Copyright (c) 2016 Andreas Färber
3bfcef28aSBeniamino Galvani * Copyright (c) 2016 BayLibre, Inc.
4bfcef28aSBeniamino Galvani * Author: Kevin Hilman <khilman@kernel.org>
5bfcef28aSBeniamino Galvani *
6bfcef28aSBeniamino Galvani * This file is dual-licensed: you can use it either under the terms
7bfcef28aSBeniamino Galvani * of the GPL or the X11 license, at your option. Note that this dual
8bfcef28aSBeniamino Galvani * licensing only applies to this file, and not this project as a
9bfcef28aSBeniamino Galvani * whole.
10bfcef28aSBeniamino Galvani *
11bfcef28aSBeniamino Galvani *  a) This library is free software; you can redistribute it and/or
12bfcef28aSBeniamino Galvani *     modify it under the terms of the GNU General Public License as
13bfcef28aSBeniamino Galvani *     published by the Free Software Foundation; either version 2 of the
14bfcef28aSBeniamino Galvani *     License, or (at your option) any later version.
15bfcef28aSBeniamino Galvani *
16bfcef28aSBeniamino Galvani *     This library is distributed in the hope that it will be useful,
17bfcef28aSBeniamino Galvani *     but WITHOUT ANY WARRANTY; without even the implied warranty of
18bfcef28aSBeniamino Galvani *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
19bfcef28aSBeniamino Galvani *     GNU General Public License for more details.
20bfcef28aSBeniamino Galvani *
21bfcef28aSBeniamino Galvani * Or, alternatively,
22bfcef28aSBeniamino Galvani *
23bfcef28aSBeniamino Galvani *  b) Permission is hereby granted, free of charge, to any person
24bfcef28aSBeniamino Galvani *     obtaining a copy of this software and associated documentation
25bfcef28aSBeniamino Galvani *     files (the "Software"), to deal in the Software without
26bfcef28aSBeniamino Galvani *     restriction, including without limitation the rights to use,
27bfcef28aSBeniamino Galvani *     copy, modify, merge, publish, distribute, sublicense, and/or
28bfcef28aSBeniamino Galvani *     sell copies of the Software, and to permit persons to whom the
29bfcef28aSBeniamino Galvani *     Software is furnished to do so, subject to the following
30bfcef28aSBeniamino Galvani *     conditions:
31bfcef28aSBeniamino Galvani *
32bfcef28aSBeniamino Galvani *     The above copyright notice and this permission notice shall be
33bfcef28aSBeniamino Galvani *     included in all copies or substantial portions of the Software.
34bfcef28aSBeniamino Galvani *
35bfcef28aSBeniamino Galvani *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
36bfcef28aSBeniamino Galvani *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
37bfcef28aSBeniamino Galvani *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
38bfcef28aSBeniamino Galvani *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
39bfcef28aSBeniamino Galvani *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
40bfcef28aSBeniamino Galvani *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
41bfcef28aSBeniamino Galvani *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
42bfcef28aSBeniamino Galvani *     OTHER DEALINGS IN THE SOFTWARE.
43bfcef28aSBeniamino Galvani */
44bfcef28aSBeniamino Galvani
45bfcef28aSBeniamino Galvani/dts-v1/;
46bfcef28aSBeniamino Galvani
47bfcef28aSBeniamino Galvani#include "meson-gxbb.dtsi"
48dd83840eSBeniamino Galvani#include <dt-bindings/gpio/gpio.h>
49bfcef28aSBeniamino Galvani
50bfcef28aSBeniamino Galvani/ {
51bfcef28aSBeniamino Galvani	compatible = "hardkernel,odroid-c2", "amlogic,meson-gxbb";
52bfcef28aSBeniamino Galvani	model = "Hardkernel ODROID-C2";
53bfcef28aSBeniamino Galvani
54bfcef28aSBeniamino Galvani	aliases {
55bfcef28aSBeniamino Galvani		serial0 = &uart_AO;
56bfcef28aSBeniamino Galvani	};
57bfcef28aSBeniamino Galvani
58bfcef28aSBeniamino Galvani	chosen {
59bfcef28aSBeniamino Galvani		stdout-path = "serial0:115200n8";
60bfcef28aSBeniamino Galvani	};
61bfcef28aSBeniamino Galvani
62bfcef28aSBeniamino Galvani	memory@0 {
63bfcef28aSBeniamino Galvani		device_type = "memory";
64bfcef28aSBeniamino Galvani		reg = <0x0 0x0 0x0 0x80000000>;
65bfcef28aSBeniamino Galvani	};
66dd83840eSBeniamino Galvani
67a3b02a1dSHeiner Kallweit	usb_otg_pwr: regulator-usb-pwrs {
68a3b02a1dSHeiner Kallweit		compatible = "regulator-fixed";
69a3b02a1dSHeiner Kallweit
70a3b02a1dSHeiner Kallweit		regulator-name = "USB_OTG_PWR";
71a3b02a1dSHeiner Kallweit
72a3b02a1dSHeiner Kallweit		regulator-min-microvolt = <5000000>;
73a3b02a1dSHeiner Kallweit		regulator-max-microvolt = <5000000>;
74a3b02a1dSHeiner Kallweit
75a3b02a1dSHeiner Kallweit		gpio = <&gpio_ao GPIOAO_5 GPIO_ACTIVE_HIGH>;
76a3b02a1dSHeiner Kallweit		enable-active-high;
77a3b02a1dSHeiner Kallweit	};
78a3b02a1dSHeiner Kallweit
79dd83840eSBeniamino Galvani	leds {
80dd83840eSBeniamino Galvani		compatible = "gpio-leds";
81dd83840eSBeniamino Galvani		blue {
82dd83840eSBeniamino Galvani			label = "c2:blue:alive";
83dd83840eSBeniamino Galvani			gpios = <&gpio_ao GPIOAO_13 GPIO_ACTIVE_LOW>;
84dd83840eSBeniamino Galvani			linux,default-trigger = "heartbeat";
85dd83840eSBeniamino Galvani			default-state = "off";
86dd83840eSBeniamino Galvani		};
87dd83840eSBeniamino Galvani	};
88a3b02a1dSHeiner Kallweit
89a3b02a1dSHeiner Kallweit	tflash_vdd: regulator-tflash_vdd {
90a3b02a1dSHeiner Kallweit		/*
91a3b02a1dSHeiner Kallweit		 * signal name from schematics: TFLASH_VDD_EN
92a3b02a1dSHeiner Kallweit		 */
93a3b02a1dSHeiner Kallweit		compatible = "regulator-fixed";
94a3b02a1dSHeiner Kallweit
95a3b02a1dSHeiner Kallweit		regulator-name = "TFLASH_VDD";
96a3b02a1dSHeiner Kallweit		regulator-min-microvolt = <3300000>;
97a3b02a1dSHeiner Kallweit		regulator-max-microvolt = <3300000>;
98a3b02a1dSHeiner Kallweit
99*4a63a75cSBeniamino Galvani		gpio = <&gpio GPIOY_12 GPIO_ACTIVE_HIGH>;
100a3b02a1dSHeiner Kallweit		enable-active-high;
101a3b02a1dSHeiner Kallweit	};
102a3b02a1dSHeiner Kallweit
103a3b02a1dSHeiner Kallweit	tf_io: gpio-regulator-tf_io {
104a3b02a1dSHeiner Kallweit		compatible = "regulator-gpio";
105a3b02a1dSHeiner Kallweit
106a3b02a1dSHeiner Kallweit		regulator-name = "TF_IO";
107a3b02a1dSHeiner Kallweit		regulator-min-microvolt = <1800000>;
108a3b02a1dSHeiner Kallweit		regulator-max-microvolt = <3300000>;
109a3b02a1dSHeiner Kallweit
110a3b02a1dSHeiner Kallweit		/*
111a3b02a1dSHeiner Kallweit		 * signal name from schematics: TF_3V3N_1V8_EN
112a3b02a1dSHeiner Kallweit		 */
113a3b02a1dSHeiner Kallweit		gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>;
114a3b02a1dSHeiner Kallweit		gpios-states = <0>;
115a3b02a1dSHeiner Kallweit
116a3b02a1dSHeiner Kallweit		states = <3300000 0
117a3b02a1dSHeiner Kallweit			  1800000 1>;
118a3b02a1dSHeiner Kallweit	};
119a3b02a1dSHeiner Kallweit
120a3b02a1dSHeiner Kallweit	vcc1v8: regulator-vcc1v8 {
121a3b02a1dSHeiner Kallweit		compatible = "regulator-fixed";
122a3b02a1dSHeiner Kallweit		regulator-name = "VCC1V8";
123a3b02a1dSHeiner Kallweit		regulator-min-microvolt = <1800000>;
124a3b02a1dSHeiner Kallweit		regulator-max-microvolt = <1800000>;
125a3b02a1dSHeiner Kallweit	};
126a3b02a1dSHeiner Kallweit
127a3b02a1dSHeiner Kallweit	vcc3v3: regulator-vcc3v3 {
128a3b02a1dSHeiner Kallweit		compatible = "regulator-fixed";
129a3b02a1dSHeiner Kallweit		regulator-name = "VCC3V3";
130a3b02a1dSHeiner Kallweit		regulator-min-microvolt = <3300000>;
131a3b02a1dSHeiner Kallweit		regulator-max-microvolt = <3300000>;
132a3b02a1dSHeiner Kallweit	};
133a3b02a1dSHeiner Kallweit
134a3b02a1dSHeiner Kallweit	emmc_pwrseq: emmc-pwrseq {
135a3b02a1dSHeiner Kallweit		compatible = "mmc-pwrseq-emmc";
136a3b02a1dSHeiner Kallweit		reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
137a3b02a1dSHeiner Kallweit	};
138a3b02a1dSHeiner Kallweit};
139a3b02a1dSHeiner Kallweit
140a3b02a1dSHeiner Kallweit&scpi_clocks {
141a3b02a1dSHeiner Kallweit	status = "disabled";
142bfcef28aSBeniamino Galvani};
143bfcef28aSBeniamino Galvani
144bfcef28aSBeniamino Galvani&uart_AO {
145bfcef28aSBeniamino Galvani	status = "okay";
146dd83840eSBeniamino Galvani	pinctrl-0 = <&uart_ao_a_pins>;
147dd83840eSBeniamino Galvani	pinctrl-names = "default";
148dd83840eSBeniamino Galvani};
149dd83840eSBeniamino Galvani
150dd83840eSBeniamino Galvani&ethmac {
151dd83840eSBeniamino Galvani	status = "okay";
152a3b02a1dSHeiner Kallweit	pinctrl-0 = <&eth_rgmii_pins>;
153dd83840eSBeniamino Galvani	pinctrl-names = "default";
154a3b02a1dSHeiner Kallweit	phy-handle = <&eth_phy0>;
155*4a63a75cSBeniamino Galvani	phy-mode = "rgmii";
156*4a63a75cSBeniamino Galvani
157*4a63a75cSBeniamino Galvani	snps,reset-gpio = <&gpio GPIOZ_14 0>;
158*4a63a75cSBeniamino Galvani	snps,reset-delays-us = <0 10000 1000000>;
159*4a63a75cSBeniamino Galvani	snps,reset-active-low;
160*4a63a75cSBeniamino Galvani
161*4a63a75cSBeniamino Galvani	amlogic,tx-delay-ns = <2>;
162a3b02a1dSHeiner Kallweit
163a3b02a1dSHeiner Kallweit	mdio {
164a3b02a1dSHeiner Kallweit		compatible = "snps,dwmac-mdio";
165a3b02a1dSHeiner Kallweit		#address-cells = <1>;
166a3b02a1dSHeiner Kallweit		#size-cells = <0>;
167a3b02a1dSHeiner Kallweit
168a3b02a1dSHeiner Kallweit		eth_phy0: ethernet-phy@0 {
169a3b02a1dSHeiner Kallweit			reg = <0>;
170a3b02a1dSHeiner Kallweit			eee-broken-1000t;
171a3b02a1dSHeiner Kallweit		};
172a3b02a1dSHeiner Kallweit	};
173a3b02a1dSHeiner Kallweit};
174a3b02a1dSHeiner Kallweit
175*4a63a75cSBeniamino Galvani&pinctrl_aobus {
176*4a63a75cSBeniamino Galvani	gpio-line-names = "UART TX", "UART RX", "VCCK En", "TF 3V3/1V8 En",
177*4a63a75cSBeniamino Galvani			  "USB HUB nRESET", "USB OTG Power En",
178*4a63a75cSBeniamino Galvani			  "J7 Header Pin2", "IR In", "J7 Header Pin4",
179*4a63a75cSBeniamino Galvani			  "J7 Header Pin6", "J7 Header Pin5", "J7 Header Pin7",
180*4a63a75cSBeniamino Galvani			  "HDMI CEC", "SYS LED";
181*4a63a75cSBeniamino Galvani};
182*4a63a75cSBeniamino Galvani
183*4a63a75cSBeniamino Galvani&pinctrl_periphs {
184*4a63a75cSBeniamino Galvani	gpio-line-names = /* Bank GPIOZ */
185*4a63a75cSBeniamino Galvani			  "Eth MDIO", "Eth MDC", "Eth RGMII RX Clk",
186*4a63a75cSBeniamino Galvani			  "Eth RX DV", "Eth RX D0", "Eth RX D1", "Eth RX D2",
187*4a63a75cSBeniamino Galvani			  "Eth RX D3", "Eth RGMII TX Clk", "Eth TX En",
188*4a63a75cSBeniamino Galvani			  "Eth TX D0", "Eth TX D1", "Eth TX D2", "Eth TX D3",
189*4a63a75cSBeniamino Galvani			  "Eth PHY nRESET", "Eth PHY Intc",
190*4a63a75cSBeniamino Galvani			  /* Bank GPIOH */
191*4a63a75cSBeniamino Galvani			  "HDMI HPD", "HDMI DDC SDA", "HDMI DDC SCL", "",
192*4a63a75cSBeniamino Galvani			  /* Bank BOOT */
193*4a63a75cSBeniamino Galvani			  "eMMC D0", "eMMC D1", "eMMC D2", "eMMC D3", "eMMC D4",
194*4a63a75cSBeniamino Galvani			  "eMMC D5", "eMMC D6", "eMMC D7", "eMMC Clk",
195*4a63a75cSBeniamino Galvani			  "eMMC Reset", "eMMC CMD",
196*4a63a75cSBeniamino Galvani			  "", "", "", "", "", "", "",
197*4a63a75cSBeniamino Galvani			  /* Bank CARD */
198*4a63a75cSBeniamino Galvani			  "SDCard D1", "SDCard D0", "SDCard CLK", "SDCard CMD",
199*4a63a75cSBeniamino Galvani			  "SDCard D3", "SDCard D2", "SDCard Det",
200*4a63a75cSBeniamino Galvani			  /* Bank GPIODV */
201*4a63a75cSBeniamino Galvani			  "", "", "", "", "", "", "", "", "", "", "", "", "",
202*4a63a75cSBeniamino Galvani			  "", "", "", "", "", "", "", "", "", "", "",
203*4a63a75cSBeniamino Galvani			  "I2C A SDA", "I2C A SCK", "I2C B SDA", "I2C B SCK",
204*4a63a75cSBeniamino Galvani			  "PWM D", "PWM B",
205*4a63a75cSBeniamino Galvani			  /* Bank GPIOY */
206*4a63a75cSBeniamino Galvani			  "Revision Bit0", "Revision Bit1", "",
207*4a63a75cSBeniamino Galvani			  "J2 Header Pin35", "", "", "", "J2 Header Pin36",
208*4a63a75cSBeniamino Galvani			  "J2 Header Pin31", "", "", "", "TF VDD En",
209*4a63a75cSBeniamino Galvani			  "J2 Header Pin32", "J2 Header Pin26", "", "",
210*4a63a75cSBeniamino Galvani			  /* Bank GPIOX */
211*4a63a75cSBeniamino Galvani			  "J2 Header Pin29", "J2 Header Pin24",
212*4a63a75cSBeniamino Galvani			  "J2 Header Pin23", "J2 Header Pin22",
213*4a63a75cSBeniamino Galvani			  "J2 Header Pin21", "J2 Header Pin18",
214*4a63a75cSBeniamino Galvani			  "J2 Header Pin33", "J2 Header Pin19",
215*4a63a75cSBeniamino Galvani			  "J2 Header Pin16", "J2 Header Pin15",
216*4a63a75cSBeniamino Galvani			  "J2 Header Pin12", "J2 Header Pin13",
217*4a63a75cSBeniamino Galvani			  "J2 Header Pin8", "J2 Header Pin10",
218*4a63a75cSBeniamino Galvani			  "", "", "", "", "",
219*4a63a75cSBeniamino Galvani			  "J2 Header Pin11", "", "J2 Header Pin7",
220*4a63a75cSBeniamino Galvani			  /* Bank GPIOCLK */
221*4a63a75cSBeniamino Galvani			  "", "", "", "",
222*4a63a75cSBeniamino Galvani			  /* GPIO_TEST_N */
223*4a63a75cSBeniamino Galvani			  "";
224*4a63a75cSBeniamino Galvani};
225*4a63a75cSBeniamino Galvani
226a3b02a1dSHeiner Kallweit&ir {
227a3b02a1dSHeiner Kallweit	status = "okay";
228a3b02a1dSHeiner Kallweit	pinctrl-0 = <&remote_input_ao_pins>;
229a3b02a1dSHeiner Kallweit	pinctrl-names = "default";
230a3b02a1dSHeiner Kallweit};
231a3b02a1dSHeiner Kallweit
232a3b02a1dSHeiner Kallweit&i2c_A {
233a3b02a1dSHeiner Kallweit	status = "okay";
234a3b02a1dSHeiner Kallweit	pinctrl-0 = <&i2c_a_pins>;
235a3b02a1dSHeiner Kallweit	pinctrl-names = "default";
236a3b02a1dSHeiner Kallweit};
237a3b02a1dSHeiner Kallweit
238*4a63a75cSBeniamino Galvani&gpio_ao {
239*4a63a75cSBeniamino Galvani	/*
240*4a63a75cSBeniamino Galvani	 * WARNING: The USB Hub on the Odroid-C2 needs a reset signal
241*4a63a75cSBeniamino Galvani	 * to be turned high in order to be detected by the USB Controller
242*4a63a75cSBeniamino Galvani	 * This signal should be handled by a USB specific power sequence
243*4a63a75cSBeniamino Galvani	 * in order to reset the Hub when USB bus is powered down.
244*4a63a75cSBeniamino Galvani	 */
245*4a63a75cSBeniamino Galvani	usb-hub {
246*4a63a75cSBeniamino Galvani		gpio-hog;
247*4a63a75cSBeniamino Galvani		gpios = <GPIOAO_4 GPIO_ACTIVE_HIGH>;
248*4a63a75cSBeniamino Galvani		output-high;
249*4a63a75cSBeniamino Galvani		line-name = "usb-hub-reset";
250*4a63a75cSBeniamino Galvani	};
251*4a63a75cSBeniamino Galvani};
252*4a63a75cSBeniamino Galvani
253a3b02a1dSHeiner Kallweit&usb0_phy {
254a3b02a1dSHeiner Kallweit	status = "okay";
255a3b02a1dSHeiner Kallweit	phy-supply = <&usb_otg_pwr>;
256a3b02a1dSHeiner Kallweit};
257a3b02a1dSHeiner Kallweit
258a3b02a1dSHeiner Kallweit&usb1_phy {
259a3b02a1dSHeiner Kallweit	status = "okay";
260a3b02a1dSHeiner Kallweit};
261a3b02a1dSHeiner Kallweit
262a3b02a1dSHeiner Kallweit&usb0 {
263a3b02a1dSHeiner Kallweit	status = "okay";
264a3b02a1dSHeiner Kallweit};
265a3b02a1dSHeiner Kallweit
266a3b02a1dSHeiner Kallweit&usb1 {
267a3b02a1dSHeiner Kallweit	status = "okay";
268a3b02a1dSHeiner Kallweit};
269a3b02a1dSHeiner Kallweit
270*4a63a75cSBeniamino Galvani&saradc {
271*4a63a75cSBeniamino Galvani	status = "okay";
272*4a63a75cSBeniamino Galvani	vref-supply = <&vcc1v8>;
273*4a63a75cSBeniamino Galvani};
274*4a63a75cSBeniamino Galvani
275a3b02a1dSHeiner Kallweit/* SD */
276a3b02a1dSHeiner Kallweit&sd_emmc_b {
277a3b02a1dSHeiner Kallweit	status = "okay";
278a3b02a1dSHeiner Kallweit	pinctrl-0 = <&sdcard_pins>;
279a3b02a1dSHeiner Kallweit	pinctrl-names = "default";
280a3b02a1dSHeiner Kallweit
281a3b02a1dSHeiner Kallweit	bus-width = <4>;
282a3b02a1dSHeiner Kallweit	cap-sd-highspeed;
283a3b02a1dSHeiner Kallweit	max-frequency = <100000000>;
284a3b02a1dSHeiner Kallweit	disable-wp;
285a3b02a1dSHeiner Kallweit
286a3b02a1dSHeiner Kallweit	cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_HIGH>;
287a3b02a1dSHeiner Kallweit	cd-inverted;
288a3b02a1dSHeiner Kallweit
289a3b02a1dSHeiner Kallweit	vmmc-supply = <&tflash_vdd>;
290a3b02a1dSHeiner Kallweit	vqmmc-supply = <&tf_io>;
291a3b02a1dSHeiner Kallweit};
292a3b02a1dSHeiner Kallweit
293a3b02a1dSHeiner Kallweit/* eMMC */
294a3b02a1dSHeiner Kallweit&sd_emmc_c {
295a3b02a1dSHeiner Kallweit	status = "okay";
296a3b02a1dSHeiner Kallweit	pinctrl-0 = <&emmc_pins>;
297a3b02a1dSHeiner Kallweit	pinctrl-names = "default";
298a3b02a1dSHeiner Kallweit
299a3b02a1dSHeiner Kallweit	bus-width = <8>;
300a3b02a1dSHeiner Kallweit	cap-sd-highspeed;
301a3b02a1dSHeiner Kallweit	max-frequency = <200000000>;
302a3b02a1dSHeiner Kallweit	non-removable;
303a3b02a1dSHeiner Kallweit	disable-wp;
304a3b02a1dSHeiner Kallweit	cap-mmc-highspeed;
305a3b02a1dSHeiner Kallweit	mmc-ddr-1_8v;
306a3b02a1dSHeiner Kallweit	mmc-hs200-1_8v;
307a3b02a1dSHeiner Kallweit
308a3b02a1dSHeiner Kallweit	mmc-pwrseq = <&emmc_pwrseq>;
309a3b02a1dSHeiner Kallweit	vmmc-supply = <&vcc3v3>;
310a3b02a1dSHeiner Kallweit	vqmmc-supply = <&vcc1v8>;
311bfcef28aSBeniamino Galvani};
312