1// SPDX-License-Identifier: GPL-2.0+ 2/* 3 * Freescale ls1021a TWR board common device tree source 4 * 5 * Copyright 2013-2015 Freescale Semiconductor, Inc. 6 */ 7 8#include "ls1021a.dtsi" 9 10/ { 11 model = "LS1021A TWR Board"; 12 13 aliases { 14 enet2-rgmii-phy = &rgmii_phy1; 15 enet0-sgmii-phy = &sgmii_phy2; 16 enet1-sgmii-phy = &sgmii_phy0; 17 spi0 = &qspi; 18 spi1 = &dspi1; 19 }; 20 21 chosen { 22 stdout-path = &uart0; 23 }; 24}; 25 26&qspi { 27 bus-num = <0>; 28 status = "okay"; 29 30 qflash0: n25q128a13@0 { 31 #address-cells = <1>; 32 #size-cells = <1>; 33 compatible = "spi-flash"; 34 spi-max-frequency = <20000000>; 35 reg = <0>; 36 }; 37}; 38 39&dspi1 { 40 bus-num = <0>; 41 status = "okay"; 42 43 dspiflash: at26df081a@0 { 44 #address-cells = <1>; 45 #size-cells = <1>; 46 compatible = "spi-flash"; 47 spi-max-frequency = <16000000>; 48 spi-cpol; 49 spi-cpha; 50 reg = <0>; 51 }; 52}; 53 54&i2c0 { 55 status = "okay"; 56}; 57 58&i2c1 { 59 status = "okay"; 60}; 61 62&ifc { 63 #address-cells = <2>; 64 #size-cells = <1>; 65 /* NOR Flash on board */ 66 ranges = <0x0 0x0 0x60000000 0x08000000>; 67 status = "okay"; 68 69 nor@0,0 { 70 #address-cells = <1>; 71 #size-cells = <1>; 72 compatible = "cfi-flash"; 73 reg = <0x0 0x0 0x8000000>; 74 bank-width = <2>; 75 device-width = <1>; 76 }; 77}; 78 79&lpuart0 { 80 status = "okay"; 81}; 82 83&mdio0 { 84 sgmii_phy0: ethernet-phy@0 { 85 reg = <0x0>; 86 }; 87 rgmii_phy1: ethernet-phy@1 { 88 reg = <0x1>; 89 }; 90 sgmii_phy2: ethernet-phy@2 { 91 reg = <0x2>; 92 }; 93 tbi1: tbi-phy@1f { 94 reg = <0x1f>; 95 device_type = "tbi-phy"; 96 }; 97}; 98 99&uart0 { 100 status = "okay"; 101}; 102 103&uart1 { 104 status = "okay"; 105}; 106 107&sata { 108 status = "okay"; 109}; 110