1/* 2 * This program is free software; you can redistribute it and/or modify 3 * it under the terms of the GNU General Public License version 2 as 4 * published by the Free Software Foundation. 5 */ 6 7#include <dt-bindings/input/input.h> 8 9/ { 10 cpus { 11 cpu@0 { 12 cpu0-supply = <&vcc>; 13 }; 14 }; 15 16 memory@80000000 { 17 device_type = "memory"; 18 reg = <0x80000000 0>; 19 }; 20 21 wl12xx_vmmc: wl12xx_vmmc { 22 compatible = "regulator-fixed"; 23 regulator-name = "vwl1271"; 24 regulator-min-microvolt = <1800000>; 25 regulator-max-microvolt = <1800000>; 26 gpio = <&gpio1 3 0>; /* gpio_3 */ 27 startup-delay-us = <70000>; 28 enable-active-high; 29 vin-supply = <&vmmc2>; 30 }; 31 32 /* HS USB Host PHY on PORT 1 */ 33 hsusb2_phy: hsusb2_phy { 34 compatible = "usb-nop-xceiv"; 35 reset-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; /* gpio_4 */ 36 }; 37}; 38 39&gpmc { 40 ranges = <0 0 0x00000000 0x1000000>; /* CS0: 16MB for NAND */ 41 42 nand@0,0 { 43 compatible = "ti,omap2-nand"; 44 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */ 45 interrupt-parent = <&gpmc>; 46 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */ 47 <1 IRQ_TYPE_NONE>; /* termcount */ 48 linux,mtd-name = "micron,mt29f4g16abbda3w"; 49 nand-bus-width = <16>; 50 ti,nand-ecc-opt = "bch8"; 51 rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */ 52 gpmc,sync-clk-ps = <0>; 53 gpmc,cs-on-ns = <0>; 54 gpmc,cs-rd-off-ns = <44>; 55 gpmc,cs-wr-off-ns = <44>; 56 gpmc,adv-on-ns = <6>; 57 gpmc,adv-rd-off-ns = <34>; 58 gpmc,adv-wr-off-ns = <44>; 59 gpmc,we-off-ns = <40>; 60 gpmc,oe-off-ns = <54>; 61 gpmc,access-ns = <64>; 62 gpmc,rd-cycle-ns = <82>; 63 gpmc,wr-cycle-ns = <82>; 64 gpmc,wr-access-ns = <40>; 65 gpmc,wr-data-mux-bus-ns = <0>; 66 gpmc,device-width = <2>; 67 #address-cells = <1>; 68 #size-cells = <1>; 69 70 /* u-boot uses mtdparts=omap2-nand.0:512k(x-loader),1920k(u-boot),128k(u-boot-env),4m(kernel),-(fs) */ 71 72 x-loader@0 { 73 label = "x-loader"; 74 reg = <0 0x80000>; 75 }; 76 77 bootloaders@80000 { 78 label = "u-boot"; 79 reg = <0x80000 0x1e0000>; 80 }; 81 82 bootloaders_env@260000 { 83 label = "u-boot-env"; 84 reg = <0x260000 0x20000>; 85 }; 86 87 kernel@280000 { 88 label = "kernel"; 89 reg = <0x280000 0x400000>; 90 }; 91 92 filesystem@680000 { 93 label = "fs"; 94 reg = <0x680000 0>; /* 0 = MTDPART_SIZ_FULL */ 95 }; 96 }; 97}; 98 99&i2c1 { 100 clock-frequency = <400000>; 101 102 twl: twl@48 { 103 reg = <0x48>; 104 interrupts = <7>; /* SYS_NIRQ cascaded to intc */ 105 interrupt-parent = <&intc>; 106 twl_audio: audio { 107 compatible = "ti,twl4030-audio"; 108 codec { 109 }; 110 }; 111 }; 112}; 113 114&i2c2 { 115 clock-frequency = <400000>; 116}; 117 118&i2c3 { 119 clock-frequency = <400000>; 120}; 121 122&mmc3 { 123 interrupts-extended = <&intc 94 &omap3_pmx_core2 0x46>; 124 pinctrl-0 = <&mmc3_pins>; 125 pinctrl-names = "default"; 126 vmmc-supply = <&wl12xx_vmmc>; 127 non-removable; 128 bus-width = <4>; 129 cap-power-off-card; 130 #address-cells = <1>; 131 #size-cells = <0>; 132 wlcore: wlcore@2 { 133 compatible = "ti,wl1273"; 134 reg = <2>; 135 interrupt-parent = <&gpio5>; 136 interrupts = <24 IRQ_TYPE_LEVEL_HIGH>; /* gpio 152 */ 137 ref-clock-frequency = <26000000>; 138 }; 139}; 140 141&usbhshost { 142 port2-mode = "ehci-phy"; 143}; 144 145&usbhsehci { 146 phys = <0 &hsusb2_phy>; 147}; 148 149 150&omap3_pmx_core { 151 pinctrl-names = "default"; 152 pinctrl-0 = <&hsusb2_pins>; 153 154 mmc3_pins: pinmux_mm3_pins { 155 pinctrl-single,pins = < 156 OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat4.sdmmc3_dat0 */ 157 OMAP3_CORE1_IOPAD(0x2166, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat5.sdmmc3_dat1 */ 158 OMAP3_CORE1_IOPAD(0x2168, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat6.sdmmc3_dat2 */ 159 OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat6.sdmmc3_dat3 */ 160 OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT_PULLUP | MUX_MODE4) /* mcbsp4_clkx.gpio_152 */ 161 OMAP3_CORE1_IOPAD(0x2a0c, PIN_OUTPUT | MUX_MODE4) /* sys_boot1.gpio_3 */ 162 OMAP3_CORE1_IOPAD(0x21d0, PIN_INPUT_PULLUP | MUX_MODE3) /* mcspi1_cs1.sdmmc3_cmd */ 163 OMAP3_CORE1_IOPAD(0x21d2, PIN_INPUT_PULLUP | MUX_MODE3) /* mcspi1_cs2.sdmmc_clk */ 164 >; 165 }; 166 mcbsp2_pins: pinmux_mcbsp2_pins { 167 pinctrl-single,pins = < 168 OMAP3_CORE1_IOPAD(0x213c, PIN_INPUT | MUX_MODE0) /* mcbsp2_fsx */ 169 OMAP3_CORE1_IOPAD(0x213e, PIN_INPUT | MUX_MODE0) /* mcbsp2_clkx */ 170 OMAP3_CORE1_IOPAD(0x2140, PIN_INPUT | MUX_MODE0) /* mcbsp2_dr */ 171 OMAP3_CORE1_IOPAD(0x2142, PIN_OUTPUT | MUX_MODE0) /* mcbsp2_dx */ 172 >; 173 }; 174 uart2_pins: pinmux_uart2_pins { 175 pinctrl-single,pins = < 176 OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT | MUX_MODE0) /* uart2_cts.uart2_cts */ 177 OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0) /* uart2_rts .uart2_rts*/ 178 OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */ 179 OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */ 180 OMAP3_CORE1_IOPAD(0x2198, PIN_OUTPUT | MUX_MODE4) /* GPIO_162,BT_EN */ 181 >; 182 }; 183 mcspi1_pins: pinmux_mcspi1_pins { 184 pinctrl-single,pins = < 185 OMAP3_CORE1_IOPAD(0x21c8, PIN_INPUT | MUX_MODE0) /* mcspi1_clk.mcspi1_clk */ 186 OMAP3_CORE1_IOPAD(0x21ca, PIN_OUTPUT | MUX_MODE0) /* mcspi1_simo.mcspi1_simo */ 187 OMAP3_CORE1_IOPAD(0x21cc, PIN_INPUT_PULLUP | MUX_MODE0) /* mcspi1_somi.mcspi1_somi */ 188 OMAP3_CORE1_IOPAD(0x21ce, PIN_OUTPUT | MUX_MODE0) /* mcspi1_cs0.mcspi1_cs0 */ 189 >; 190 }; 191 192 hsusb2_pins: pinmux_hsusb2_pins { 193 pinctrl-single,pins = < 194 OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi1_cs3.hsusb2_data2 */ 195 OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_clk.hsusb2_data7 */ 196 OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_simo.hsusb2_data4 */ 197 OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_somi.hsusb2_data5 */ 198 OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs0.hsusb2_data6 */ 199 OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs1.hsusb2_data3 */ 200 >; 201 }; 202 203 hsusb_otg_pins: pinmux_hsusb_otg_pins { 204 pinctrl-single,pins = < 205 OMAP3_CORE1_IOPAD(0x21a2, PIN_INPUT | MUX_MODE0) /* hsusb0_clk.hsusb0_clk */ 206 OMAP3_CORE1_IOPAD(0x21a4, PIN_OUTPUT | MUX_MODE0) /* hsusb0_stp.hsusb0_stp */ 207 OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT | MUX_MODE0) /* hsusb0_dir.hsusb0_dir */ 208 OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT | MUX_MODE0) /* hsusb0_nxt.hsusb0_nxt */ 209 OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT | MUX_MODE0) /* hsusb0_data0.hsusb0_data0 */ 210 OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT | MUX_MODE0) /* hsusb0_data1.hsusb0_data1 */ 211 OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT | MUX_MODE0) /* hsusb0_data2.hsusb0_data2 */ 212 OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT | MUX_MODE0) /* hsusb0_data3.hsusb0_data3 */ 213 OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT | MUX_MODE0) /* hsusb0_data4.hsusb0_data4 */ 214 OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT | MUX_MODE0) /* hsusb0_data5.hsusb0_data5 */ 215 OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT | MUX_MODE0) /* hsusb0_data6.hsusb0_data6 */ 216 OMAP3_CORE1_IOPAD(0x21b8, PIN_INPUT | MUX_MODE0) /* hsusb0_data7.hsusb0_data7 */ 217 >; 218 }; 219 220 221}; 222 223&omap3_pmx_wkup { 224 pinctrl-names = "default"; 225 pinctrl-0 = <&hsusb2_reset_pin>; 226 hsusb2_reset_pin: pinmux_hsusb1_reset_pin { 227 pinctrl-single,pins = < 228 OMAP3_WKUP_IOPAD(0x2a0e, PIN_OUTPUT | MUX_MODE4) /* sys_boot2.gpio_4 */ 229 >; 230 }; 231}; 232 233&omap3_pmx_core2 { 234 pinctrl-names = "default"; 235 pinctrl-0 = <&hsusb2_2_pins>; 236 hsusb2_2_pins: pinmux_hsusb2_2_pins { 237 pinctrl-single,pins = < 238 OMAP3630_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3) /* etk_d10.hsusb2_clk */ 239 OMAP3630_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3) /* etk_d11.hsusb2_stp */ 240 OMAP3630_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d12.hsusb2_dir */ 241 OMAP3630_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d13.hsusb2_nxt */ 242 OMAP3630_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d14.hsusb2_data0 */ 243 OMAP3630_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d15.hsusb2_data1 */ 244 >; 245 }; 246}; 247 248&uart2 { 249 interrupts-extended = <&intc 73 &omap3_pmx_core OMAP3_UART2_RX>; 250 pinctrl-names = "default"; 251 pinctrl-0 = <&uart2_pins>; 252}; 253 254&mcspi1 { 255 pinctrl-names = "default"; 256 pinctrl-0 = <&mcspi1_pins>; 257}; 258 259#include "twl4030.dtsi" 260#include "twl4030_omap3.dtsi" 261 262&twl { 263 twl_power: power { 264 compatible = "ti,twl4030-power-idle-osc-off", "ti,twl4030-power-idle"; 265 ti,use_poweroff; 266 }; 267}; 268 269&twl_gpio { 270 ti,use-leds; 271}; 272