xref: /openbmc/u-boot/arch/arm/dts/keystone-k2g.dtsi (revision baefb63a)
1/*
2 * Copyright 2014 Texas Instruments, Inc.
3 *
4 * Device Tree Source for K2G SOC
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <dt-bindings/interrupt-controller/arm-gic.h>
12
13/ {
14	model = "Texas Instruments K2G SoC";
15	#address-cells = <1>;
16	#size-cells = <1>;
17	interrupt-parent = <&gic>;
18
19	chosen { };
20
21	aliases {
22		serial0	= &uart0;
23		spi0 = &spi0;
24		spi1 = &spi1;
25		spi2 = &spi2;
26		spi3 = &spi3;
27		spi4 = &qspi;
28		i2c0 = &i2c0;
29		i2c1 = &i2c1;
30		i2c2 = &i2c2;
31	};
32
33	cpus {
34		#address-cells = <1>;
35		#size-cells = <0>;
36
37		interrupt-parent = <&gic>;
38
39		cpu@0 {
40			compatible = "arm,cortex-a15";
41			device_type = "cpu";
42			reg = <0>;
43		};
44	};
45
46	gic: interrupt-controller {
47		compatible = "arm,cortex-a15-gic";
48		#interrupt-cells = <3>;
49		interrupt-controller;
50		reg = <0x0 0x02561000 0x0 0x1000>,
51		      <0x0 0x02562000 0x0 0x2000>,
52		      <0x0 0x02564000 0x0 0x1000>,
53		      <0x0 0x02566000 0x0 0x2000>;
54		interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
55				IRQ_TYPE_LEVEL_HIGH)>;
56	};
57
58	soc {
59		#address-cells = <1>;
60		#size-cells = <1>;
61		compatible = "ti,keystone","simple-bus";
62		interrupt-parent = <&gic>;
63		ranges;
64
65		uart0: serial@02530c00 {
66			compatible = "ns16550a";
67			current-speed = <115200>;
68			reg-shift = <2>;
69			reg-io-width = <4>;
70			reg = <0x02530c00 0x100>;
71			clock-names = "uart";
72			interrupts = <GIC_SPI 164 IRQ_TYPE_EDGE_RISING>;
73		};
74
75		mdio: mdio@4200f00 {
76			compatible	= "ti,keystone_mdio", "ti,davinci_mdio";
77			#address-cells = <1>;
78			#size-cells = <0>;
79			/* power-domains = <&k2g_pds K2G_DEV_NSS0>; */
80			/* clocks = <&k2g_clks K2G_DEV_NSS0 K2G_DEV_NSS_ESW_CLK>; */
81			clock-names = "fck";
82			reg = <0x04200f00 0x100>;
83			status = "disabled";
84			bus_freq = <2500000>;
85		};
86
87		qspi: qspi@2940000 {
88			compatible =  "cadence,qspi";
89			#address-cells = <1>;
90			#size-cells = <0>;
91			reg = <0x02940000 0x1000>,
92			      <0x24000000 0x4000000>;
93			interrupts = <GIC_SPI 198 IRQ_TYPE_EDGE_RISING>;
94			num-cs = <4>;
95			fifo-depth = <256>;
96			sram-size = <256>;
97			status = "disabled";
98		};
99
100		#include "keystone-k2g-netcp.dtsi"
101
102		pmmc: pmmc@2900000 {
103			compatible = "ti,power-processor";
104			reg = <0x02900000 0x40000>;
105			ti,lpsc_module = <1>;
106		};
107
108		spi0: spi@21805400 {
109			compatible = "ti,keystone-spi", "ti,dm6441-spi";
110			reg = <0x21805400 0x200>;
111			num-cs = <4>;
112			ti,davinci-spi-intr-line = <0>;
113			interrupts = <GIC_SPI 64 IRQ_TYPE_EDGE_RISING>;
114			#address-cells = <1>;
115			#size-cells = <0>;
116			status = "disabled";
117		};
118
119		spi1: spi@21805800 {
120			compatible = "ti,keystone-spi", "ti,dm6441-spi";
121			reg = <0x21805800 0x200>;
122			num-cs = <4>;
123			ti,davinci-spi-intr-line = <0>;
124			interrupts = <GIC_SPI 66 IRQ_TYPE_EDGE_RISING>;
125			#address-cells = <1>;
126			#size-cells = <0>;
127			status = "disabled";
128		};
129
130		spi2: spi@21805c00 {
131			compatible = "ti,keystone-spi", "ti,dm6441-spi";
132			reg = <0x21805C00 0x200>;
133			num-cs = <4>;
134			ti,davinci-spi-intr-line = <0>;
135			interrupts = <GIC_SPI 68 IRQ_TYPE_EDGE_RISING>;
136			#address-cells = <1>;
137			#size-cells = <0>;
138			status = "disabled";
139		};
140
141		spi3: spi@21806000 {
142			compatible = "ti,keystone-spi", "ti,dm6441-spi";
143			reg = <0x21806000 0x200>;
144			num-cs = <4>;
145			ti,davinci-spi-intr-line = <0>;
146			interrupts = <GIC_SPI 70 IRQ_TYPE_EDGE_RISING>;
147			#address-cells = <1>;
148			#size-cells = <0>;
149			status = "disabled";
150		};
151		i2c0: i2c@2530000 {
152			compatible = "ti,keystone-i2c";
153			reg = <0x02530000 0x400>;
154			clock-frequency = <100000>;
155			interrupts = <GIC_SPI 88 IRQ_TYPE_EDGE_RISING>;
156			#address-cells = <1>;
157			#size-cells = <0>;
158			status = "disabled";
159		};
160
161		i2c1: i2c@2530400 {
162			compatible = "ti,keystone-i2c";
163			reg = <0x02530400 0x400>;
164			clock-frequency = <100000>;
165			interrupts = <GIC_SPI 89 IRQ_TYPE_EDGE_RISING>;
166			#address-cells = <1>;
167			#size-cells = <0>;
168			status = "disabled";
169		};
170
171		i2c2: i2c@2530800 {
172			compatible = "ti,keystone-i2c";
173			reg = <0x02530800 0x400>;
174			clock-frequency = <100000>;
175			interrupts = <GIC_SPI 90 IRQ_TYPE_EDGE_RISING>;
176			#address-cells = <1>;
177			#size-cells = <0>;
178			status = "disabled";
179		};
180
181		mmc0: mmc@23000000 {
182			compatible = "ti,omap4-hsmmc";
183			reg = <0x23000000 0x400>;
184			interrupts = <GIC_SPI 96 IRQ_TYPE_EDGE_RISING>;
185			bus-width = <4>;
186			ti,needs-special-reset;
187			no-1-8-v;
188			max-frequency = <96000000>;
189			status = "disabled";
190		};
191
192		mmc1: mmc@23100000 {
193			compatible = "ti,omap4-hsmmc";
194			reg = <0x23100000 0x400>;
195			interrupts = <GIC_SPI 97 IRQ_TYPE_EDGE_RISING>;
196			bus-width = <8>;
197			ti,needs-special-reset;
198			ti,non-removable;
199			max-frequency = <96000000>;
200			status = "disabled";
201			clock-names = "fck";
202		};
203	};
204};
205