1/* 2 * Copyright 2014 Texas Instruments, Inc. 3 * 4 * Device Tree Source for K2G SOC 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 */ 10 11#include <dt-bindings/interrupt-controller/arm-gic.h> 12 13/ { 14 model = "Texas Instruments K2G SoC"; 15 #address-cells = <1>; 16 #size-cells = <1>; 17 interrupt-parent = <&gic>; 18 19 chosen { }; 20 21 aliases { 22 serial0 = &uart0; 23 spi0 = &spi0; 24 spi1 = &spi1; 25 spi2 = &spi2; 26 spi3 = &spi3; 27 spi4 = &qspi; 28 i2c0 = &i2c0; 29 i2c1 = &i2c1; 30 i2c2 = &i2c2; 31 }; 32 33 cpus { 34 #address-cells = <1>; 35 #size-cells = <0>; 36 37 interrupt-parent = <&gic>; 38 39 cpu@0 { 40 compatible = "arm,cortex-a15"; 41 device_type = "cpu"; 42 reg = <0>; 43 }; 44 }; 45 46 gic: interrupt-controller { 47 compatible = "arm,cortex-a15-gic"; 48 #interrupt-cells = <3>; 49 interrupt-controller; 50 reg = <0x0 0x02561000 0x0 0x1000>, 51 <0x0 0x02562000 0x0 0x2000>, 52 <0x0 0x02564000 0x0 0x1000>, 53 <0x0 0x02566000 0x0 0x2000>; 54 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | 55 IRQ_TYPE_LEVEL_HIGH)>; 56 }; 57 58 soc { 59 #address-cells = <1>; 60 #size-cells = <1>; 61 compatible = "ti,keystone","simple-bus"; 62 interrupt-parent = <&gic>; 63 ranges; 64 65 uart0: serial@02530c00 { 66 compatible = "ns16550a"; 67 current-speed = <115200>; 68 reg-shift = <2>; 69 reg-io-width = <4>; 70 reg = <0x02530c00 0x100>; 71 clock-names = "uart"; 72 interrupts = <GIC_SPI 164 IRQ_TYPE_EDGE_RISING>; 73 }; 74 75 mdio: mdio@4200f00 { 76 compatible = "ti,keystone_mdio", "ti,davinci_mdio"; 77 #address-cells = <1>; 78 #size-cells = <0>; 79 /* power-domains = <&k2g_pds K2G_DEV_NSS0>; */ 80 /* clocks = <&k2g_clks K2G_DEV_NSS0 K2G_DEV_NSS_ESW_CLK>; */ 81 clock-names = "fck"; 82 reg = <0x04200f00 0x100>; 83 status = "disabled"; 84 bus_freq = <2500000>; 85 }; 86 87 qspi: qspi@2940000 { 88 compatible = "cadence,qspi"; 89 #address-cells = <1>; 90 #size-cells = <0>; 91 reg = <0x02940000 0x1000>, 92 <0x24000000 0x4000000>; 93 interrupts = <GIC_SPI 198 IRQ_TYPE_EDGE_RISING>; 94 num-cs = <4>; 95 cdns,fifo-depth = <256>; 96 cdns,fifo-width = <4>; 97 cdns,trigger-address = <0x24000000>; 98 status = "disabled"; 99 }; 100 101 #include "keystone-k2g-netcp.dtsi" 102 103 pmmc: pmmc@2900000 { 104 compatible = "ti,power-processor"; 105 reg = <0x02900000 0x40000>; 106 ti,lpsc_module = <1>; 107 }; 108 109 spi0: spi@21805400 { 110 compatible = "ti,keystone-spi", "ti,dm6441-spi"; 111 reg = <0x21805400 0x200>; 112 num-cs = <4>; 113 ti,davinci-spi-intr-line = <0>; 114 interrupts = <GIC_SPI 64 IRQ_TYPE_EDGE_RISING>; 115 #address-cells = <1>; 116 #size-cells = <0>; 117 status = "disabled"; 118 }; 119 120 spi1: spi@21805800 { 121 compatible = "ti,keystone-spi", "ti,dm6441-spi"; 122 reg = <0x21805800 0x200>; 123 num-cs = <4>; 124 ti,davinci-spi-intr-line = <0>; 125 interrupts = <GIC_SPI 66 IRQ_TYPE_EDGE_RISING>; 126 #address-cells = <1>; 127 #size-cells = <0>; 128 status = "disabled"; 129 }; 130 131 spi2: spi@21805c00 { 132 compatible = "ti,keystone-spi", "ti,dm6441-spi"; 133 reg = <0x21805C00 0x200>; 134 num-cs = <4>; 135 ti,davinci-spi-intr-line = <0>; 136 interrupts = <GIC_SPI 68 IRQ_TYPE_EDGE_RISING>; 137 #address-cells = <1>; 138 #size-cells = <0>; 139 status = "disabled"; 140 }; 141 142 spi3: spi@21806000 { 143 compatible = "ti,keystone-spi", "ti,dm6441-spi"; 144 reg = <0x21806000 0x200>; 145 num-cs = <4>; 146 ti,davinci-spi-intr-line = <0>; 147 interrupts = <GIC_SPI 70 IRQ_TYPE_EDGE_RISING>; 148 #address-cells = <1>; 149 #size-cells = <0>; 150 status = "disabled"; 151 }; 152 i2c0: i2c@2530000 { 153 compatible = "ti,keystone-i2c"; 154 reg = <0x02530000 0x400>; 155 clock-frequency = <100000>; 156 interrupts = <GIC_SPI 88 IRQ_TYPE_EDGE_RISING>; 157 #address-cells = <1>; 158 #size-cells = <0>; 159 status = "disabled"; 160 }; 161 162 i2c1: i2c@2530400 { 163 compatible = "ti,keystone-i2c"; 164 reg = <0x02530400 0x400>; 165 clock-frequency = <100000>; 166 interrupts = <GIC_SPI 89 IRQ_TYPE_EDGE_RISING>; 167 #address-cells = <1>; 168 #size-cells = <0>; 169 status = "disabled"; 170 }; 171 172 i2c2: i2c@2530800 { 173 compatible = "ti,keystone-i2c"; 174 reg = <0x02530800 0x400>; 175 clock-frequency = <100000>; 176 interrupts = <GIC_SPI 90 IRQ_TYPE_EDGE_RISING>; 177 #address-cells = <1>; 178 #size-cells = <0>; 179 status = "disabled"; 180 }; 181 182 mmc0: mmc@23000000 { 183 compatible = "ti,omap4-hsmmc"; 184 reg = <0x23000000 0x400>; 185 interrupts = <GIC_SPI 96 IRQ_TYPE_EDGE_RISING>; 186 bus-width = <4>; 187 ti,needs-special-reset; 188 no-1-8-v; 189 max-frequency = <96000000>; 190 status = "disabled"; 191 }; 192 193 mmc1: mmc@23100000 { 194 compatible = "ti,omap4-hsmmc"; 195 reg = <0x23100000 0x400>; 196 interrupts = <GIC_SPI 97 IRQ_TYPE_EDGE_RISING>; 197 bus-width = <8>; 198 ti,needs-special-reset; 199 ti,non-removable; 200 max-frequency = <96000000>; 201 status = "disabled"; 202 clock-names = "fck"; 203 }; 204 }; 205}; 206