1/* 2 * Copyright 2014 Texas Instruments, Inc. 3 * 4 * Device Tree Source for K2G SOC 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 */ 10 11#include <dt-bindings/interrupt-controller/arm-gic.h> 12#include "skeleton.dtsi" 13 14/ { 15 model = "Texas Instruments K2G SoC"; 16 #address-cells = <1>; 17 #size-cells = <1>; 18 interrupt-parent = <&gic>; 19 20 aliases { 21 serial0 = &uart0; 22 spi0 = &spi0; 23 spi1 = &spi1; 24 spi2 = &spi2; 25 spi3 = &spi3; 26 spi4 = &qspi; 27 i2c0 = &i2c0; 28 i2c1 = &i2c1; 29 i2c2 = &i2c2; 30 }; 31 32 memory { 33 device_type = "memory"; 34 reg = <0x80000000 0x80000000>; 35 }; 36 37 cpus { 38 #address-cells = <1>; 39 #size-cells = <0>; 40 41 interrupt-parent = <&gic>; 42 43 cpu@0 { 44 compatible = "arm,cortex-a15"; 45 device_type = "cpu"; 46 reg = <0>; 47 }; 48 }; 49 50 gic: interrupt-controller { 51 compatible = "arm,cortex-a15-gic"; 52 #interrupt-cells = <3>; 53 interrupt-controller; 54 reg = <0x0 0x02561000 0x0 0x1000>, 55 <0x0 0x02562000 0x0 0x2000>, 56 <0x0 0x02564000 0x0 0x1000>, 57 <0x0 0x02566000 0x0 0x2000>; 58 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | 59 IRQ_TYPE_LEVEL_HIGH)>; 60 }; 61 62 soc { 63 #address-cells = <1>; 64 #size-cells = <1>; 65 compatible = "ti,keystone","simple-bus"; 66 interrupt-parent = <&gic>; 67 ranges; 68 69 uart0: serial@02530c00 { 70 compatible = "ns16550a"; 71 current-speed = <115200>; 72 reg-shift = <2>; 73 reg-io-width = <4>; 74 reg = <0x02530c00 0x100>; 75 clock-names = "uart"; 76 interrupts = <GIC_SPI 164 IRQ_TYPE_EDGE_RISING>; 77 }; 78 79 mdio: mdio@4200f00 { 80 compatible = "ti,keystone_mdio", "ti,davinci_mdio"; 81 #address-cells = <1>; 82 #size-cells = <0>; 83 /* power-domains = <&k2g_pds K2G_DEV_NSS0>; */ 84 /* clocks = <&k2g_clks K2G_DEV_NSS0 K2G_DEV_NSS_ESW_CLK>; */ 85 clock-names = "fck"; 86 reg = <0x04200f00 0x100>; 87 status = "disabled"; 88 bus_freq = <2500000>; 89 }; 90 91 qspi: qspi@2940000 { 92 compatible = "cadence,qspi"; 93 #address-cells = <1>; 94 #size-cells = <0>; 95 reg = <0x02940000 0x1000>, 96 <0x24000000 0x4000000>; 97 interrupts = <GIC_SPI 198 IRQ_TYPE_EDGE_RISING>; 98 num-cs = <4>; 99 fifo-depth = <256>; 100 sram-size = <256>; 101 status = "disabled"; 102 }; 103 104 #include "keystone-k2g-netcp.dtsi" 105 106 pmmc: pmmc@2900000 { 107 compatible = "ti,power-processor"; 108 reg = <0x02900000 0x40000>; 109 ti,lpsc_module = <1>; 110 }; 111 112 spi0: spi@21805400 { 113 compatible = "ti,keystone-spi", "ti,dm6441-spi"; 114 reg = <0x21805400 0x200>; 115 num-cs = <4>; 116 ti,davinci-spi-intr-line = <0>; 117 interrupts = <GIC_SPI 64 IRQ_TYPE_EDGE_RISING>; 118 #address-cells = <1>; 119 #size-cells = <0>; 120 status = "disabled"; 121 }; 122 123 spi1: spi@21805800 { 124 compatible = "ti,keystone-spi", "ti,dm6441-spi"; 125 reg = <0x21805800 0x200>; 126 num-cs = <4>; 127 ti,davinci-spi-intr-line = <0>; 128 interrupts = <GIC_SPI 66 IRQ_TYPE_EDGE_RISING>; 129 #address-cells = <1>; 130 #size-cells = <0>; 131 status = "disabled"; 132 }; 133 134 spi2: spi@21805c00 { 135 compatible = "ti,keystone-spi", "ti,dm6441-spi"; 136 reg = <0x21805C00 0x200>; 137 num-cs = <4>; 138 ti,davinci-spi-intr-line = <0>; 139 interrupts = <GIC_SPI 68 IRQ_TYPE_EDGE_RISING>; 140 #address-cells = <1>; 141 #size-cells = <0>; 142 status = "disabled"; 143 }; 144 145 spi3: spi@21806000 { 146 compatible = "ti,keystone-spi", "ti,dm6441-spi"; 147 reg = <0x21806000 0x200>; 148 num-cs = <4>; 149 ti,davinci-spi-intr-line = <0>; 150 interrupts = <GIC_SPI 70 IRQ_TYPE_EDGE_RISING>; 151 #address-cells = <1>; 152 #size-cells = <0>; 153 status = "disabled"; 154 }; 155 i2c0: i2c@2530000 { 156 compatible = "ti,keystone-i2c"; 157 reg = <0x02530000 0x400>; 158 clock-frequency = <100000>; 159 interrupts = <GIC_SPI 88 IRQ_TYPE_EDGE_RISING>; 160 #address-cells = <1>; 161 #size-cells = <0>; 162 status = "disabled"; 163 }; 164 165 i2c1: i2c@2530400 { 166 compatible = "ti,keystone-i2c"; 167 reg = <0x02530400 0x400>; 168 clock-frequency = <100000>; 169 interrupts = <GIC_SPI 89 IRQ_TYPE_EDGE_RISING>; 170 #address-cells = <1>; 171 #size-cells = <0>; 172 status = "disabled"; 173 }; 174 175 i2c2: i2c@2530800 { 176 compatible = "ti,keystone-i2c"; 177 reg = <0x02530800 0x400>; 178 clock-frequency = <100000>; 179 interrupts = <GIC_SPI 90 IRQ_TYPE_EDGE_RISING>; 180 #address-cells = <1>; 181 #size-cells = <0>; 182 status = "disabled"; 183 }; 184 185 mmc0: mmc@23000000 { 186 compatible = "ti,omap4-hsmmc"; 187 reg = <0x23000000 0x400>; 188 interrupts = <GIC_SPI 96 IRQ_TYPE_EDGE_RISING>; 189 bus-width = <4>; 190 ti,needs-special-reset; 191 no-1-8-v; 192 max-frequency = <96000000>; 193 status = "disabled"; 194 }; 195 196 mmc1: mmc@23100000 { 197 compatible = "ti,omap4-hsmmc"; 198 reg = <0x23100000 0x400>; 199 interrupts = <GIC_SPI 97 IRQ_TYPE_EDGE_RISING>; 200 bus-width = <8>; 201 ti,needs-special-reset; 202 ti,non-removable; 203 max-frequency = <96000000>; 204 status = "disabled"; 205 clock-names = "fck"; 206 }; 207 }; 208}; 209