1*2d0eba3aSLokesh Vutla// SPDX-License-Identifier: GPL-2.0 2*2d0eba3aSLokesh Vutla/* 3*2d0eba3aSLokesh Vutla * Device Tree Source for AM6 SoC Family Wakeup Domain peripherals 4*2d0eba3aSLokesh Vutla * 5*2d0eba3aSLokesh Vutla * Copyright (C) 2016-2018 Texas Instruments Incorporated - http://www.ti.com/ 6*2d0eba3aSLokesh Vutla */ 7*2d0eba3aSLokesh Vutla 8*2d0eba3aSLokesh Vutla&cbass_wakeup { 9*2d0eba3aSLokesh Vutla dmsc: dmsc { 10*2d0eba3aSLokesh Vutla compatible = "ti,k2g-sci"; 11*2d0eba3aSLokesh Vutla ti,host-id = <12>; 12*2d0eba3aSLokesh Vutla #address-cells = <1>; 13*2d0eba3aSLokesh Vutla #size-cells = <1>; 14*2d0eba3aSLokesh Vutla ranges; 15*2d0eba3aSLokesh Vutla 16*2d0eba3aSLokesh Vutla mbox-names = "rx", "tx"; 17*2d0eba3aSLokesh Vutla 18*2d0eba3aSLokesh Vutla mboxes= <&secure_proxy_main 11>, 19*2d0eba3aSLokesh Vutla <&secure_proxy_main 13>; 20*2d0eba3aSLokesh Vutla 21*2d0eba3aSLokesh Vutla k3_pds: power-controller { 22*2d0eba3aSLokesh Vutla compatible = "ti,sci-pm-domain"; 23*2d0eba3aSLokesh Vutla #power-domain-cells = <1>; 24*2d0eba3aSLokesh Vutla }; 25*2d0eba3aSLokesh Vutla 26*2d0eba3aSLokesh Vutla k3_clks: clocks { 27*2d0eba3aSLokesh Vutla compatible = "ti,k2g-sci-clk"; 28*2d0eba3aSLokesh Vutla #clock-cells = <2>; 29*2d0eba3aSLokesh Vutla }; 30*2d0eba3aSLokesh Vutla 31*2d0eba3aSLokesh Vutla k3_reset: reset-controller { 32*2d0eba3aSLokesh Vutla compatible = "ti,sci-reset"; 33*2d0eba3aSLokesh Vutla #reset-cells = <2>; 34*2d0eba3aSLokesh Vutla }; 35*2d0eba3aSLokesh Vutla }; 36*2d0eba3aSLokesh Vutla 37*2d0eba3aSLokesh Vutla wkup_uart0: serial@42300000 { 38*2d0eba3aSLokesh Vutla compatible = "ti,am654-uart"; 39*2d0eba3aSLokesh Vutla reg = <0x42300000 0x100>; 40*2d0eba3aSLokesh Vutla reg-shift = <2>; 41*2d0eba3aSLokesh Vutla reg-io-width = <4>; 42*2d0eba3aSLokesh Vutla interrupts = <GIC_SPI 697 IRQ_TYPE_LEVEL_HIGH>; 43*2d0eba3aSLokesh Vutla clock-frequency = <48000000>; 44*2d0eba3aSLokesh Vutla current-speed = <115200>; 45*2d0eba3aSLokesh Vutla }; 46*2d0eba3aSLokesh Vutla}; 47