xref: /openbmc/u-boot/arch/arm/dts/imx7d-sdb.dts (revision 85fc970d)
1/*
2 * Copyright 2017 NXP
3 *
4 * SPDX-License-Identifier:	GPL-2.0+
5 */
6
7/dts-v1/;
8
9#include "imx7d.dtsi"
10
11/ {
12	model = "Freescale i.MX7 SabreSD Board";
13	compatible = "fsl,imx7d-sdb", "fsl,imx7d";
14
15	memory {
16		reg = <0x80000000 0x80000000>;
17	};
18
19	spi4 {
20		compatible = "spi-gpio";
21		pinctrl-names = "default";
22		pinctrl-0 = <&pinctrl_spi1>;
23		status = "okay";
24		gpio-sck = <&gpio1 13 0>;
25		gpio-mosi = <&gpio1 9 0>;
26		cs-gpios = <&gpio1 12 0>;
27		num-chipselects = <1>;
28		#address-cells = <1>;
29		#size-cells = <0>;
30
31		gpio_spi: gpio_spi@0 {
32			compatible = "fairchild,74hc595";
33			gpio-controller;
34			#gpio-cells = <2>;
35			reg = <0>;
36			registers-number = <1>;
37			registers-default = /bits/ 8 <0x74>; /* Enable PERI_3V3, SENSOR_RST_B and HDMI_RST*/
38			spi-max-frequency = <100000>;
39		};
40	};
41
42	regulators {
43		compatible = "simple-bus";
44		#address-cells = <1>;
45		#size-cells = <0>;
46
47		reg_usb_otg1_vbus: regulator@0 {
48			compatible = "regulator-fixed";
49			reg = <0>;
50			regulator-name = "usb_otg1_vbus";
51			regulator-min-microvolt = <5000000>;
52			regulator-max-microvolt = <5000000>;
53			gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
54			enable-active-high;
55		};
56
57		reg_usb_otg2_vbus: regulator@1 {
58			compatible = "regulator-fixed";
59			reg = <1>;
60			regulator-name = "usb_otg2_vbus";
61			regulator-min-microvolt = <5000000>;
62			regulator-max-microvolt = <5000000>;
63			gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>;
64			enable-active-high;
65		};
66
67		reg_sd1_vmmc: regulator@3 {
68			compatible = "regulator-fixed";
69			regulator-name = "VDD_SD1";
70			regulator-min-microvolt = <3300000>;
71			regulator-max-microvolt = <3300000>;
72			gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
73			startup-delay-us = <200000>;
74			enable-active-high;
75		};
76	};
77};
78
79&iomuxc {
80	imx7d-sdb {
81		pinctrl_spi1: spi1grp {
82			fsl,pins = <
83				MX7D_PAD_GPIO1_IO09__GPIO1_IO9	0x59
84				MX7D_PAD_GPIO1_IO12__GPIO1_IO12	0x59
85				MX7D_PAD_GPIO1_IO13__GPIO1_IO13	0x59
86			>;
87		};
88
89		pinctrl_i2c1: i2c1grp {
90			fsl,pins = <
91				MX7D_PAD_I2C1_SDA__I2C1_SDA	0x4000007f
92				MX7D_PAD_I2C1_SCL__I2C1_SCL	0x4000007f
93			>;
94		};
95
96		pinctrl_i2c2: i2c2grp {
97			fsl,pins = <
98				MX7D_PAD_I2C2_SDA__I2C2_SDA	0x4000007f
99				MX7D_PAD_I2C2_SCL__I2C2_SCL	0x4000007f
100			>;
101		};
102
103		pinctrl_i2c3: i2c3grp {
104			fsl,pins = <
105				MX7D_PAD_I2C3_SDA__I2C3_SDA	0x4000007f
106				MX7D_PAD_I2C3_SCL__I2C3_SCL	0x4000007f
107			>;
108		};
109
110		pinctrl_i2c4: i2c4grp {
111			fsl,pins = <
112				MX7D_PAD_SAI1_RX_BCLK__I2C4_SDA	0x4000007f
113				MX7D_PAD_SAI1_RX_SYNC__I2C4_SCL	0x4000007f
114			>;
115		};
116
117		pinctrl_usdhc1_gpio: usdhc1_gpiogrp {
118			fsl,pins = <
119				MX7D_PAD_SD1_CD_B__GPIO5_IO0		0x59 /* CD */
120				MX7D_PAD_SD1_WP__GPIO5_IO1		0x59 /* WP */
121				MX7D_PAD_SD1_RESET_B__GPIO5_IO2		0x59 /* vmmc */
122				MX7D_PAD_GPIO1_IO08__SD1_VSELECT	0x59 /* VSELECT */
123			>;
124		};
125
126		pinctrl_usdhc1: usdhc1grp {
127			fsl,pins = <
128				MX7D_PAD_SD1_CMD__SD1_CMD		0x59
129				MX7D_PAD_SD1_CLK__SD1_CLK		0x19
130				MX7D_PAD_SD1_DATA0__SD1_DATA0		0x59
131				MX7D_PAD_SD1_DATA1__SD1_DATA1		0x59
132				MX7D_PAD_SD1_DATA2__SD1_DATA2		0x59
133				MX7D_PAD_SD1_DATA3__SD1_DATA3		0x59
134			>;
135		};
136
137		pinctrl_usdhc2: usdhc2grp {
138			fsl,pins = <
139				MX7D_PAD_SD2_CMD__SD2_CMD       0x59
140				MX7D_PAD_SD2_CLK__SD2_CLK       0x19
141				MX7D_PAD_SD2_DATA0__SD2_DATA0   0x59
142				MX7D_PAD_SD2_DATA1__SD2_DATA1   0x59
143				MX7D_PAD_SD2_DATA2__SD2_DATA2   0x59
144				MX7D_PAD_SD2_DATA3__SD2_DATA3   0x59
145				MX7D_PAD_ECSPI2_MOSI__GPIO4_IO21	0x19 /* WL_REG_ON */
146				MX7D_PAD_ECSPI2_SCLK__GPIO4_IO20	0x19 /* WL_HOST_WAKE */
147			>;
148		};
149
150		pinctrl_usdhc3: usdhc3grp {
151			fsl,pins = <
152				MX7D_PAD_SD3_CMD__SD3_CMD		0x59
153				MX7D_PAD_SD3_CLK__SD3_CLK		0x19
154				MX7D_PAD_SD3_DATA0__SD3_DATA0		0x59
155				MX7D_PAD_SD3_DATA1__SD3_DATA1		0x59
156				MX7D_PAD_SD3_DATA2__SD3_DATA2		0x59
157				MX7D_PAD_SD3_DATA3__SD3_DATA3		0x59
158				MX7D_PAD_SD3_DATA4__SD3_DATA4		0x59
159				MX7D_PAD_SD3_DATA5__SD3_DATA5		0x59
160				MX7D_PAD_SD3_DATA6__SD3_DATA6		0x59
161				MX7D_PAD_SD3_DATA7__SD3_DATA7		0x59
162				MX7D_PAD_SD3_STROBE__SD3_STROBE         0x19
163			>;
164		};
165	};
166};
167
168&i2c1 {
169	clock-frequency = <100000>;
170	pinctrl-names = "default";
171	pinctrl-0 = <&pinctrl_i2c1>;
172	status = "okay";
173
174	pmic: pfuze3000@08 {
175		compatible = "fsl,pfuze3000";
176		reg = <0x08>;
177
178		regulators {
179			sw1a_reg: sw1a {
180				regulator-min-microvolt = <700000>;
181				regulator-max-microvolt = <3300000>;
182				regulator-boot-on;
183				regulator-always-on;
184				regulator-ramp-delay = <6250>;
185			};
186
187			/* use sw1c_reg to align with pfuze100/pfuze200 */
188			sw1c_reg: sw1b {
189				regulator-min-microvolt = <700000>;
190				regulator-max-microvolt = <1475000>;
191				regulator-boot-on;
192				regulator-always-on;
193				regulator-ramp-delay = <6250>;
194			};
195
196			sw2_reg: sw2 {
197				regulator-min-microvolt = <1500000>;
198				regulator-max-microvolt = <1850000>;
199				regulator-boot-on;
200				regulator-always-on;
201			};
202
203			sw3a_reg: sw3 {
204				regulator-min-microvolt = <900000>;
205				regulator-max-microvolt = <1650000>;
206				regulator-boot-on;
207				regulator-always-on;
208			};
209
210			swbst_reg: swbst {
211				regulator-min-microvolt = <5000000>;
212				regulator-max-microvolt = <5150000>;
213			};
214
215			snvs_reg: vsnvs {
216				regulator-min-microvolt = <1000000>;
217				regulator-max-microvolt = <3000000>;
218				regulator-boot-on;
219				regulator-always-on;
220			};
221
222			vref_reg: vrefddr {
223				regulator-boot-on;
224				regulator-always-on;
225			};
226
227			vgen1_reg: vldo1 {
228				regulator-min-microvolt = <1800000>;
229				regulator-max-microvolt = <3300000>;
230				regulator-always-on;
231			};
232
233			vgen2_reg: vldo2 {
234				regulator-min-microvolt = <800000>;
235				regulator-max-microvolt = <1550000>;
236				regulator-always-on;
237			};
238
239			vgen3_reg: vccsd {
240				regulator-min-microvolt = <2850000>;
241				regulator-max-microvolt = <3300000>;
242				regulator-always-on;
243			};
244
245			vgen4_reg: v33 {
246				regulator-min-microvolt = <2850000>;
247				regulator-max-microvolt = <3300000>;
248				regulator-always-on;
249			};
250
251			vgen5_reg: vldo3 {
252				regulator-min-microvolt = <1800000>;
253				regulator-max-microvolt = <3300000>;
254				regulator-always-on;
255			};
256
257			vgen6_reg: vldo4 {
258				regulator-min-microvolt = <1800000>;
259				regulator-max-microvolt = <3300000>;
260				regulator-always-on;
261			};
262		};
263	};
264};
265
266&i2c2 {
267	clock-frequency = <100000>;
268	pinctrl-names = "default";
269	pinctrl-0 = <&pinctrl_i2c2>;
270	status = "okay";
271};
272
273&i2c3 {
274	clock-frequency = <100000>;
275	pinctrl-names = "default";
276	pinctrl-0 = <&pinctrl_i2c3>;
277	status = "okay";
278};
279
280&i2c4 {
281	clock-frequency = <100000>;
282	pinctrl-names = "default";
283	pinctrl-0 = <&pinctrl_i2c4>;
284	status = "okay";
285};
286
287&usdhc1 {
288	pinctrl-names = "default", "state_100mhz", "state_200mhz";
289	pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_usdhc1_gpio>;
290	cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
291	wp-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
292	vmmc-supply = <&reg_sd1_vmmc>;
293	status = "okay";
294};
295
296&usdhc2 {
297	pinctrl-names = "default", "state_100mhz", "state_200mhz";
298	pinctrl-0 = <&pinctrl_usdhc2>;
299	non-removable;
300	status = "okay";
301};
302
303&usdhc3 {
304	pinctrl-names = "default", "state_100mhz", "state_200mhz";
305	pinctrl-0 = <&pinctrl_usdhc3>;
306	bus-width = <8>;
307	non-removable;
308	status = "okay";
309};
310