1*55a42b33SPeng Fan/* 2*55a42b33SPeng Fan * Copyright (C) 2016 Freescale Semiconductor, Inc. 3*55a42b33SPeng Fan * 4*55a42b33SPeng Fan * This program is free software; you can redistribute it and/or modify 5*55a42b33SPeng Fan * it under the terms of the GNU General Public License version 2 as 6*55a42b33SPeng Fan * published by the Free Software Foundation. 7*55a42b33SPeng Fan */ 8*55a42b33SPeng Fan 9*55a42b33SPeng Fan/dts-v1/; 10*55a42b33SPeng Fan 11*55a42b33SPeng Fan#include <dt-bindings/input/input.h> 12*55a42b33SPeng Fan#include "imx6ull.dtsi" 13*55a42b33SPeng Fan 14*55a42b33SPeng Fan/ { 15*55a42b33SPeng Fan model = "Freescale i.MX6 ULL 14x14 EVK Board"; 16*55a42b33SPeng Fan compatible = "fsl,imx6ull-14x14-evk", "fsl,imx6ull"; 17*55a42b33SPeng Fan 18*55a42b33SPeng Fan chosen { 19*55a42b33SPeng Fan stdout-path = &uart1; 20*55a42b33SPeng Fan }; 21*55a42b33SPeng Fan 22*55a42b33SPeng Fan memory { 23*55a42b33SPeng Fan reg = <0x80000000 0x20000000>; 24*55a42b33SPeng Fan }; 25*55a42b33SPeng Fan 26*55a42b33SPeng Fan backlight { 27*55a42b33SPeng Fan compatible = "pwm-backlight"; 28*55a42b33SPeng Fan pwms = <&pwm1 0 5000000>; 29*55a42b33SPeng Fan brightness-levels = <0 4 8 16 32 64 128 255>; 30*55a42b33SPeng Fan default-brightness-level = <6>; 31*55a42b33SPeng Fan status = "okay"; 32*55a42b33SPeng Fan }; 33*55a42b33SPeng Fan 34*55a42b33SPeng Fan regulators { 35*55a42b33SPeng Fan compatible = "simple-bus"; 36*55a42b33SPeng Fan #address-cells = <1>; 37*55a42b33SPeng Fan #size-cells = <0>; 38*55a42b33SPeng Fan 39*55a42b33SPeng Fan reg_can_3v3: regulator@0 { 40*55a42b33SPeng Fan compatible = "regulator-fixed"; 41*55a42b33SPeng Fan reg = <0>; 42*55a42b33SPeng Fan regulator-name = "can-3v3"; 43*55a42b33SPeng Fan regulator-min-microvolt = <3300000>; 44*55a42b33SPeng Fan regulator-max-microvolt = <3300000>; 45*55a42b33SPeng Fan gpios = <&gpio_spi 3 GPIO_ACTIVE_LOW>; 46*55a42b33SPeng Fan }; 47*55a42b33SPeng Fan 48*55a42b33SPeng Fan reg_sd1_vmmc: regulator@1 { 49*55a42b33SPeng Fan compatible = "regulator-fixed"; 50*55a42b33SPeng Fan regulator-name = "VSD_3V3"; 51*55a42b33SPeng Fan regulator-min-microvolt = <3300000>; 52*55a42b33SPeng Fan regulator-max-microvolt = <3300000>; 53*55a42b33SPeng Fan gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>; 54*55a42b33SPeng Fan enable-active-high; 55*55a42b33SPeng Fan }; 56*55a42b33SPeng Fan 57*55a42b33SPeng Fan reg_gpio_dvfs: regulator-gpio { 58*55a42b33SPeng Fan compatible = "regulator-gpio"; 59*55a42b33SPeng Fan pinctrl-names = "default"; 60*55a42b33SPeng Fan pinctrl-0 = <&pinctrl_dvfs>; 61*55a42b33SPeng Fan regulator-min-microvolt = <1300000>; 62*55a42b33SPeng Fan regulator-max-microvolt = <1400000>; 63*55a42b33SPeng Fan regulator-name = "gpio_dvfs"; 64*55a42b33SPeng Fan regulator-type = "voltage"; 65*55a42b33SPeng Fan gpios = <&gpio5 3 GPIO_ACTIVE_HIGH>; 66*55a42b33SPeng Fan states = <1300000 0x1 1400000 0x0>; 67*55a42b33SPeng Fan }; 68*55a42b33SPeng Fan }; 69*55a42b33SPeng Fan 70*55a42b33SPeng Fan spi4 { 71*55a42b33SPeng Fan compatible = "spi-gpio"; 72*55a42b33SPeng Fan pinctrl-names = "default"; 73*55a42b33SPeng Fan pinctrl-0 = <&pinctrl_spi4>; 74*55a42b33SPeng Fan status = "okay"; 75*55a42b33SPeng Fan gpio-sck = <&gpio5 11 0>; 76*55a42b33SPeng Fan gpio-mosi = <&gpio5 10 0>; 77*55a42b33SPeng Fan cs-gpios = <&gpio5 7 0>; 78*55a42b33SPeng Fan num-chipselects = <1>; 79*55a42b33SPeng Fan #address-cells = <1>; 80*55a42b33SPeng Fan #size-cells = <0>; 81*55a42b33SPeng Fan 82*55a42b33SPeng Fan gpio_spi: gpio_spi@0 { 83*55a42b33SPeng Fan compatible = "fairchild,74hc595"; 84*55a42b33SPeng Fan gpio-controller; 85*55a42b33SPeng Fan oe-gpios = <&gpio5 8 0>; 86*55a42b33SPeng Fan #gpio-cells = <2>; 87*55a42b33SPeng Fan reg = <0>; 88*55a42b33SPeng Fan registers-number = <1>; 89*55a42b33SPeng Fan registers-default = /bits/ 8 <0x57>; 90*55a42b33SPeng Fan spi-max-frequency = <100000>; 91*55a42b33SPeng Fan }; 92*55a42b33SPeng Fan }; 93*55a42b33SPeng Fan}; 94*55a42b33SPeng Fan 95*55a42b33SPeng Fan&cpu0 { 96*55a42b33SPeng Fan arm-supply = <®_arm>; 97*55a42b33SPeng Fan soc-supply = <®_soc>; 98*55a42b33SPeng Fan dc-supply = <®_gpio_dvfs>; 99*55a42b33SPeng Fan}; 100*55a42b33SPeng Fan 101*55a42b33SPeng Fan&clks { 102*55a42b33SPeng Fan assigned-clocks = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>; 103*55a42b33SPeng Fan assigned-clock-rates = <786432000>; 104*55a42b33SPeng Fan}; 105*55a42b33SPeng Fan 106*55a42b33SPeng Fan&fec1 { 107*55a42b33SPeng Fan pinctrl-names = "default"; 108*55a42b33SPeng Fan pinctrl-0 = <&pinctrl_enet1>; 109*55a42b33SPeng Fan phy-mode = "rmii"; 110*55a42b33SPeng Fan phy-handle = <ðphy0>; 111*55a42b33SPeng Fan status = "okay"; 112*55a42b33SPeng Fan}; 113*55a42b33SPeng Fan 114*55a42b33SPeng Fan&fec2 { 115*55a42b33SPeng Fan pinctrl-names = "default"; 116*55a42b33SPeng Fan pinctrl-0 = <&pinctrl_enet2>; 117*55a42b33SPeng Fan phy-mode = "rmii"; 118*55a42b33SPeng Fan phy-handle = <ðphy1>; 119*55a42b33SPeng Fan status = "okay"; 120*55a42b33SPeng Fan 121*55a42b33SPeng Fan mdio { 122*55a42b33SPeng Fan #address-cells = <1>; 123*55a42b33SPeng Fan #size-cells = <0>; 124*55a42b33SPeng Fan 125*55a42b33SPeng Fan ethphy0: ethernet-phy@2 { 126*55a42b33SPeng Fan compatible = "ethernet-phy-ieee802.3-c22"; 127*55a42b33SPeng Fan reg = <2>; 128*55a42b33SPeng Fan }; 129*55a42b33SPeng Fan 130*55a42b33SPeng Fan ethphy1: ethernet-phy@1 { 131*55a42b33SPeng Fan compatible = "ethernet-phy-ieee802.3-c22"; 132*55a42b33SPeng Fan reg = <1>; 133*55a42b33SPeng Fan }; 134*55a42b33SPeng Fan }; 135*55a42b33SPeng Fan}; 136*55a42b33SPeng Fan 137*55a42b33SPeng Fan&gpc { 138*55a42b33SPeng Fan fsl,cpu_pupscr_sw2iso = <0x1>; 139*55a42b33SPeng Fan fsl,cpu_pupscr_sw = <0x0>; 140*55a42b33SPeng Fan fsl,cpu_pdnscr_iso2sw = <0x1>; 141*55a42b33SPeng Fan fsl,cpu_pdnscr_iso = <0x1>; 142*55a42b33SPeng Fan fsl,ldo-bypass = <0>; /* DCDC, ldo-enable */ 143*55a42b33SPeng Fan}; 144*55a42b33SPeng Fan 145*55a42b33SPeng Fan&i2c1 { 146*55a42b33SPeng Fan clock-frequency = <100000>; 147*55a42b33SPeng Fan pinctrl-names = "default"; 148*55a42b33SPeng Fan pinctrl-0 = <&pinctrl_i2c1>; 149*55a42b33SPeng Fan status = "okay"; 150*55a42b33SPeng Fan 151*55a42b33SPeng Fan mag3110@0e { 152*55a42b33SPeng Fan compatible = "fsl,mag3110"; 153*55a42b33SPeng Fan reg = <0x0e>; 154*55a42b33SPeng Fan position = <2>; 155*55a42b33SPeng Fan }; 156*55a42b33SPeng Fan 157*55a42b33SPeng Fan fxls8471@1e { 158*55a42b33SPeng Fan compatible = "fsl,fxls8471"; 159*55a42b33SPeng Fan reg = <0x1e>; 160*55a42b33SPeng Fan position = <0>; 161*55a42b33SPeng Fan interrupt-parent = <&gpio5>; 162*55a42b33SPeng Fan interrupts = <0 8>; 163*55a42b33SPeng Fan }; 164*55a42b33SPeng Fan}; 165*55a42b33SPeng Fan 166*55a42b33SPeng Fan&i2c2 { 167*55a42b33SPeng Fan clock_frequency = <100000>; 168*55a42b33SPeng Fan pinctrl-names = "default"; 169*55a42b33SPeng Fan pinctrl-0 = <&pinctrl_i2c2>; 170*55a42b33SPeng Fan status = "okay"; 171*55a42b33SPeng Fan}; 172*55a42b33SPeng Fan 173*55a42b33SPeng Fan&iomuxc { 174*55a42b33SPeng Fan pinctrl-names = "default"; 175*55a42b33SPeng Fan pinctrl-0 = <&pinctrl_hog_1>; 176*55a42b33SPeng Fan imx6ul-evk { 177*55a42b33SPeng Fan pinctrl_hog_1: hoggrp-1 { 178*55a42b33SPeng Fan fsl,pins = < 179*55a42b33SPeng Fan MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x17059 /* SD1 CD */ 180*55a42b33SPeng Fan MX6UL_PAD_GPIO1_IO05__USDHC1_VSELECT 0x17059 /* SD1 VSELECT */ 181*55a42b33SPeng Fan MX6UL_PAD_GPIO1_IO09__GPIO1_IO09 0x17059 /* SD1 RESET */ 182*55a42b33SPeng Fan >; 183*55a42b33SPeng Fan }; 184*55a42b33SPeng Fan 185*55a42b33SPeng Fan pinctrl_csi1: csi1grp { 186*55a42b33SPeng Fan fsl,pins = < 187*55a42b33SPeng Fan MX6UL_PAD_CSI_MCLK__CSI_MCLK 0x1b088 188*55a42b33SPeng Fan MX6UL_PAD_CSI_PIXCLK__CSI_PIXCLK 0x1b088 189*55a42b33SPeng Fan MX6UL_PAD_CSI_VSYNC__CSI_VSYNC 0x1b088 190*55a42b33SPeng Fan MX6UL_PAD_CSI_HSYNC__CSI_HSYNC 0x1b088 191*55a42b33SPeng Fan MX6UL_PAD_CSI_DATA00__CSI_DATA02 0x1b088 192*55a42b33SPeng Fan MX6UL_PAD_CSI_DATA01__CSI_DATA03 0x1b088 193*55a42b33SPeng Fan MX6UL_PAD_CSI_DATA02__CSI_DATA04 0x1b088 194*55a42b33SPeng Fan MX6UL_PAD_CSI_DATA03__CSI_DATA05 0x1b088 195*55a42b33SPeng Fan MX6UL_PAD_CSI_DATA04__CSI_DATA06 0x1b088 196*55a42b33SPeng Fan MX6UL_PAD_CSI_DATA05__CSI_DATA07 0x1b088 197*55a42b33SPeng Fan MX6UL_PAD_CSI_DATA06__CSI_DATA08 0x1b088 198*55a42b33SPeng Fan MX6UL_PAD_CSI_DATA07__CSI_DATA09 0x1b088 199*55a42b33SPeng Fan >; 200*55a42b33SPeng Fan }; 201*55a42b33SPeng Fan 202*55a42b33SPeng Fan pinctrl_enet1: enet1grp { 203*55a42b33SPeng Fan fsl,pins = < 204*55a42b33SPeng Fan MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0 205*55a42b33SPeng Fan MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER 0x1b0b0 206*55a42b33SPeng Fan MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0 207*55a42b33SPeng Fan MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0 208*55a42b33SPeng Fan MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0 209*55a42b33SPeng Fan MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0 210*55a42b33SPeng Fan MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0 211*55a42b33SPeng Fan MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031 212*55a42b33SPeng Fan >; 213*55a42b33SPeng Fan }; 214*55a42b33SPeng Fan 215*55a42b33SPeng Fan pinctrl_enet2: enet2grp { 216*55a42b33SPeng Fan fsl,pins = < 217*55a42b33SPeng Fan MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0 218*55a42b33SPeng Fan MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0 219*55a42b33SPeng Fan MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0 220*55a42b33SPeng Fan MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER 0x1b0b0 221*55a42b33SPeng Fan MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0 222*55a42b33SPeng Fan MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0 223*55a42b33SPeng Fan MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0 224*55a42b33SPeng Fan MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0 225*55a42b33SPeng Fan MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0 226*55a42b33SPeng Fan MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x4001b031 227*55a42b33SPeng Fan >; 228*55a42b33SPeng Fan }; 229*55a42b33SPeng Fan 230*55a42b33SPeng Fan pinctrl_flexcan1: flexcan1grp{ 231*55a42b33SPeng Fan fsl,pins = < 232*55a42b33SPeng Fan MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX 0x1b020 233*55a42b33SPeng Fan MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX 0x1b020 234*55a42b33SPeng Fan >; 235*55a42b33SPeng Fan }; 236*55a42b33SPeng Fan 237*55a42b33SPeng Fan pinctrl_flexcan2: flexcan2grp{ 238*55a42b33SPeng Fan fsl,pins = < 239*55a42b33SPeng Fan MX6UL_PAD_UART2_RTS_B__FLEXCAN2_RX 0x1b020 240*55a42b33SPeng Fan MX6UL_PAD_UART2_CTS_B__FLEXCAN2_TX 0x1b020 241*55a42b33SPeng Fan >; 242*55a42b33SPeng Fan }; 243*55a42b33SPeng Fan 244*55a42b33SPeng Fan pinctrl_i2c1: i2c1grp { 245*55a42b33SPeng Fan fsl,pins = < 246*55a42b33SPeng Fan MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0 247*55a42b33SPeng Fan MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0 248*55a42b33SPeng Fan >; 249*55a42b33SPeng Fan }; 250*55a42b33SPeng Fan 251*55a42b33SPeng Fan pinctrl_i2c2: i2c2grp { 252*55a42b33SPeng Fan fsl,pins = < 253*55a42b33SPeng Fan MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0 254*55a42b33SPeng Fan MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001b8b0 255*55a42b33SPeng Fan >; 256*55a42b33SPeng Fan }; 257*55a42b33SPeng Fan 258*55a42b33SPeng Fan pinctrl_lcdif_dat: lcdifdatgrp { 259*55a42b33SPeng Fan fsl,pins = < 260*55a42b33SPeng Fan MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x79 261*55a42b33SPeng Fan MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x79 262*55a42b33SPeng Fan MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x79 263*55a42b33SPeng Fan MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x79 264*55a42b33SPeng Fan MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x79 265*55a42b33SPeng Fan MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x79 266*55a42b33SPeng Fan MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x79 267*55a42b33SPeng Fan MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x79 268*55a42b33SPeng Fan MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x79 269*55a42b33SPeng Fan MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x79 270*55a42b33SPeng Fan MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x79 271*55a42b33SPeng Fan MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x79 272*55a42b33SPeng Fan MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x79 273*55a42b33SPeng Fan MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x79 274*55a42b33SPeng Fan MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x79 275*55a42b33SPeng Fan MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x79 276*55a42b33SPeng Fan MX6UL_PAD_LCD_DATA16__LCDIF_DATA16 0x79 277*55a42b33SPeng Fan MX6UL_PAD_LCD_DATA17__LCDIF_DATA17 0x79 278*55a42b33SPeng Fan MX6UL_PAD_LCD_DATA18__LCDIF_DATA18 0x79 279*55a42b33SPeng Fan MX6UL_PAD_LCD_DATA19__LCDIF_DATA19 0x79 280*55a42b33SPeng Fan MX6UL_PAD_LCD_DATA20__LCDIF_DATA20 0x79 281*55a42b33SPeng Fan MX6UL_PAD_LCD_DATA21__LCDIF_DATA21 0x79 282*55a42b33SPeng Fan MX6UL_PAD_LCD_DATA22__LCDIF_DATA22 0x79 283*55a42b33SPeng Fan MX6UL_PAD_LCD_DATA23__LCDIF_DATA23 0x79 284*55a42b33SPeng Fan >; 285*55a42b33SPeng Fan }; 286*55a42b33SPeng Fan 287*55a42b33SPeng Fan pinctrl_lcdif_ctrl: lcdifctrlgrp { 288*55a42b33SPeng Fan fsl,pins = < 289*55a42b33SPeng Fan MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x79 290*55a42b33SPeng Fan MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x79 291*55a42b33SPeng Fan MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x79 292*55a42b33SPeng Fan MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x79 293*55a42b33SPeng Fan >; 294*55a42b33SPeng Fan }; 295*55a42b33SPeng Fan 296*55a42b33SPeng Fan pinctrl_pwm1: pwm1grp { 297*55a42b33SPeng Fan fsl,pins = < 298*55a42b33SPeng Fan MX6UL_PAD_GPIO1_IO08__PWM1_OUT 0x110b0 299*55a42b33SPeng Fan >; 300*55a42b33SPeng Fan }; 301*55a42b33SPeng Fan 302*55a42b33SPeng Fan pinctrl_qspi: qspigrp { 303*55a42b33SPeng Fan fsl,pins = < 304*55a42b33SPeng Fan MX6UL_PAD_NAND_WP_B__QSPI_A_SCLK 0x70a1 305*55a42b33SPeng Fan MX6UL_PAD_NAND_READY_B__QSPI_A_DATA00 0x70a1 306*55a42b33SPeng Fan MX6UL_PAD_NAND_CE0_B__QSPI_A_DATA01 0x70a1 307*55a42b33SPeng Fan MX6UL_PAD_NAND_CE1_B__QSPI_A_DATA02 0x70a1 308*55a42b33SPeng Fan MX6UL_PAD_NAND_CLE__QSPI_A_DATA03 0x70a1 309*55a42b33SPeng Fan MX6UL_PAD_NAND_DQS__QSPI_A_SS0_B 0x70a1 310*55a42b33SPeng Fan >; 311*55a42b33SPeng Fan }; 312*55a42b33SPeng Fan 313*55a42b33SPeng Fan pinctrl_uart1: uart1grp { 314*55a42b33SPeng Fan fsl,pins = < 315*55a42b33SPeng Fan MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1 316*55a42b33SPeng Fan MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1 317*55a42b33SPeng Fan >; 318*55a42b33SPeng Fan }; 319*55a42b33SPeng Fan 320*55a42b33SPeng Fan pinctrl_uart2: uart2grp { 321*55a42b33SPeng Fan fsl,pins = < 322*55a42b33SPeng Fan MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX 0x1b0b1 323*55a42b33SPeng Fan MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX 0x1b0b1 324*55a42b33SPeng Fan MX6UL_PAD_UART3_RX_DATA__UART2_DCE_RTS 0x1b0b1 325*55a42b33SPeng Fan MX6UL_PAD_UART3_TX_DATA__UART2_DCE_CTS 0x1b0b1 326*55a42b33SPeng Fan >; 327*55a42b33SPeng Fan }; 328*55a42b33SPeng Fan 329*55a42b33SPeng Fan pinctrl_uart2dte: uart2dtegrp { 330*55a42b33SPeng Fan fsl,pins = < 331*55a42b33SPeng Fan MX6UL_PAD_UART2_TX_DATA__UART2_DTE_RX 0x1b0b1 332*55a42b33SPeng Fan MX6UL_PAD_UART2_RX_DATA__UART2_DTE_TX 0x1b0b1 333*55a42b33SPeng Fan MX6UL_PAD_UART3_RX_DATA__UART2_DTE_CTS 0x1b0b1 334*55a42b33SPeng Fan MX6UL_PAD_UART3_TX_DATA__UART2_DTE_RTS 0x1b0b1 335*55a42b33SPeng Fan >; 336*55a42b33SPeng Fan }; 337*55a42b33SPeng Fan 338*55a42b33SPeng Fan pinctrl_usdhc1: usdhc1grp { 339*55a42b33SPeng Fan fsl,pins = < 340*55a42b33SPeng Fan MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059 341*55a42b33SPeng Fan MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10071 342*55a42b33SPeng Fan MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059 343*55a42b33SPeng Fan MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059 344*55a42b33SPeng Fan MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059 345*55a42b33SPeng Fan MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059 346*55a42b33SPeng Fan >; 347*55a42b33SPeng Fan }; 348*55a42b33SPeng Fan 349*55a42b33SPeng Fan pinctrl_usdhc2: usdhc2grp { 350*55a42b33SPeng Fan fsl,pins = < 351*55a42b33SPeng Fan MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x10069 352*55a42b33SPeng Fan MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059 353*55a42b33SPeng Fan MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059 354*55a42b33SPeng Fan MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059 355*55a42b33SPeng Fan MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059 356*55a42b33SPeng Fan MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059 357*55a42b33SPeng Fan >; 358*55a42b33SPeng Fan }; 359*55a42b33SPeng Fan 360*55a42b33SPeng Fan pinctrl_wdog: wdoggrp { 361*55a42b33SPeng Fan fsl,pins = < 362*55a42b33SPeng Fan MX6UL_PAD_LCD_RESET__WDOG1_WDOG_ANY 0x30b0 363*55a42b33SPeng Fan >; 364*55a42b33SPeng Fan }; 365*55a42b33SPeng Fan }; 366*55a42b33SPeng Fan}; 367*55a42b33SPeng Fan 368*55a42b33SPeng Fan&iomuxc_snvs { 369*55a42b33SPeng Fan pinctrl-names = "default_snvs"; 370*55a42b33SPeng Fan pinctrl-0 = <&pinctrl_hog_2>; 371*55a42b33SPeng Fan imx6ul-evk { 372*55a42b33SPeng Fan pinctrl_hog_2: hoggrp-2 { 373*55a42b33SPeng Fan fsl,pins = < 374*55a42b33SPeng Fan MX6ULL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x80000000 375*55a42b33SPeng Fan >; 376*55a42b33SPeng Fan }; 377*55a42b33SPeng Fan 378*55a42b33SPeng Fan pinctrl_dvfs: dvfsgrp { 379*55a42b33SPeng Fan fsl,pins = < 380*55a42b33SPeng Fan MX6ULL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x79 381*55a42b33SPeng Fan >; 382*55a42b33SPeng Fan }; 383*55a42b33SPeng Fan 384*55a42b33SPeng Fan pinctrl_lcdif_reset: lcdifresetgrp { 385*55a42b33SPeng Fan fsl,pins = < 386*55a42b33SPeng Fan /* used for lcd reset */ 387*55a42b33SPeng Fan MX6ULL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x79 388*55a42b33SPeng Fan >; 389*55a42b33SPeng Fan }; 390*55a42b33SPeng Fan 391*55a42b33SPeng Fan pinctrl_spi4: spi4grp { 392*55a42b33SPeng Fan fsl,pins = < 393*55a42b33SPeng Fan MX6ULL_PAD_BOOT_MODE0__GPIO5_IO10 0x70a1 394*55a42b33SPeng Fan MX6ULL_PAD_BOOT_MODE1__GPIO5_IO11 0x70a1 395*55a42b33SPeng Fan MX6ULL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x70a1 396*55a42b33SPeng Fan MX6ULL_PAD_SNVS_TAMPER8__GPIO5_IO08 0x80000000 397*55a42b33SPeng Fan >; 398*55a42b33SPeng Fan }; 399*55a42b33SPeng Fan 400*55a42b33SPeng Fan pinctrl_sai2_hp_det_b: sai2_hp_det_grp { 401*55a42b33SPeng Fan fsl,pins = < 402*55a42b33SPeng Fan MX6ULL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x17059 403*55a42b33SPeng Fan >; 404*55a42b33SPeng Fan }; 405*55a42b33SPeng Fan }; 406*55a42b33SPeng Fan}; 407*55a42b33SPeng Fan 408*55a42b33SPeng Fan 409*55a42b33SPeng Fan&lcdif { 410*55a42b33SPeng Fan pinctrl-names = "default"; 411*55a42b33SPeng Fan pinctrl-0 = <&pinctrl_lcdif_dat 412*55a42b33SPeng Fan &pinctrl_lcdif_ctrl 413*55a42b33SPeng Fan &pinctrl_lcdif_reset>; 414*55a42b33SPeng Fan display = <&display0>; 415*55a42b33SPeng Fan status = "okay"; 416*55a42b33SPeng Fan 417*55a42b33SPeng Fan display0: display { 418*55a42b33SPeng Fan bits-per-pixel = <16>; 419*55a42b33SPeng Fan bus-width = <24>; 420*55a42b33SPeng Fan 421*55a42b33SPeng Fan display-timings { 422*55a42b33SPeng Fan native-mode = <&timing0>; 423*55a42b33SPeng Fan timing0: timing0 { 424*55a42b33SPeng Fan clock-frequency = <9200000>; 425*55a42b33SPeng Fan hactive = <480>; 426*55a42b33SPeng Fan vactive = <272>; 427*55a42b33SPeng Fan hfront-porch = <8>; 428*55a42b33SPeng Fan hback-porch = <4>; 429*55a42b33SPeng Fan hsync-len = <41>; 430*55a42b33SPeng Fan vback-porch = <2>; 431*55a42b33SPeng Fan vfront-porch = <4>; 432*55a42b33SPeng Fan vsync-len = <10>; 433*55a42b33SPeng Fan 434*55a42b33SPeng Fan hsync-active = <0>; 435*55a42b33SPeng Fan vsync-active = <0>; 436*55a42b33SPeng Fan de-active = <1>; 437*55a42b33SPeng Fan pixelclk-active = <0>; 438*55a42b33SPeng Fan }; 439*55a42b33SPeng Fan }; 440*55a42b33SPeng Fan }; 441*55a42b33SPeng Fan}; 442*55a42b33SPeng Fan 443*55a42b33SPeng Fan&pwm1 { 444*55a42b33SPeng Fan pinctrl-names = "default"; 445*55a42b33SPeng Fan pinctrl-0 = <&pinctrl_pwm1>; 446*55a42b33SPeng Fan status = "okay"; 447*55a42b33SPeng Fan}; 448*55a42b33SPeng Fan 449*55a42b33SPeng Fan&qspi { 450*55a42b33SPeng Fan pinctrl-names = "default"; 451*55a42b33SPeng Fan pinctrl-0 = <&pinctrl_qspi>; 452*55a42b33SPeng Fan status = "okay"; 453*55a42b33SPeng Fan ddrsmp=<0>; 454*55a42b33SPeng Fan 455*55a42b33SPeng Fan flash0: n25q256a@0 { 456*55a42b33SPeng Fan #address-cells = <1>; 457*55a42b33SPeng Fan #size-cells = <1>; 458*55a42b33SPeng Fan compatible = "micron,n25q256a"; 459*55a42b33SPeng Fan spi-max-frequency = <29000000>; 460*55a42b33SPeng Fan spi-nor,ddr-quad-read-dummy = <6>; 461*55a42b33SPeng Fan reg = <0>; 462*55a42b33SPeng Fan }; 463*55a42b33SPeng Fan}; 464*55a42b33SPeng Fan 465*55a42b33SPeng Fan&uart1 { 466*55a42b33SPeng Fan pinctrl-names = "default"; 467*55a42b33SPeng Fan pinctrl-0 = <&pinctrl_uart1>; 468*55a42b33SPeng Fan status = "okay"; 469*55a42b33SPeng Fan}; 470*55a42b33SPeng Fan 471*55a42b33SPeng Fan&uart2 { 472*55a42b33SPeng Fan pinctrl-names = "default"; 473*55a42b33SPeng Fan pinctrl-0 = <&pinctrl_uart2>; 474*55a42b33SPeng Fan fsl,uart-has-rtscts; 475*55a42b33SPeng Fan /* for DTE mode, add below change */ 476*55a42b33SPeng Fan /* fsl,dte-mode; */ 477*55a42b33SPeng Fan /* pinctrl-0 = <&pinctrl_uart2dte>; */ 478*55a42b33SPeng Fan status = "okay"; 479*55a42b33SPeng Fan}; 480*55a42b33SPeng Fan 481*55a42b33SPeng Fan&usbotg1 { 482*55a42b33SPeng Fan dr_mode = "otg"; 483*55a42b33SPeng Fan srp-disable; 484*55a42b33SPeng Fan hnp-disable; 485*55a42b33SPeng Fan adp-disable; 486*55a42b33SPeng Fan status = "okay"; 487*55a42b33SPeng Fan}; 488*55a42b33SPeng Fan 489*55a42b33SPeng Fan&usbotg2 { 490*55a42b33SPeng Fan dr_mode = "host"; 491*55a42b33SPeng Fan disable-over-current; 492*55a42b33SPeng Fan status = "okay"; 493*55a42b33SPeng Fan}; 494*55a42b33SPeng Fan 495*55a42b33SPeng Fan&usbphy1 { 496*55a42b33SPeng Fan tx-d-cal = <0x5>; 497*55a42b33SPeng Fan}; 498*55a42b33SPeng Fan 499*55a42b33SPeng Fan&usbphy2 { 500*55a42b33SPeng Fan tx-d-cal = <0x5>; 501*55a42b33SPeng Fan}; 502*55a42b33SPeng Fan 503*55a42b33SPeng Fan&usdhc1 { 504*55a42b33SPeng Fan pinctrl-names = "default"; 505*55a42b33SPeng Fan pinctrl-0 = <&pinctrl_usdhc1>; 506*55a42b33SPeng Fan cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>; 507*55a42b33SPeng Fan keep-power-in-suspend; 508*55a42b33SPeng Fan enable-sdio-wakeup; 509*55a42b33SPeng Fan vmmc-supply = <®_sd1_vmmc>; 510*55a42b33SPeng Fan status = "okay"; 511*55a42b33SPeng Fan}; 512*55a42b33SPeng Fan 513*55a42b33SPeng Fan&usdhc2 { 514*55a42b33SPeng Fan pinctrl-names = "default"; 515*55a42b33SPeng Fan pinctrl-0 = <&pinctrl_usdhc2>; 516*55a42b33SPeng Fan no-1-8-v; 517*55a42b33SPeng Fan non-removable; 518*55a42b33SPeng Fan keep-power-in-suspend; 519*55a42b33SPeng Fan enable-sdio-wakeup; 520*55a42b33SPeng Fan status = "okay"; 521*55a42b33SPeng Fan}; 522*55a42b33SPeng Fan 523*55a42b33SPeng Fan&wdog1 { 524*55a42b33SPeng Fan pinctrl-names = "default"; 525*55a42b33SPeng Fan pinctrl-0 = <&pinctrl_wdog>; 526*55a42b33SPeng Fan fsl,wdog_b; 527*55a42b33SPeng Fan}; 528