1*e5c2244fSFabio Estevam// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2*e5c2244fSFabio Estevam//
3*e5c2244fSFabio Estevam// Copyright 2015 Technexion Ltd.
4*e5c2244fSFabio Estevam//
5*e5c2244fSFabio Estevam// Author: Wig Cheng  <wig.cheng@technexion.com>
6*e5c2244fSFabio Estevam//	   Richard Hu <richard.hu@technexion.com>
7*e5c2244fSFabio Estevam//	   Tapani Utriainen <tapani@technexion.com>
8*e5c2244fSFabio Estevam/dts-v1/;
9*e5c2244fSFabio Estevam
10*e5c2244fSFabio Estevam#include "imx6ul-pico.dtsi"
11*e5c2244fSFabio Estevam/ {
12*e5c2244fSFabio Estevam	model = "TechNexion PICO-IMX6UL and HOBBIT baseboard";
13*e5c2244fSFabio Estevam	compatible = "technexion,imx6ul-pico-hobbit", "fsl,imx6ul";
14*e5c2244fSFabio Estevam
15*e5c2244fSFabio Estevam	leds {
16*e5c2244fSFabio Estevam		compatible = "gpio-leds";
17*e5c2244fSFabio Estevam		pinctrl-names = "default";
18*e5c2244fSFabio Estevam		pinctrl-0 = <&pinctrl_gpio_leds>;
19*e5c2244fSFabio Estevam
20*e5c2244fSFabio Estevam		led {
21*e5c2244fSFabio Estevam			label = "gpio-led";
22*e5c2244fSFabio Estevam			gpios = <&gpio1 29 GPIO_ACTIVE_LOW>;
23*e5c2244fSFabio Estevam		};
24*e5c2244fSFabio Estevam	};
25*e5c2244fSFabio Estevam
26*e5c2244fSFabio Estevam	sound {
27*e5c2244fSFabio Estevam		compatible = "fsl,imx-audio-sgtl5000";
28*e5c2244fSFabio Estevam		model = "imx6ul-sgtl5000";
29*e5c2244fSFabio Estevam		audio-cpu = <&sai1>;
30*e5c2244fSFabio Estevam		audio-codec = <&sgtl5000>;
31*e5c2244fSFabio Estevam		audio-routing =
32*e5c2244fSFabio Estevam			"LINE_IN", "Line In Jack",
33*e5c2244fSFabio Estevam			"MIC_IN", "Mic Jack",
34*e5c2244fSFabio Estevam			"Mic Jack", "Mic Bias",
35*e5c2244fSFabio Estevam			"Headphone Jack", "HP_OUT";
36*e5c2244fSFabio Estevam	};
37*e5c2244fSFabio Estevam
38*e5c2244fSFabio Estevam	sys_mclk: clock-sys-mclk {
39*e5c2244fSFabio Estevam		compatible = "fixed-clock";
40*e5c2244fSFabio Estevam		#clock-cells = <0>;
41*e5c2244fSFabio Estevam		clock-frequency = <24576000>;
42*e5c2244fSFabio Estevam	};
43*e5c2244fSFabio Estevam};
44*e5c2244fSFabio Estevam
45*e5c2244fSFabio Estevam&i2c2 {
46*e5c2244fSFabio Estevam	clock_frequency = <100000>;
47*e5c2244fSFabio Estevam	pinctrl-names = "default";
48*e5c2244fSFabio Estevam	pinctrl-0 = <&pinctrl_i2c2>;
49*e5c2244fSFabio Estevam	status = "okay";
50*e5c2244fSFabio Estevam
51*e5c2244fSFabio Estevam	sgtl5000: codec@a {
52*e5c2244fSFabio Estevam		reg = <0x0a>;
53*e5c2244fSFabio Estevam		compatible = "fsl,sgtl5000";
54*e5c2244fSFabio Estevam		clocks = <&sys_mclk>;
55*e5c2244fSFabio Estevam		VDDA-supply = <&reg_2p5v>;
56*e5c2244fSFabio Estevam		VDDIO-supply = <&reg_3p3v>;
57*e5c2244fSFabio Estevam	};
58*e5c2244fSFabio Estevam};
59*e5c2244fSFabio Estevam
60*e5c2244fSFabio Estevam&i2c3 {
61*e5c2244fSFabio Estevam	status = "okay";
62*e5c2244fSFabio Estevam
63*e5c2244fSFabio Estevam	polytouch: touchscreen@38 {
64*e5c2244fSFabio Estevam		compatible = "edt,edt-ft5x06";
65*e5c2244fSFabio Estevam		reg = <0x38>;
66*e5c2244fSFabio Estevam		interrupt-parent = <&gpio1>;
67*e5c2244fSFabio Estevam		interrupts = <29 IRQ_TYPE_EDGE_FALLING>;
68*e5c2244fSFabio Estevam		reset-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>;
69*e5c2244fSFabio Estevam		touchscreen-size-x = <800>;
70*e5c2244fSFabio Estevam		touchscreen-size-y = <480>;
71*e5c2244fSFabio Estevam	};
72*e5c2244fSFabio Estevam
73*e5c2244fSFabio Estevam	adc081c: adc@50 {
74*e5c2244fSFabio Estevam		compatible = "ti,adc081c";
75*e5c2244fSFabio Estevam		reg = <0x50>;
76*e5c2244fSFabio Estevam		vref-supply = <&reg_3p3v>;
77*e5c2244fSFabio Estevam	};
78*e5c2244fSFabio Estevam};
79*e5c2244fSFabio Estevam
80*e5c2244fSFabio Estevam&iomuxc {
81*e5c2244fSFabio Estevam	pinctrl-names = "default";
82*e5c2244fSFabio Estevam	pinctrl-0 = <&pinctrl_hog>;
83*e5c2244fSFabio Estevam
84*e5c2244fSFabio Estevam	pinctrl_hog: hoggrp {
85*e5c2244fSFabio Estevam		fsl,pins = <
86*e5c2244fSFabio Estevam			MX6UL_PAD_CSI_VSYNC__GPIO4_IO19		0x10b0
87*e5c2244fSFabio Estevam			MX6UL_PAD_CSI_DATA00__GPIO4_IO21	0x10b0
88*e5c2244fSFabio Estevam			MX6UL_PAD_CSI_DATA01__GPIO4_IO22	0x10b0
89*e5c2244fSFabio Estevam			MX6UL_PAD_CSI_DATA02__GPIO4_IO23	0x10b0
90*e5c2244fSFabio Estevam			MX6UL_PAD_UART1_CTS_B__GPIO1_IO18	0x10b0
91*e5c2244fSFabio Estevam			MX6UL_PAD_SNVS_TAMPER2__GPIO5_IO02	0x10b0
92*e5c2244fSFabio Estevam		>;
93*e5c2244fSFabio Estevam	};
94*e5c2244fSFabio Estevam
95*e5c2244fSFabio Estevam	pinctrl_gpio_leds: gpioledsgrp {
96*e5c2244fSFabio Estevam		fsl,pins = <
97*e5c2244fSFabio Estevam			MX6UL_PAD_UART4_RX_DATA__GPIO1_IO29	0x10b0
98*e5c2244fSFabio Estevam		>;
99*e5c2244fSFabio Estevam	};
100*e5c2244fSFabio Estevam};
101