1/* 2 * Copyright 2017 Armadeus Systems <support@armadeus.com> 3 * 4 * This file is dual-licensed: you can use it either under the terms 5 * of the GPL or the X11 license, at your option. Note that this dual 6 * licensing only applies to this file, and not this project as a 7 * whole. 8 * 9 * a) This file is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License as 11 * published by the Free Software Foundation; either version 2 of 12 * the License, or (at your option) any later version. 13 * 14 * This file is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public 20 * License along with this file; if not, write to the Free 21 * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, 22 * MA 02110-1301 USA 23 * 24 * Or, alternatively, 25 * 26 * b) Permission is hereby granted, free of charge, to any person 27 * obtaining a copy of this software and associated documentation 28 * files (the "Software"), to deal in the Software without 29 * restriction, including without limitation the rights to use, 30 * copy, modify, merge, publish, distribute, sublicense, and/or 31 * sell copies of the Software, and to permit persons to whom the 32 * Software is furnished to do so, subject to the following 33 * conditions: 34 * 35 * The above copyright notice and this permission notice shall be 36 * included in all copies or substantial portions of the Software. 37 * 38 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 39 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 40 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 41 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 42 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 43 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 44 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 45 * OTHER DEALINGS IN THE SOFTWARE. 46 */ 47 48/dts-v1/; 49#include "imx6ul-opos6ul.dtsi" 50 51/ { 52 model = "Armadeus Systems OPOS6UL SoM on OPOS6ULDev board"; 53 compatible = "armadeus,opos6uldev", "armadeus,opos6ul", "fsl,imx6ul"; 54 55 chosen { 56 stdout-path = &uart1; 57 }; 58 59 backlight { 60 compatible = "pwm-backlight"; 61 pwms = <&pwm3 0 191000>; 62 brightness-levels = <0 4 8 16 32 64 128 255>; 63 default-brightness-level = <7>; 64 power-supply = <®_5v>; 65 status = "okay"; 66 }; 67 68 gpio-keys { 69 compatible = "gpio-keys"; 70 pinctrl-names = "default"; 71 pinctrl-0 = <&pinctrl_gpio_keys>; 72 73 user-button { 74 label = "User button"; 75 gpios = <&gpio2 11 GPIO_ACTIVE_LOW>; 76 linux,code = <BTN_MISC>; 77 wakeup-source; 78 }; 79 }; 80 81 leds { 82 compatible = "gpio-leds"; 83 84 user-led { 85 label = "User"; 86 pinctrl-names = "default"; 87 pinctrl-0 = <&pinctrl_led>; 88 gpios = <&gpio3 4 GPIO_ACTIVE_HIGH>; 89 linux,default-trigger = "heartbeat"; 90 }; 91 }; 92 93 onewire { 94 compatible = "w1-gpio"; 95 pinctrl-names = "default"; 96 pinctrl-0 = <&pinctrl_w1>; 97 gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; 98 }; 99 100 reg_5v: regulator-5v { 101 compatible = "regulator-fixed"; 102 regulator-name = "5V"; 103 regulator-min-microvolt = <5000000>; 104 regulator-max-microvolt = <5000000>; 105 }; 106 107 reg_usbotg1_vbus: regulator-usbotg1vbus { 108 compatible = "regulator-fixed"; 109 regulator-name = "usbotg1vbus"; 110 regulator-min-microvolt = <5000000>; 111 regulator-max-microvolt = <5000000>; 112 pinctrl-names = "default"; 113 pinctrl-0 = <&pinctrl_usbotg1_vbus>; 114 gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>; 115 enable-active-high; 116 }; 117 118 reg_usbotg2_vbus: regulator-usbotg2vbus { 119 compatible = "regulator-fixed"; 120 regulator-name = "usbotg2vbus"; 121 regulator-min-microvolt = <5000000>; 122 regulator-max-microvolt = <5000000>; 123 pinctrl-names = "default"; 124 pinctrl-0 = <&pinctrl_usbotg2_vbus>; 125 gpio = <&gpio5 9 GPIO_ACTIVE_HIGH>; 126 enable-active-high; 127 }; 128}; 129 130&adc1 { 131 vref-supply = <®_3v3>; 132 status = "okay"; 133}; 134 135&can1 { 136 pinctrl-names = "default"; 137 pinctrl-0 = <&pinctrl_flexcan1>; 138 xceiver-supply = <®_5v>; 139 status = "okay"; 140}; 141 142&can2 { 143 pinctrl-names = "default"; 144 pinctrl-0 = <&pinctrl_flexcan2>; 145 xceiver-supply = <®_5v>; 146 status = "okay"; 147}; 148 149&ecspi4 { 150 pinctrl-names = "default"; 151 pinctrl-0 = <&pinctrl_ecspi4>; 152 cs-gpios = <&gpio4 9 GPIO_ACTIVE_LOW>, <&gpio4 3 GPIO_ACTIVE_LOW>; 153 status = "okay"; 154 155 spidev0: spi@0 { 156 compatible = "spidev"; 157 reg = <0>; 158 spi-max-frequency = <5000000>; 159 }; 160 161 spidev1: spi@1 { 162 compatible = "spidev"; 163 reg = <1>; 164 spi-max-frequency = <5000000>; 165 }; 166}; 167 168&i2c1 { 169 pinctrl-names = "default"; 170 pinctrl-0 = <&pinctrl_i2c1>; 171 clock_frequency = <400000>; 172 status = "okay"; 173}; 174 175&i2c2 { 176 pinctrl-names = "default"; 177 pinctrl-0 = <&pinctrl_i2c2>; 178 clock_frequency = <400000>; 179 status = "okay"; 180}; 181 182&lcdif { 183 pinctrl-names = "default"; 184 pinctrl-0 = <&pinctrl_lcdif>; 185 display = <&display0>; 186 lcd-supply = <®_3v3>; 187 status = "okay"; 188 189 display0: display0 { 190 bits-per-pixel = <32>; 191 bus-width = <18>; 192 193 display-timings { 194 timing0: timing0 { 195 clock-frequency = <33000033>; 196 hactive = <800>; 197 vactive = <480>; 198 hback-porch = <96>; 199 hfront-porch = <96>; 200 vback-porch = <20>; 201 vfront-porch = <21>; 202 hsync-len = <64>; 203 vsync-len = <4>; 204 de-active = <1>; 205 pixelclk-active = <0>; 206 }; 207 }; 208 }; 209}; 210 211&pwm3 { 212 pinctrl-names = "default"; 213 pinctrl-0 = <&pinctrl_pwm3>; 214 status = "okay"; 215}; 216 217&snvs_pwrkey { 218 status = "disabled"; 219}; 220 221&tsc { 222 pinctrl-names = "default"; 223 pinctrl-0 = <&pinctrl_tsc>; 224 xnur-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>; 225 measure-delay-time = <0xffff>; 226 pre-charge-time = <0xffff>; 227 status = "okay"; 228}; 229 230&uart1 { 231 u-boot,dm-spl; 232 pinctrl-names = "default"; 233 pinctrl-0 = <&pinctrl_uart1>; 234 status = "okay"; 235}; 236 237&uart2 { 238 pinctrl-names = "default"; 239 pinctrl-0 = <&pinctrl_uart2>; 240 status = "okay"; 241}; 242 243&usbotg1 { 244 pinctrl-names = "default"; 245 pinctrl-0 = <&pinctrl_usbotg1_id>; 246 vbus-supply = <®_usbotg1_vbus>; 247 dr_mode = "otg"; 248 disable-over-current; 249 status = "okay"; 250}; 251 252&usbotg2 { 253 vbus-supply = <®_usbotg2_vbus>; 254 dr_mode = "host"; 255 disable-over-current; 256 status = "okay"; 257}; 258 259&iomuxc { 260 pinctrl-names = "default"; 261 pinctrl-0 = <&pinctrl_gpios>; 262 263 pinctrl_ecspi4: ecspi4grp { 264 fsl,pins = < 265 MX6UL_PAD_NAND_DATA04__ECSPI4_SCLK 0x1b0b0 266 MX6UL_PAD_NAND_DATA05__ECSPI4_MOSI 0x1b0b0 267 MX6UL_PAD_NAND_DATA06__ECSPI4_MISO 0x1b0b0 268 MX6UL_PAD_NAND_DATA01__GPIO4_IO03 0x1b0b0 269 MX6UL_PAD_NAND_DATA07__GPIO4_IO09 0x1b0b0 270 >; 271 }; 272 273 pinctrl_flexcan1: flexcan1grp { 274 fsl,pins = < 275 MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX 0x0b0b0 276 MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX 0x0b0b0 277 >; 278 }; 279 280 pinctrl_flexcan2: flexcan2grp { 281 fsl,pins = < 282 MX6UL_PAD_UART2_CTS_B__FLEXCAN2_TX 0x0b0b0 283 MX6UL_PAD_UART2_RTS_B__FLEXCAN2_RX 0x0b0b0 284 >; 285 }; 286 287 pinctrl_gpios: gpiosgrp { 288 fsl,pins = < 289 MX6UL_PAD_GPIO1_IO09__GPIO1_IO09 0x0b0b0 290 MX6UL_PAD_UART3_RX_DATA__GPIO1_IO25 0x0b0b0 291 MX6UL_PAD_UART3_TX_DATA__GPIO1_IO24 0x0b0b0 292 MX6UL_PAD_NAND_RE_B__GPIO4_IO00 0x0b0b0 293 MX6UL_PAD_GPIO1_IO08__GPIO1_IO08 0x0b0b0 294 MX6UL_PAD_UART1_CTS_B__GPIO1_IO18 0x0b0b0 295 MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x0b0b0 296 MX6UL_PAD_NAND_WE_B__GPIO4_IO01 0x0b0b0 297 MX6UL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x0b0b0 298 MX6UL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x0b0b0 299 MX6UL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x0b0b0 300 MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x0b0b0 301 MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x0b0b0 302 MX6UL_PAD_SNVS_TAMPER6__GPIO5_IO06 0x0b0b0 303 MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x0b0b0 304 MX6UL_PAD_SNVS_TAMPER8__GPIO5_IO08 0x0b0b0 305 >; 306 }; 307 308 pinctrl_gpio_keys: gpiokeysgrp { 309 fsl,pins = < 310 MX6UL_PAD_ENET2_TX_DATA0__GPIO2_IO11 0x0b0b0 311 >; 312 }; 313 314 pinctrl_i2c1: i2c1grp { 315 fsl,pins = < 316 MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0 317 MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0 318 >; 319 }; 320 321 pinctrl_i2c2: i2c2grp { 322 fsl,pins = < 323 MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001b8b0 324 MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0 325 >; 326 }; 327 328 pinctrl_lcdif: lcdifgrp { 329 fsl,pins = < 330 MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x100b1 331 MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x100b1 332 MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x100b1 333 MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x100b1 334 MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x100b1 335 MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x100b1 336 MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x100b1 337 MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x100b1 338 MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x100b1 339 MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x100b1 340 MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x100b1 341 MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x100b1 342 MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x100b1 343 MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x100b1 344 MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x100b1 345 MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x100b1 346 MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x100b1 347 MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x100b1 348 MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x100b1 349 MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x100b1 350 MX6UL_PAD_LCD_DATA16__LCDIF_DATA16 0x100b1 351 MX6UL_PAD_LCD_DATA17__LCDIF_DATA17 0x100b1 352 >; 353 }; 354 355 pinctrl_led: ledgrp { 356 fsl,pins = < 357 MX6UL_PAD_LCD_RESET__GPIO3_IO04 0x0b0b0 358 >; 359 }; 360 361 pinctrl_pwm3: pwm3grp { 362 fsl,pins = < 363 MX6UL_PAD_NAND_ALE__PWM3_OUT 0x1b0b0 364 >; 365 }; 366 367 pinctrl_tsc: tscgrp { 368 fsl,pins = < 369 MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0xb0 370 MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0xb0 371 MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0xb0 372 MX6UL_PAD_GPIO1_IO04__GPIO1_IO04 0xb0 373 >; 374 }; 375 376 pinctrl_uart1: uart1grp { 377 u-boot,dm-spl; 378 fsl,pins = < 379 MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1 380 MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1 381 >; 382 }; 383 384 pinctrl_uart2: uart2grp { 385 fsl,pins = < 386 MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX 0x1b0b1 387 MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX 0x1b0b1 388 >; 389 }; 390 391 pinctrl_usbotg1_id: usbotg1idgrp { 392 fsl,pins = < 393 MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID 0x1b0b0 394 >; 395 }; 396 397 pinctrl_usbotg1_vbus: usbotg1vbusgrp { 398 fsl,pins = < 399 MX6UL_PAD_GPIO1_IO05__GPIO1_IO05 0x1b0b0 400 >; 401 }; 402 403 pinctrl_usbotg2_vbus: usbotg2vbusgrp { 404 fsl,pins = < 405 MX6UL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x1b0b0 406 >; 407 }; 408 409 pinctrl_w1: w1grp { 410 fsl,pins = < 411 MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x0b0b0 412 >; 413 }; 414}; 415