1/*
2 * Copyright 2017 Armadeus Systems <support@armadeus.com>
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 *  a) This file is free software; you can redistribute it and/or
10 *     modify it under the terms of the GNU General Public License as
11 *     published by the Free Software Foundation; either version 2 of
12 *     the License, or (at your option) any later version.
13 *
14 *     This file is distributed in the hope that it will be useful,
15 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
16 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17 *     GNU General Public License for more details.
18 *
19 *     You should have received a copy of the GNU General Public
20 *     License along with this file; if not, write to the Free
21 *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
22 *     MA 02110-1301 USA
23 *
24 * Or, alternatively,
25 *
26 *  b) Permission is hereby granted, free of charge, to any person
27 *     obtaining a copy of this software and associated documentation
28 *     files (the "Software"), to deal in the Software without
29 *     restriction, including without limitation the rights to use,
30 *     copy, modify, merge, publish, distribute, sublicense, and/or
31 *     sell copies of the Software, and to permit persons to whom the
32 *     Software is furnished to do so, subject to the following
33 *     conditions:
34 *
35 *     The above copyright notice and this permission notice shall be
36 *     included in all copies or substantial portions of the Software.
37 *
38 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
39 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
40 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
41 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
42 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
43 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
44 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
45 *     OTHER DEALINGS IN THE SOFTWARE.
46 */
47
48#include "imx6ul.dtsi"
49
50/ {
51	memory {
52		reg = <0x80000000 0>; /* will be filled by U-Boot */
53	};
54
55	reg_3v3: regulator-3v3 {
56		compatible = "regulator-fixed";
57		regulator-name = "3V3";
58		regulator-min-microvolt = <3300000>;
59		regulator-max-microvolt = <3300000>;
60	};
61
62	usdhc3_pwrseq: usdhc3-pwrseq {
63		compatible = "mmc-pwrseq-simple";
64		reset-gpios = <&gpio2 9 GPIO_ACTIVE_LOW>;
65	};
66};
67
68&fec1 {
69	pinctrl-names = "default";
70	pinctrl-0 = <&pinctrl_enet1>;
71	phy-mode = "rmii";
72	phy-reset-duration = <1>;
73	phy-reset-gpios = <&gpio4 2 GPIO_ACTIVE_LOW>;
74	phy-handle = <&ethphy1>;
75	phy-supply = <&reg_3v3>;
76	status = "okay";
77
78	mdio: mdio {
79		#address-cells = <1>;
80		#size-cells = <0>;
81
82		ethphy1: ethernet-phy@1 {
83			compatible = "ethernet-phy-ieee802.3-c22";
84			reg = <1>;
85			interrupt-parent = <&gpio4>;
86			interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
87			status = "okay";
88		};
89	};
90};
91
92/* Bluetooth */
93&uart8 {
94	pinctrl-names = "default";
95	pinctrl-0 = <&pinctrl_uart8>;
96	uart-has-rtscts;
97	status = "okay";
98};
99
100/* eMMC */
101&usdhc1 {
102	pinctrl-names = "default";
103	pinctrl-0 = <&pinctrl_usdhc1>;
104	bus-width = <8>;
105	no-1-8-v;
106	non-removable;
107	status = "okay";
108};
109
110/* WiFi */
111&usdhc2 {
112	pinctrl-names = "default";
113	pinctrl-0 = <&pinctrl_usdhc2>;
114	bus-width = <4>;
115	no-1-8-v;
116	non-removable;
117	mmc-pwrseq = <&usdhc3_pwrseq>;
118	status = "okay";
119
120	#address-cells = <1>;
121	#size-cells = <0>;
122
123	brcmf: bcrmf@1 {
124		compatible = "brcm,bcm4329-fmac";
125		reg = <1>;
126		interrupt-parent = <&gpio2>;
127		interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
128		interrupt-names = "host-wake";
129	};
130};
131
132&iomuxc {
133	pinctrl_enet1: enet1grp {
134		fsl,pins = <
135			MX6UL_PAD_GPIO1_IO06__ENET1_MDIO	0x1b0b0
136			MX6UL_PAD_GPIO1_IO07__ENET1_MDC		0x1b0b0
137			MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER	0x130b0
138			MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN	0x130b0
139			MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01	0x130b0
140			MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00	0x130b0
141			MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00	0x1b0b0
142			MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01	0x1b0b0
143			MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN	0x1b0b0
144			/* INT# */
145			MX6UL_PAD_NAND_DQS__GPIO4_IO16		0x1b0b0
146			/* RST# */
147			MX6UL_PAD_NAND_DATA00__GPIO4_IO02	0x130b0
148			MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1	0x4001b031
149		>;
150	};
151
152	pinctrl_uart8: uart8grp {
153		fsl,pins = <
154			MX6UL_PAD_ENET2_TX_EN__UART8_DCE_RX	0x1b0b0
155			MX6UL_PAD_ENET2_TX_DATA1__UART8_DCE_TX	0x1b0b0
156			MX6UL_PAD_ENET2_RX_ER__UART8_DCE_RTS	0x1b0b0
157			MX6UL_PAD_ENET2_TX_CLK__UART8_DCE_CTS	0x1b0b0
158			/* BT_REG_ON */
159			MX6UL_PAD_ENET2_RX_EN__GPIO2_IO10	0x130b0
160		>;
161	};
162
163	pinctrl_usdhc1: usdhc1grp {
164		fsl,pins = <
165			MX6UL_PAD_SD1_CMD__USDHC1_CMD		0x17059
166			MX6UL_PAD_SD1_CLK__USDHC1_CLK		0x10059
167			MX6UL_PAD_SD1_DATA0__USDHC1_DATA0	0x17059
168			MX6UL_PAD_SD1_DATA1__USDHC1_DATA1	0x17059
169			MX6UL_PAD_SD1_DATA2__USDHC1_DATA2	0x17059
170			MX6UL_PAD_SD1_DATA3__USDHC1_DATA3	0x17059
171			MX6UL_PAD_NAND_READY_B__USDHC1_DATA4	0x17059
172			MX6UL_PAD_NAND_CE0_B__USDHC1_DATA5	0x17059
173			MX6UL_PAD_NAND_CE1_B__USDHC1_DATA6	0x17059
174			MX6UL_PAD_NAND_CLE__USDHC1_DATA7	0x17059
175		>;
176	};
177
178	pinctrl_usdhc2: usdhc2grp {
179		fsl,pins = <
180			MX6UL_PAD_LCD_DATA18__USDHC2_CMD	0x1b0b0
181			MX6UL_PAD_LCD_DATA19__USDHC2_CLK	0x100b0
182			MX6UL_PAD_LCD_DATA20__USDHC2_DATA0	0x1b0b0
183			MX6UL_PAD_LCD_DATA21__USDHC2_DATA1	0x1b0b0
184			MX6UL_PAD_LCD_DATA22__USDHC2_DATA2	0x1b0b0
185			MX6UL_PAD_LCD_DATA23__USDHC2_DATA3	0x1b0b0
186			/* WL_REG_ON */
187			MX6UL_PAD_ENET2_RX_DATA1__GPIO2_IO09	0x130b0
188			/* WL_IRQ */
189			MX6UL_PAD_ENET2_RX_DATA0__GPIO2_IO08	0x1b0b0
190		>;
191	};
192};
193