1*25baafc4SYe Li// SPDX-License-Identifier: GPL-2.0+ 2*25baafc4SYe Li/* 3*25baafc4SYe Li * Copyright (C) 2015 Freescale Semiconductor, Inc. 4*25baafc4SYe Li * Copyright 2017-2018 NXP 5*25baafc4SYe Li */ 6*25baafc4SYe Li 7*25baafc4SYe Li/dts-v1/; 8*25baafc4SYe Li 9*25baafc4SYe Li#include "imx6ul.dtsi" 10*25baafc4SYe Li 11*25baafc4SYe Li/ { 12*25baafc4SYe Li model = "Freescale i.MX6 UltraLite 9x9 EVK Board"; 13*25baafc4SYe Li compatible = "fsl,imx6ul-9x9-evk", "fsl,imx6ul"; 14*25baafc4SYe Li 15*25baafc4SYe Li aliases { 16*25baafc4SYe Li spi5 = &soft_spi; 17*25baafc4SYe Li }; 18*25baafc4SYe Li 19*25baafc4SYe Li chosen { 20*25baafc4SYe Li stdout-path = &uart1; 21*25baafc4SYe Li }; 22*25baafc4SYe Li 23*25baafc4SYe Li memory { 24*25baafc4SYe Li reg = <0x80000000 0x20000000>; 25*25baafc4SYe Li }; 26*25baafc4SYe Li 27*25baafc4SYe Li regulators { 28*25baafc4SYe Li compatible = "simple-bus"; 29*25baafc4SYe Li #address-cells = <1>; 30*25baafc4SYe Li #size-cells = <0>; 31*25baafc4SYe Li 32*25baafc4SYe Li reg_can_3v3: regulator@0 { 33*25baafc4SYe Li compatible = "regulator-fixed"; 34*25baafc4SYe Li reg = <0>; 35*25baafc4SYe Li regulator-name = "can-3v3"; 36*25baafc4SYe Li regulator-min-microvolt = <3300000>; 37*25baafc4SYe Li regulator-max-microvolt = <3300000>; 38*25baafc4SYe Li gpios = <&gpio_spi 3 GPIO_ACTIVE_LOW>; 39*25baafc4SYe Li }; 40*25baafc4SYe Li 41*25baafc4SYe Li reg_gpio_dvfs: regulator-gpio { 42*25baafc4SYe Li compatible = "regulator-gpio"; 43*25baafc4SYe Li pinctrl-names = "default"; 44*25baafc4SYe Li pinctrl-0 = <&pinctrl_dvfs>; 45*25baafc4SYe Li regulator-min-microvolt = <1300000>; 46*25baafc4SYe Li regulator-max-microvolt = <1400000>; 47*25baafc4SYe Li regulator-name = "gpio_dvfs"; 48*25baafc4SYe Li regulator-type = "voltage"; 49*25baafc4SYe Li gpios = <&gpio5 3 GPIO_ACTIVE_HIGH>; 50*25baafc4SYe Li states = <1300000 0x1 1400000 0x0>; 51*25baafc4SYe Li }; 52*25baafc4SYe Li 53*25baafc4SYe Li reg_sd1_vmmc: regulator@1 { 54*25baafc4SYe Li compatible = "regulator-fixed"; 55*25baafc4SYe Li regulator-name = "VSD_3V3"; 56*25baafc4SYe Li regulator-min-microvolt = <3300000>; 57*25baafc4SYe Li regulator-max-microvolt = <3300000>; 58*25baafc4SYe Li gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>; 59*25baafc4SYe Li off-on-delay = <20000>; 60*25baafc4SYe Li enable-active-high; 61*25baafc4SYe Li }; 62*25baafc4SYe Li }; 63*25baafc4SYe Li 64*25baafc4SYe Li soft_spi: soft-spi { 65*25baafc4SYe Li compatible = "spi-gpio"; 66*25baafc4SYe Li pinctrl-names = "default"; 67*25baafc4SYe Li pinctrl-0 = <&pinctrl_spi4>; 68*25baafc4SYe Li pinctrl-assert-gpios = <&gpio5 8 GPIO_ACTIVE_LOW>; 69*25baafc4SYe Li status = "okay"; 70*25baafc4SYe Li gpio-sck = <&gpio5 11 0>; 71*25baafc4SYe Li gpio-mosi = <&gpio5 10 0>; 72*25baafc4SYe Li cs-gpios = <&gpio5 7 0>; 73*25baafc4SYe Li num-chipselects = <1>; 74*25baafc4SYe Li #address-cells = <1>; 75*25baafc4SYe Li #size-cells = <0>; 76*25baafc4SYe Li 77*25baafc4SYe Li gpio_spi: gpio_spi@0 { 78*25baafc4SYe Li compatible = "fairchild,74hc595"; 79*25baafc4SYe Li gpio-controller; 80*25baafc4SYe Li #gpio-cells = <2>; 81*25baafc4SYe Li reg = <0>; 82*25baafc4SYe Li registers-number = <1>; 83*25baafc4SYe Li registers-default = /bits/ 8 <0x57>; 84*25baafc4SYe Li spi-max-frequency = <100000>; 85*25baafc4SYe Li }; 86*25baafc4SYe Li }; 87*25baafc4SYe Li}; 88*25baafc4SYe Li 89*25baafc4SYe Li&fec1 { 90*25baafc4SYe Li pinctrl-names = "default"; 91*25baafc4SYe Li pinctrl-0 = <&pinctrl_enet1>; 92*25baafc4SYe Li phy-mode = "rmii"; 93*25baafc4SYe Li phy-handle = <ðphy0>; 94*25baafc4SYe Li status = "okay"; 95*25baafc4SYe Li}; 96*25baafc4SYe Li 97*25baafc4SYe Li&fec2 { 98*25baafc4SYe Li pinctrl-names = "default"; 99*25baafc4SYe Li pinctrl-0 = <&pinctrl_enet2>; 100*25baafc4SYe Li phy-mode = "rmii"; 101*25baafc4SYe Li phy-handle = <ðphy1>; 102*25baafc4SYe Li status = "okay"; 103*25baafc4SYe Li 104*25baafc4SYe Li mdio { 105*25baafc4SYe Li #address-cells = <1>; 106*25baafc4SYe Li #size-cells = <0>; 107*25baafc4SYe Li 108*25baafc4SYe Li ethphy0: ethernet-phy@2 { 109*25baafc4SYe Li compatible = "ethernet-phy-ieee802.3-c22"; 110*25baafc4SYe Li reg = <2>; 111*25baafc4SYe Li }; 112*25baafc4SYe Li 113*25baafc4SYe Li ethphy1: ethernet-phy@1 { 114*25baafc4SYe Li compatible = "ethernet-phy-ieee802.3-c22"; 115*25baafc4SYe Li reg = <1>; 116*25baafc4SYe Li }; 117*25baafc4SYe Li }; 118*25baafc4SYe Li}; 119*25baafc4SYe Li 120*25baafc4SYe Li&i2c1 { 121*25baafc4SYe Li clock-frequency = <100000>; 122*25baafc4SYe Li pinctrl-names = "default", "gpio"; 123*25baafc4SYe Li pinctrl-0 = <&pinctrl_i2c1>; 124*25baafc4SYe Li pinctrl-1 = <&pinctrl_i2c1_gpio>; 125*25baafc4SYe Li scl-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>; 126*25baafc4SYe Li sda-gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>; 127*25baafc4SYe Li status = "okay"; 128*25baafc4SYe Li 129*25baafc4SYe Li pmic: pfuze3000@08 { 130*25baafc4SYe Li compatible = "fsl,pfuze3000"; 131*25baafc4SYe Li reg = <0x08>; 132*25baafc4SYe Li 133*25baafc4SYe Li regulators { 134*25baafc4SYe Li sw1a_reg: sw1a { 135*25baafc4SYe Li regulator-min-microvolt = <700000>; 136*25baafc4SYe Li regulator-max-microvolt = <3300000>; 137*25baafc4SYe Li regulator-boot-on; 138*25baafc4SYe Li regulator-always-on; 139*25baafc4SYe Li regulator-ramp-delay = <6250>; 140*25baafc4SYe Li }; 141*25baafc4SYe Li 142*25baafc4SYe Li /* use sw1c_reg to align with pfuze100/pfuze200 */ 143*25baafc4SYe Li sw1c_reg: sw1b { 144*25baafc4SYe Li regulator-min-microvolt = <700000>; 145*25baafc4SYe Li regulator-max-microvolt = <1475000>; 146*25baafc4SYe Li regulator-boot-on; 147*25baafc4SYe Li regulator-always-on; 148*25baafc4SYe Li regulator-ramp-delay = <6250>; 149*25baafc4SYe Li }; 150*25baafc4SYe Li 151*25baafc4SYe Li sw2_reg: sw2 { 152*25baafc4SYe Li regulator-min-microvolt = <2500000>; 153*25baafc4SYe Li regulator-max-microvolt = <3300000>; 154*25baafc4SYe Li regulator-boot-on; 155*25baafc4SYe Li regulator-always-on; 156*25baafc4SYe Li }; 157*25baafc4SYe Li 158*25baafc4SYe Li sw3a_reg: sw3 { 159*25baafc4SYe Li regulator-min-microvolt = <900000>; 160*25baafc4SYe Li regulator-max-microvolt = <1650000>; 161*25baafc4SYe Li regulator-boot-on; 162*25baafc4SYe Li regulator-always-on; 163*25baafc4SYe Li }; 164*25baafc4SYe Li 165*25baafc4SYe Li swbst_reg: swbst { 166*25baafc4SYe Li regulator-min-microvolt = <5000000>; 167*25baafc4SYe Li regulator-max-microvolt = <5150000>; 168*25baafc4SYe Li }; 169*25baafc4SYe Li 170*25baafc4SYe Li snvs_reg: vsnvs { 171*25baafc4SYe Li regulator-min-microvolt = <1000000>; 172*25baafc4SYe Li regulator-max-microvolt = <3000000>; 173*25baafc4SYe Li regulator-boot-on; 174*25baafc4SYe Li regulator-always-on; 175*25baafc4SYe Li }; 176*25baafc4SYe Li 177*25baafc4SYe Li vref_reg: vrefddr { 178*25baafc4SYe Li regulator-boot-on; 179*25baafc4SYe Li regulator-always-on; 180*25baafc4SYe Li }; 181*25baafc4SYe Li 182*25baafc4SYe Li vgen1_reg: vldo1 { 183*25baafc4SYe Li regulator-min-microvolt = <1800000>; 184*25baafc4SYe Li regulator-max-microvolt = <3300000>; 185*25baafc4SYe Li regulator-always-on; 186*25baafc4SYe Li }; 187*25baafc4SYe Li 188*25baafc4SYe Li vgen2_reg: vldo2 { 189*25baafc4SYe Li regulator-min-microvolt = <800000>; 190*25baafc4SYe Li regulator-max-microvolt = <1550000>; 191*25baafc4SYe Li regulator-always-on; 192*25baafc4SYe Li }; 193*25baafc4SYe Li 194*25baafc4SYe Li vgen3_reg: vccsd { 195*25baafc4SYe Li regulator-min-microvolt = <2850000>; 196*25baafc4SYe Li regulator-max-microvolt = <3300000>; 197*25baafc4SYe Li regulator-always-on; 198*25baafc4SYe Li }; 199*25baafc4SYe Li 200*25baafc4SYe Li vgen4_reg: v33 { 201*25baafc4SYe Li regulator-min-microvolt = <2850000>; 202*25baafc4SYe Li regulator-max-microvolt = <3300000>; 203*25baafc4SYe Li regulator-always-on; 204*25baafc4SYe Li }; 205*25baafc4SYe Li 206*25baafc4SYe Li vgen5_reg: vldo3 { 207*25baafc4SYe Li regulator-min-microvolt = <1800000>; 208*25baafc4SYe Li regulator-max-microvolt = <3300000>; 209*25baafc4SYe Li regulator-always-on; 210*25baafc4SYe Li }; 211*25baafc4SYe Li 212*25baafc4SYe Li vgen6_reg: vldo4 { 213*25baafc4SYe Li regulator-min-microvolt = <1800000>; 214*25baafc4SYe Li regulator-max-microvolt = <3300000>; 215*25baafc4SYe Li regulator-always-on; 216*25baafc4SYe Li }; 217*25baafc4SYe Li }; 218*25baafc4SYe Li }; 219*25baafc4SYe Li 220*25baafc4SYe Li mag3110@0e { 221*25baafc4SYe Li compatible = "fsl,mag3110"; 222*25baafc4SYe Li reg = <0x0e>; 223*25baafc4SYe Li position = <2>; 224*25baafc4SYe Li }; 225*25baafc4SYe Li 226*25baafc4SYe Li fxls8471@1e { 227*25baafc4SYe Li compatible = "fsl,fxls8471"; 228*25baafc4SYe Li reg = <0x1e>; 229*25baafc4SYe Li position = <0>; 230*25baafc4SYe Li interrupt-parent = <&gpio5>; 231*25baafc4SYe Li interrupts = <0 8>; 232*25baafc4SYe Li }; 233*25baafc4SYe Li}; 234*25baafc4SYe Li 235*25baafc4SYe Li&i2c2 { 236*25baafc4SYe Li clock_frequency = <100000>; 237*25baafc4SYe Li pinctrl-names = "default", "gpio"; 238*25baafc4SYe Li pinctrl-0 = <&pinctrl_i2c2>; 239*25baafc4SYe Li pinctrl-1 = <&pinctrl_i2c2_gpio>; 240*25baafc4SYe Li scl-gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>; 241*25baafc4SYe Li sda-gpios = <&gpio1 31 GPIO_ACTIVE_HIGH>; 242*25baafc4SYe Li status = "okay"; 243*25baafc4SYe Li}; 244*25baafc4SYe Li 245*25baafc4SYe Li&iomuxc { 246*25baafc4SYe Li pinctrl-names = "default"; 247*25baafc4SYe Li pinctrl-0 = <&pinctrl_hog_1>; 248*25baafc4SYe Li imx6ul-evk { 249*25baafc4SYe Li 250*25baafc4SYe Li pinctrl_dvfs: dvfsgrp { 251*25baafc4SYe Li fsl,pins = < 252*25baafc4SYe Li MX6UL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x79 253*25baafc4SYe Li >; 254*25baafc4SYe Li }; 255*25baafc4SYe Li 256*25baafc4SYe Li pinctrl_enet1: enet1grp { 257*25baafc4SYe Li fsl,pins = < 258*25baafc4SYe Li MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0 259*25baafc4SYe Li MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER 0x1b0b0 260*25baafc4SYe Li MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0 261*25baafc4SYe Li MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0 262*25baafc4SYe Li MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0 263*25baafc4SYe Li MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0 264*25baafc4SYe Li MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0 265*25baafc4SYe Li MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031 266*25baafc4SYe Li >; 267*25baafc4SYe Li }; 268*25baafc4SYe Li 269*25baafc4SYe Li pinctrl_enet2: enet2grp { 270*25baafc4SYe Li fsl,pins = < 271*25baafc4SYe Li MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0 272*25baafc4SYe Li MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0 273*25baafc4SYe Li MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0 274*25baafc4SYe Li MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER 0x1b0b0 275*25baafc4SYe Li MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0 276*25baafc4SYe Li MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0 277*25baafc4SYe Li MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0 278*25baafc4SYe Li MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0 279*25baafc4SYe Li MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0 280*25baafc4SYe Li MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x4001b031 281*25baafc4SYe Li MX6UL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x80000000 282*25baafc4SYe Li >; 283*25baafc4SYe Li }; 284*25baafc4SYe Li 285*25baafc4SYe Li pinctrl_hog_1: hoggrp-1 { 286*25baafc4SYe Li fsl,pins = < 287*25baafc4SYe Li MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x17059 /* SD1 CD */ 288*25baafc4SYe Li MX6UL_PAD_GPIO1_IO05__USDHC1_VSELECT 0x17059 /* SD1 VSELECT */ 289*25baafc4SYe Li MX6UL_PAD_GPIO1_IO09__GPIO1_IO09 0x17059 /* SD1 RESET */ 290*25baafc4SYe Li >; 291*25baafc4SYe Li }; 292*25baafc4SYe Li 293*25baafc4SYe Li pinctrl_i2c1: i2c1grp { 294*25baafc4SYe Li fsl,pins = < 295*25baafc4SYe Li MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0 296*25baafc4SYe Li MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0 297*25baafc4SYe Li >; 298*25baafc4SYe Li }; 299*25baafc4SYe Li 300*25baafc4SYe Li pinctrl_i2c1_gpio: i2c1grp_gpio { 301*25baafc4SYe Li fsl,pins = < 302*25baafc4SYe Li MX6UL_PAD_UART4_TX_DATA__GPIO1_IO28 0x1b8b0 303*25baafc4SYe Li MX6UL_PAD_UART4_RX_DATA__GPIO1_IO29 0x1b8b0 304*25baafc4SYe Li >; 305*25baafc4SYe Li }; 306*25baafc4SYe Li 307*25baafc4SYe Li pinctrl_i2c2: i2c2grp { 308*25baafc4SYe Li fsl,pins = < 309*25baafc4SYe Li MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0 310*25baafc4SYe Li MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001b8b0 311*25baafc4SYe Li >; 312*25baafc4SYe Li }; 313*25baafc4SYe Li 314*25baafc4SYe Li pinctrl_i2c2_gpio: i2c2grp_gpio { 315*25baafc4SYe Li fsl,pins = < 316*25baafc4SYe Li MX6UL_PAD_UART5_TX_DATA__GPIO1_IO30 0x1b8b0 317*25baafc4SYe Li MX6UL_PAD_UART5_RX_DATA__GPIO1_IO31 0x1b8b0 318*25baafc4SYe Li >; 319*25baafc4SYe Li }; 320*25baafc4SYe Li 321*25baafc4SYe Li pinctrl_qspi: qspigrp { 322*25baafc4SYe Li fsl,pins = < 323*25baafc4SYe Li MX6UL_PAD_NAND_WP_B__QSPI_A_SCLK 0x70a1 324*25baafc4SYe Li MX6UL_PAD_NAND_READY_B__QSPI_A_DATA00 0x70a1 325*25baafc4SYe Li MX6UL_PAD_NAND_CE0_B__QSPI_A_DATA01 0x70a1 326*25baafc4SYe Li MX6UL_PAD_NAND_CE1_B__QSPI_A_DATA02 0x70a1 327*25baafc4SYe Li MX6UL_PAD_NAND_CLE__QSPI_A_DATA03 0x70a1 328*25baafc4SYe Li MX6UL_PAD_NAND_DQS__QSPI_A_SS0_B 0x70a1 329*25baafc4SYe Li >; 330*25baafc4SYe Li }; 331*25baafc4SYe Li 332*25baafc4SYe Li 333*25baafc4SYe Li pinctrl_spi4: spi4grp { 334*25baafc4SYe Li fsl,pins = < 335*25baafc4SYe Li MX6UL_PAD_BOOT_MODE0__GPIO5_IO10 0x70a1 336*25baafc4SYe Li MX6UL_PAD_BOOT_MODE1__GPIO5_IO11 0x70a1 337*25baafc4SYe Li MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x70a1 338*25baafc4SYe Li MX6UL_PAD_SNVS_TAMPER8__GPIO5_IO08 0x80000000 339*25baafc4SYe Li >; 340*25baafc4SYe Li }; 341*25baafc4SYe Li 342*25baafc4SYe Li pinctrl_uart1: uart1grp { 343*25baafc4SYe Li fsl,pins = < 344*25baafc4SYe Li MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1 345*25baafc4SYe Li MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1 346*25baafc4SYe Li >; 347*25baafc4SYe Li }; 348*25baafc4SYe Li 349*25baafc4SYe Li pinctrl_usb_otg1_id: usbotg1idgrp { 350*25baafc4SYe Li fsl,pins = < 351*25baafc4SYe Li MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID 0x17059 352*25baafc4SYe Li >; 353*25baafc4SYe Li }; 354*25baafc4SYe Li 355*25baafc4SYe Li pinctrl_usdhc1: usdhc1grp { 356*25baafc4SYe Li fsl,pins = < 357*25baafc4SYe Li MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059 358*25baafc4SYe Li MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059 359*25baafc4SYe Li MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059 360*25baafc4SYe Li MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059 361*25baafc4SYe Li MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059 362*25baafc4SYe Li MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059 363*25baafc4SYe Li >; 364*25baafc4SYe Li }; 365*25baafc4SYe Li 366*25baafc4SYe Li pinctrl_usdhc1_100mhz: usdhc1grp100mhz { 367*25baafc4SYe Li fsl,pins = < 368*25baafc4SYe Li MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9 369*25baafc4SYe Li MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100b9 370*25baafc4SYe Li MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9 371*25baafc4SYe Li MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9 372*25baafc4SYe Li MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9 373*25baafc4SYe Li MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9 374*25baafc4SYe Li >; 375*25baafc4SYe Li }; 376*25baafc4SYe Li 377*25baafc4SYe Li pinctrl_usdhc1_200mhz: usdhc1grp200mhz { 378*25baafc4SYe Li fsl,pins = < 379*25baafc4SYe Li MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9 380*25baafc4SYe Li MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100f9 381*25baafc4SYe Li MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9 382*25baafc4SYe Li MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9 383*25baafc4SYe Li MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9 384*25baafc4SYe Li MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9 385*25baafc4SYe Li >; 386*25baafc4SYe Li }; 387*25baafc4SYe Li 388*25baafc4SYe Li pinctrl_usdhc2: usdhc2grp { 389*25baafc4SYe Li fsl,pins = < 390*25baafc4SYe Li MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x17059 391*25baafc4SYe Li MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059 392*25baafc4SYe Li MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059 393*25baafc4SYe Li MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059 394*25baafc4SYe Li MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059 395*25baafc4SYe Li MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059 396*25baafc4SYe Li >; 397*25baafc4SYe Li }; 398*25baafc4SYe Li 399*25baafc4SYe Li pinctrl_wdog: wdoggrp { 400*25baafc4SYe Li fsl,pins = < 401*25baafc4SYe Li MX6UL_PAD_LCD_RESET__WDOG1_WDOG_ANY 0x30b0 402*25baafc4SYe Li >; 403*25baafc4SYe Li }; 404*25baafc4SYe Li }; 405*25baafc4SYe Li}; 406*25baafc4SYe Li 407*25baafc4SYe Li&qspi { 408*25baafc4SYe Li pinctrl-names = "default"; 409*25baafc4SYe Li pinctrl-0 = <&pinctrl_qspi>; 410*25baafc4SYe Li status = "okay"; 411*25baafc4SYe Li ddrsmp=<0>; 412*25baafc4SYe Li 413*25baafc4SYe Li flash0: n25q256a@0 { 414*25baafc4SYe Li #address-cells = <1>; 415*25baafc4SYe Li #size-cells = <1>; 416*25baafc4SYe Li compatible = "micron,n25q256a"; 417*25baafc4SYe Li spi-max-frequency = <29000000>; 418*25baafc4SYe Li spi-nor,ddr-quad-read-dummy = <6>; 419*25baafc4SYe Li reg = <0>; 420*25baafc4SYe Li }; 421*25baafc4SYe Li}; 422*25baafc4SYe Li 423*25baafc4SYe Li&uart1 { 424*25baafc4SYe Li pinctrl-names = "default"; 425*25baafc4SYe Li pinctrl-0 = <&pinctrl_uart1>; 426*25baafc4SYe Li status = "okay"; 427*25baafc4SYe Li}; 428*25baafc4SYe Li 429*25baafc4SYe Li&usbotg1 { 430*25baafc4SYe Li pinctrl-names = "default"; 431*25baafc4SYe Li pinctrl-0 = <&pinctrl_usb_otg1_id>; 432*25baafc4SYe Li dr_mode = "otg"; 433*25baafc4SYe Li srp-disable; 434*25baafc4SYe Li hnp-disable; 435*25baafc4SYe Li adp-disable; 436*25baafc4SYe Li status = "okay"; 437*25baafc4SYe Li}; 438*25baafc4SYe Li 439*25baafc4SYe Li&usbotg2 { 440*25baafc4SYe Li dr_mode = "host"; 441*25baafc4SYe Li disable-over-current; 442*25baafc4SYe Li status = "okay"; 443*25baafc4SYe Li}; 444*25baafc4SYe Li 445*25baafc4SYe Li&usdhc1 { 446*25baafc4SYe Li pinctrl-names = "default", "state_100mhz", "state_200mhz"; 447*25baafc4SYe Li pinctrl-0 = <&pinctrl_usdhc1>; 448*25baafc4SYe Li pinctrl-1 = <&pinctrl_usdhc1_100mhz>; 449*25baafc4SYe Li pinctrl-2 = <&pinctrl_usdhc1_200mhz>; 450*25baafc4SYe Li cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>; 451*25baafc4SYe Li keep-power-in-suspend; 452*25baafc4SYe Li enable-sdio-wakeup; 453*25baafc4SYe Li vmmc-supply = <®_sd1_vmmc>; 454*25baafc4SYe Li status = "okay"; 455*25baafc4SYe Li}; 456*25baafc4SYe Li 457*25baafc4SYe Li&usdhc2 { 458*25baafc4SYe Li pinctrl-names = "default"; 459*25baafc4SYe Li pinctrl-0 = <&pinctrl_usdhc2>; 460*25baafc4SYe Li no-1-8-v; 461*25baafc4SYe Li non-removable; 462*25baafc4SYe Li keep-power-in-suspend; 463*25baafc4SYe Li enable-sdio-wakeup; 464*25baafc4SYe Li status = "okay"; 465*25baafc4SYe Li}; 466*25baafc4SYe Li 467*25baafc4SYe Li&wdog1 { 468*25baafc4SYe Li pinctrl-names = "default"; 469*25baafc4SYe Li pinctrl-0 = <&pinctrl_wdog>; 470*25baafc4SYe Li fsl,ext-reset-output; 471*25baafc4SYe Li}; 472