1/* 2 * Copyright (C) 2016 Amarula Solutions B.V. 3 * Copyright (C) 2016 Engicam S.r.l. 4 * 5 * This file is dual-licensed: you can use it either under the terms 6 * of the GPL or the X11 license, at your option. Note that this dual 7 * licensing only applies to this file, and not this project as a 8 * whole. 9 * 10 * a) This file is free software; you can redistribute it and/or 11 * modify it under the terms of the GNU General Public License 12 * version 2 as published by the Free Software Foundation. 13 * 14 * This file is distributed in the hope that it will be useful 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * Or, alternatively 20 * 21 * b) Permission is hereby granted, free of charge, to any person 22 * obtaining a copy of this software and associated documentation 23 * files (the "Software"), to deal in the Software without 24 * restriction, including without limitation the rights to use 25 * copy, modify, merge, publish, distribute, sublicense, and/or 26 * sell copies of the Software, and to permit persons to whom the 27 * Software is furnished to do so, subject to the following 28 * conditions: 29 * 30 * The above copyright notice and this permission notice shall be 31 * included in all copies or substantial portions of the Software. 32 * 33 * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND 34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY 38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 40 * OTHER DEALINGS IN THE SOFTWARE. 41 */ 42 43#include <dt-bindings/gpio/gpio.h> 44#include <dt-bindings/input/input.h> 45 46/ { 47 memory { 48 reg = <0x10000000 0x80000000>; 49 }; 50 51 reg_3p3v: regulator-3p3v { 52 compatible = "regulator-fixed"; 53 regulator-name = "3P3V"; 54 regulator-min-microvolt = <3300000>; 55 regulator-max-microvolt = <3300000>; 56 regulator-boot-on; 57 regulator-always-on; 58 }; 59}; 60 61&can1 { 62 pinctrl-names = "default"; 63 pinctrl-0 = <&pinctrl_flexcan1>; 64 xceiver-supply = <®_3p3v>; 65}; 66 67&can2 { 68 pinctrl-names = "default"; 69 pinctrl-0 = <&pinctrl_flexcan2>; 70 xceiver-supply = <®_3p3v>; 71}; 72 73&clks { 74 assigned-clocks = <&clks IMX6QDL_CLK_LVDS2_SEL>; 75 assigned-clock-parents = <&clks IMX6QDL_CLK_OSC>; 76}; 77 78&gpmi { 79 pinctrl-names = "default"; 80 pinctrl-0 = <&pinctrl_gpmi_nand>; 81 nand-on-flash-bbt; 82 status = "okay"; 83}; 84 85&i2c1 { 86 clock-frequency = <100000>; 87 pinctrl-names = "default"; 88 pinctrl-0 = <&pinctrl_i2c1>; 89 status = "okay"; 90}; 91 92&i2c2 { 93 clock-frequency = <100000>; 94 pinctrl-names = "default"; 95 pinctrl-0 = <&pinctrl_i2c2>; 96 status = "okay"; 97}; 98 99&i2c3 { 100 clock-frequency = <100000>; 101 pinctrl-names = "default"; 102 pinctrl-0 = <&pinctrl_i2c3>; 103 status = "okay"; 104}; 105 106&uart4 { 107 pinctrl-names = "default"; 108 pinctrl-0 = <&pinctrl_uart4>; 109 status = "okay"; 110}; 111 112&usdhc1 { 113 pinctrl-names = "default"; 114 pinctrl-0 = <&pinctrl_usdhc1>; 115 cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>; 116 no-1-8-v; 117 status = "okay"; 118}; 119 120&iomuxc { 121 pinctrl_flexcan1: flexcan1grp { 122 fsl,pins = < 123 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b020 124 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b020 125 >; 126 }; 127 128 pinctrl_flexcan2: flexcan2grp { 129 fsl,pins = < 130 MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x1b020 131 MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b020 132 >; 133 }; 134 135 pinctrl_gpmi_nand: gpmi-nand { 136 fsl,pins = < 137 MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 138 MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 139 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 140 MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 141 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 142 MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1 143 MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 144 MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 145 MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 146 MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 147 MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 148 MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 149 MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 150 MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 151 MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 152 MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 153 MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1 154 >; 155 }; 156 157 pinctrl_i2c1: i2c1grp { 158 fsl,pins = < 159 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 160 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 161 >; 162 }; 163 164 pinctrl_i2c2: i2c2grp { 165 fsl,pins = < 166 MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1 167 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 168 >; 169 }; 170 171 pinctrl_i2c3: i2c3grp { 172 fsl,pins = < 173 MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1 174 MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1 175 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 176 >; 177 }; 178 179 pinctrl_uart4: uart4grp { 180 fsl,pins = < 181 MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1 182 MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1 183 >; 184 }; 185 186 pinctrl_usdhc1: usdhc1grp { 187 fsl,pins = < 188 MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17070 189 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10070 190 MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17070 191 MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17070 192 MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17070 193 MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17070 194 >; 195 }; 196}; 197